diff ifctf-part-lib/geda-symbols/RS8973-3.trg @ 0:cd92449fdb51

initial import of ueda and ifctf-part-lib from ifctfvax CVS
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 20 Jul 2015 00:24:37 +0000
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--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/ifctf-part-lib/geda-symbols/RS8973-3.trg	Mon Jul 20 00:24:37 2015 +0000
@@ -0,0 +1,63 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=no
+sort_labels=no
+generate_pinseq=yes
+sym_width=2800
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=RS8973
+device=RS8973
+refdes=U?
+footprint=QFP100
+description=RS8973 bitpump, clock and analog (3 of 5)
+documentation=
+author=Michael Sokolov <msokolov@ivan.Harhan.ORG>
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel. 
+#	negation lines can be added with _Q_ 
+#	if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr	seq	type	style	posit.	net	label	
+#-----------------------------------------------------
+56		pas	line	r		RBIAS
+58		pas	line	r		VCOMO
+57		pas	line	r		VCOMI
+59		pas	line	r		VCCAP
+51		pas	line	r		VRXP
+52		pas	line	r		VRXN
+60		pas	line	r		VTXP
+61		pas	line	r		VTXN
+
+40		clk	clk	l		XTALI/MCLK
+39		out	line	l		XTALO
+35		out	line	l		HCLK
+36		out	line	l		XOUT