FreeCalypso > hg > ueda-linux
view ifctf-part-lib/m4-fp/template.pcb @ 100:071b24bca546
SIM_Socket_473882001.fp: silk courtyard captured
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 29 Sep 2019 19:13:09 +0000 |
parents | cd92449fdb51 |
children |
line wrap: on
line source
# Default blank PCB from pcb-20060822 PCB["" 600000 500000] Grid[1000.000000 0 0 0] Cursor[0 0 0.000000] Thermal[0.500000] DRC[1000 1000 1000 1000 1500 1000] Flags(0x0000000000001c40) Groups("1,c:2,s:3:4:5:6:7:8") Styles["Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"] # font omitted, PCB will reinsert it on load & save. Layer(1 "component") ( ) Layer(2 "solder") ( ) Layer(3 "GND") ( ) Layer(4 "power") ( ) Layer(5 "signal1") ( ) Layer(6 "signal2") ( ) Layer(7 "signal3") ( ) Layer(8 "signal4") ( ) Layer(9 "silk") ( ) Layer(10 "silk") ( )