FreeCalypso > hg > ueda-linux
view ifctf-part-lib/geda-symbols/MC68302_PGA-1.trg @ 63:455a0051f9d2
pads2gpcb: PARTTYPE parsing implemented, compiles
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
---|---|
date | Sun, 31 Jan 2016 07:32:08 +0000 |
parents | cd92449fdb51 |
children |
line wrap: on
line source
# This is the template file for creating symbols with tragesym # every line starting with '#' is a comment line. [options] # rotate_labels rotates the pintext of top and bottom pins # wordswap swaps labels if the pin is on the right side an looks like this: # "PB1 (CLK)" wordswap=yes rotate_labels=no sort_labels=no generate_pinseq=no sym_width=2800 pinwidthvertikal=400 pinwidthhorizontal=400 [geda_attr] # name will be printed in the top of the symbol # if you have a device with slots, you'll have to use slot= and slotdef= # use comment= if there are special information you want to add version=20030525 name=MC68302 device=MC68302 refdes=U? footprint=PGA132 description=MC68302 IMP, M68K bus (1 of 3) documentation= author=Michael Sokolov <msokolov@ivan.Harhan.ORG> numslots=0 #slot=1 #slotdef=1: #slotdef=2: #slotdef=3: #slotdef=4: comment=pinseq numbers are PQFP package pins #comment= #comment= [pins] # tabseparated list of pin descriptions # pinnr is the physical number of the pin # seq is the pinseq= attribute, leave it blank if it doesn't matter # type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr) # style can be (line,dot,clk,dotclk,none). none if only want to add a net # posit. can be (l,r,t,b) or empty for nets # net specifies the name of the Vcc or GND name # label represents the pinlabel. # negation lines can be added with _Q_ # if you want to add a "_" or "\" use "\_" and "\\" as escape sequences #----------------------------------------------------- #pinnr seq type style posit. net label #----------------------------------------------------- G1 1 tri line l A1 G3 2 tri line l A2 G2 3 tri line l A3 F2 5 tri line l A4 F3 6 tri line l A5 E1 7 tri line l A6 D1 8 tri line l A7 E2 9 tri line l A8 E3 10 tri line l A9 C1 11 tri line l A10 B1 12 tri line l A11 D3 14 tri line l A12 C2 15 tri line l A13 A1 16 tri line l A14 D4 17 tri line l A15 D5 19 tri line l A16 C3 20 tri line l A17 B2 21 tri line l A18 B3 22 tri line l A19 B4 24 tri line l A20 A2 25 tri line l A21 A3 26 tri line l A22 C5 27 tri line l A23 DUMMY1 1001 pas line l DUMMY1 B11 48 tri line l D0 C10 47 tri line l D1 B10 46 tri line l D2 A12 45 tri line l D3 C9 43 tri line l D4 B9 42 tri line l D5 A10 41 tri line l D6 A9 40 tri line l D7 B8 38 tri line l D8 A8 37 tri line l D9 B7 36 tri line l D10 C7 35 tri line l D11 A6 33 tri line l D12 B6 32 tri line l D13 C6 31 tri line l D14 A5 30 tri line l D15 M6 104 tri line r _AS_ N6 103 tri line r R/_W_ N5 106 tri line r _UDS_/A0 L6 105 tri line r _LDS_/_DS_ K9 85 tri line r _DTACK_ K2 123 out line r _RMC_/_IOUT1_ K3 122 out line r IAC L11 86 oc line r _BCLR_ DUMMY2 1002 pas line r DUMMY2 M10 90 io line r _BR_ M12 87 io line r _BG_ M11 88 io line r _BGACK_ DUMMY3 1003 pas line r DUMMY3 N11 92 oc line r _RESET_ N12 91 oc line r _HALT_ M9 94 oc line r _BERR_ K13 74 in line r BUSW J13 73 in line r DISCPU DUMMY4 1004 pas line r DUMMY4 L8 97 in line r _IPL0_/_IRQ1_ N9 96 in line r _IPL1_/_IRQ6_ N10 95 in line r _IPL2_/_IRQ7_ H1 132 tri line r FC0 H3 130 tri line r FC1 J1 129 tri line r FC2 L9 93 io line r _AVEC_/_IOUT0_ DUMMY5 1005 pas line r DUMMY5 K1 128 out line r _CS0_/_IOUT2_ J2 127 out line r _CS1_ L1 125 out line r _CS2_ M1 124 out line r _CS3_