view ifctf-part-lib/geda-symbols/MC68302_PQFP-2.sym @ 26:b2b60ec8d9ca

unet-destar: output implemented
author Space Falcon <falcon@ivan.Harhan.ORG>
date Thu, 06 Aug 2015 20:37:31 +0000
parents cd92449fdb51
children
line wrap: on
line source

v 20040111 1
T 4100 11000 8 10 1 1 0 6 1
refdes=U?
T 500 10950 9 10 1 0 0 0 1
MC68302
T 500 11150 5 10 0 0 0 0 1
device=MC68302
T 500 11350 5 10 0 0 0 0 1
footprint=QFP132
T 500 11550 5 10 0 0 0 0 1
author=Michael Sokolov <msokolov@ivan.Harhan.ORG>
T 500 11750 5 10 0 0 0 0 1
documentation=
T 500 11950 5 10 0 0 0 0 1
description=MC68302 IMP, peripherals (2 of 3)
T 500 12150 5 10 0 0 0 0 1
numslots=0
P 4400 10500 4100 10500 1 0 0
{
T 4200 10550 5 8 1 1 0 0 1
pinnumber=52
T 4200 10450 5 8 0 1 0 2 1
pinseq=52
T 4050 10500 9 8 1 1 0 6 1
pinlabel=RxD1/L1RxD
T 4050 10500 5 8 0 1 0 8 1
pintype=in
}
P 4400 10100 4100 10100 1 0 0
{
T 4200 10150 5 8 1 1 0 0 1
pinnumber=80
T 4200 10050 5 8 0 1 0 2 1
pinseq=80
T 4050 10100 9 8 1 1 0 6 1
pinlabel=TxD1/L1TxD
T 4050 10100 5 8 0 1 0 8 1
pintype=out
}
P 4400 9700 4100 9700 1 0 0
{
T 4200 9750 5 8 1 1 0 0 1
pinnumber=82
T 4200 9650 5 8 0 1 0 2 1
pinseq=82
T 4050 9700 9 8 1 1 0 6 1
pinlabel=RCLK1/L1CLK
T 4050 9700 5 8 0 1 0 8 1
pintype=io
}
P 4400 9300 4100 9300 1 0 0
{
T 4200 9350 5 8 1 1 0 0 1
pinnumber=81
T 4200 9250 5 8 0 1 0 2 1
pinseq=81
T 4050 9300 9 8 1 1 0 6 1
pinlabel=TCLK1/L1SY0/SDS1
T 4050 9300 5 8 0 1 0 8 1
pintype=io
}
P 4400 8900 4100 8900 1 0 0
{
T 4200 8950 5 8 1 1 0 0 1
pinnumber=50
T 4200 8850 5 8 0 1 0 2 1
pinseq=50
T 4050 8900 9 8 1 1 0 6 1
pinlabel=CD1/L1SY1
T 4050 8900 5 8 0 1 0 8 1
pintype=in
}
L 3282 9024 3562 9024 3 0 0 0 -1 -1
P 4400 8500 4100 8500 1 0 0
{
T 4200 8550 5 8 1 1 0 0 1
pinnumber=51
T 4200 8450 5 8 0 1 0 2 1
pinseq=51
T 4050 8500 9 8 1 1 0 6 1
pinlabel=CTS1/L1GR
T 4050 8500 5 8 0 1 0 8 1
pintype=in
}
L 3234 8624 3602 8624 3 0 0 0 -1 -1
P 4400 8100 4100 8100 1 0 0
{
T 4200 8150 5 8 1 1 0 0 1
pinnumber=79
T 4200 8050 5 8 0 1 0 2 1
pinseq=79
T 4050 8100 9 8 1 1 0 6 1
pinlabel=RTS1/L1RQ/GCIDCL
T 4050 8100 5 8 0 1 0 8 1
pintype=out
}
L 2590 8224 2950 8224 3 0 0 0 -1 -1
P 4400 7700 4100 7700 1 0 0
{
T 4200 7750 5 8 1 1 0 0 1
pinnumber=76
T 4200 7650 5 8 0 1 0 2 1
pinseq=76
T 4050 7700 9 8 1 1 0 6 1
pinlabel=BRG1
T 4050 7700 5 8 0 1 0 8 1
pintype=out
}
P 4400 6900 4100 6900 1 0 0
{
T 4200 6950 5 8 1 1 0 0 1
pinnumber=53
T 4200 6850 5 8 0 1 0 2 1
pinseq=53
T 4050 6900 9 8 1 1 0 6 1
pinlabel=RxD2/PA0
T 4050 6900 5 8 0 1 0 8 1
pintype=io
}
P 4400 6500 4100 6500 1 0 0
{
T 4200 6550 5 8 1 1 0 0 1
pinnumber=54
T 4200 6450 5 8 0 1 0 2 1
pinseq=54
T 4050 6500 9 8 1 1 0 6 1
pinlabel=TxD2/PA1
T 4050 6500 5 8 0 1 0 8 1
pintype=io
}
P 4400 6100 4100 6100 1 0 0
{
T 4200 6150 5 8 1 1 0 0 1
pinnumber=55
T 4200 6050 5 8 0 1 0 2 1
pinseq=55
T 4050 6100 9 8 1 1 0 6 1
pinlabel=RCLK2/PA2
T 4050 6100 5 8 0 1 0 8 1
pintype=io
}
P 4400 5700 4100 5700 1 0 0
{
T 4200 5750 5 8 1 1 0 0 1
pinnumber=56
T 4200 5650 5 8 0 1 0 2 1
pinseq=56
T 4050 5700 9 8 1 1 0 6 1
pinlabel=TCLK2/PA3
T 4050 5700 5 8 0 1 0 8 1
pintype=io
}
P 4400 5300 4100 5300 1 0 0
{
T 4200 5350 5 8 1 1 0 0 1
pinnumber=58
T 4200 5250 5 8 0 1 0 2 1
pinseq=58
T 4050 5300 9 8 1 1 0 6 1
pinlabel=CTS2/PA4
T 4050 5300 5 8 0 1 0 8 1
pintype=io
}
L 3250 5424 3658 5424 3 0 0 0 -1 -1
P 4400 4900 4100 4900 1 0 0
{
T 4200 4950 5 8 1 1 0 0 1
pinnumber=59
T 4200 4850 5 8 0 1 0 2 1
pinseq=59
T 4050 4900 9 8 1 1 0 6 1
pinlabel=RTS2/PA5
T 4050 4900 5 8 0 1 0 8 1
pintype=io
}
L 3282 5024 3682 5024 3 0 0 0 -1 -1
P 4400 4500 4100 4500 1 0 0
{
T 4200 4550 5 8 1 1 0 0 1
pinnumber=60
T 4200 4450 5 8 0 1 0 2 1
pinseq=60
T 4050 4500 9 8 1 1 0 6 1
pinlabel=CD2/PA6
T 4050 4500 5 8 0 1 0 8 1
pintype=io
}
L 3346 4624 3666 4624 3 0 0 0 -1 -1
P 4400 4100 4100 4100 1 0 0
{
T 4200 4150 5 8 1 1 0 0 1
pinnumber=61
T 4200 4050 5 8 0 1 0 2 1
pinseq=61
T 4050 4100 9 8 1 1 0 6 1
pinlabel=BRG2/SDS2/PA7
T 4050 4100 5 8 0 1 0 8 1
pintype=io
}
P 4400 3300 4100 3300 1 0 0
{
T 4200 3350 5 8 1 1 0 0 1
pinnumber=63
T 4200 3250 5 8 0 1 0 2 1
pinseq=63
T 4050 3300 9 8 1 1 0 6 1
pinlabel=RxD3/PA8
T 4050 3300 5 8 0 1 0 8 1
pintype=io
}
P 4400 2900 4100 2900 1 0 0
{
T 4200 2950 5 8 1 1 0 0 1
pinnumber=64
T 4200 2850 5 8 0 1 0 2 1
pinseq=64
T 4050 2900 9 8 1 1 0 6 1
pinlabel=TxD3/PA9
T 4050 2900 5 8 0 1 0 8 1
pintype=io
}
P 4400 2500 4100 2500 1 0 0
{
T 4200 2550 5 8 1 1 0 0 1
pinnumber=65
T 4200 2450 5 8 0 1 0 2 1
pinseq=65
T 4050 2500 9 8 1 1 0 6 1
pinlabel=RCLK3/PA10
T 4050 2500 5 8 0 1 0 8 1
pintype=io
}
P 4400 2100 4100 2100 1 0 0
{
T 4200 2150 5 8 1 1 0 0 1
pinnumber=66
T 4200 2050 5 8 0 1 0 2 1
pinseq=66
T 4050 2100 9 8 1 1 0 6 1
pinlabel=TCLK3/PA11
T 4050 2100 5 8 0 1 0 8 1
pintype=io
}
P 4400 1700 4100 1700 1 0 0
{
T 4200 1750 5 8 1 1 0 0 1
pinnumber=49
T 4200 1650 5 8 0 1 0 2 1
pinseq=49
T 4050 1700 9 8 1 1 0 6 1
pinlabel=CTS3/SPRxD
T 4050 1700 5 8 0 1 0 8 1
pintype=in
}
L 3102 1824 3494 1824 3 0 0 0 -1 -1
P 4400 1300 4100 1300 1 0 0
{
T 4200 1350 5 8 1 1 0 0 1
pinnumber=78
T 4200 1250 5 8 0 1 0 2 1
pinseq=78
T 4050 1300 9 8 1 1 0 6 1
pinlabel=RTS3/SPTxD
T 4050 1300 5 8 0 1 0 8 1
pintype=out
}
L 3122 1424 3506 1424 3 0 0 0 -1 -1
P 4400 900 4100 900 1 0 0
{
T 4200 950 5 8 1 1 0 0 1
pinnumber=77
T 4200 850 5 8 0 1 0 2 1
pinseq=77
T 4050 900 9 8 1 1 0 6 1
pinlabel=CD3/SPCLK
T 4050 900 5 8 0 1 0 8 1
pintype=io
}
L 3166 1024 3470 1024 3 0 0 0 -1 -1
P 4400 500 4100 500 1 0 0
{
T 4200 550 5 8 1 1 0 0 1
pinnumber=68
T 4200 450 5 8 0 1 0 2 1
pinseq=68
T 4050 500 9 8 1 1 0 6 1
pinlabel=BRG3/PA12
T 4050 500 5 8 0 1 0 8 1
pintype=io
}
P 200 10500 500 10500 1 0 0
{
T 400 10550 5 8 1 1 0 6 1
pinnumber=69
T 400 10450 5 8 0 1 0 8 1
pinseq=69
T 550 10500 9 8 1 1 0 0 1
pinlabel=DREQ/PA13
T 550 10500 5 8 0 1 0 2 1
pintype=io
}
L 550 10624 1002 10624 3 0 0 0 -1 -1
P 200 10100 500 10100 1 0 0
{
T 400 10150 5 8 1 1 0 6 1
pinnumber=70
T 400 10050 5 8 0 1 0 8 1
pinseq=70
T 550 10100 9 8 1 1 0 0 1
pinlabel=DACK/PA14
T 550 10100 5 8 0 1 0 2 1
pintype=io
}
L 550 10224 990 10224 3 0 0 0 -1 -1
P 200 9700 500 9700 1 0 0
{
T 400 9750 5 8 1 1 0 6 1
pinnumber=71
T 400 9650 5 8 0 1 0 8 1
pinseq=71
T 550 9700 9 8 1 1 0 0 1
pinlabel=DONE/PA15
T 550 9700 5 8 0 1 0 2 1
pintype=io
}
L 550 9824 1010 9824 3 0 0 0 -1 -1
P 200 8900 500 8900 1 0 0
{
T 400 8950 5 8 1 1 0 6 1
pinnumber=108
T 400 8850 5 8 0 1 0 8 1
pinseq=108
T 550 8900 9 8 1 1 0 0 1
pinlabel=IACK7/PB0
T 550 8900 5 8 0 1 0 2 1
pintype=io
}
L 550 9024 1002 9024 3 0 0 0 -1 -1
P 200 8500 500 8500 1 0 0
{
T 400 8550 5 8 1 1 0 6 1
pinnumber=109
T 400 8450 5 8 0 1 0 8 1
pinseq=109
T 550 8500 9 8 1 1 0 0 1
pinlabel=IACK6/PB1
T 550 8500 5 8 0 1 0 2 1
pintype=io
}
L 550 8624 1018 8624 3 0 0 0 -1 -1
P 200 8100 500 8100 1 0 0
{
T 400 8150 5 8 1 1 0 6 1
pinnumber=110
T 400 8050 5 8 0 1 0 8 1
pinseq=110
T 550 8100 9 8 1 1 0 0 1
pinlabel=IACK1/PB2
T 550 8100 5 8 0 1 0 2 1
pintype=io
}
L 550 8224 986 8224 3 0 0 0 -1 -1
P 200 7300 500 7300 1 0 0
{
T 400 7350 5 8 1 1 0 6 1
pinnumber=111
T 400 7250 5 8 0 1 0 8 1
pinseq=111
T 550 7300 9 8 1 1 0 0 1
pinlabel=TIN1/PB3
T 550 7300 5 8 0 1 0 2 1
pintype=io
}
P 200 6900 500 6900 1 0 0
{
T 400 6950 5 8 1 1 0 6 1
pinnumber=113
T 400 6850 5 8 0 1 0 8 1
pinseq=113
T 550 6900 9 8 1 1 0 0 1
pinlabel=TOUT1/PB4
T 550 6900 5 8 0 1 0 2 1
pintype=io
}
L 550 7024 1034 7024 3 0 0 0 -1 -1
P 200 6500 500 6500 1 0 0
{
T 400 6550 5 8 1 1 0 6 1
pinnumber=114
T 400 6450 5 8 0 1 0 8 1
pinseq=114
T 550 6500 9 8 1 1 0 0 1
pinlabel=TIN2/PB5
T 550 6500 5 8 0 1 0 2 1
pintype=io
}
P 200 6100 500 6100 1 0 0
{
T 400 6150 5 8 1 1 0 6 1
pinnumber=115
T 400 6050 5 8 0 1 0 8 1
pinseq=115
T 550 6100 9 8 1 1 0 0 1
pinlabel=TOUT2/PB6
T 550 6100 5 8 0 1 0 2 1
pintype=io
}
L 550 6224 1074 6224 3 0 0 0 -1 -1
P 200 5700 500 5700 1 0 0
{
T 400 5750 5 8 1 1 0 6 1
pinnumber=117
T 400 5650 5 8 0 1 0 8 1
pinseq=117
T 550 5700 9 8 1 1 0 0 1
pinlabel=WDOG/PB7
T 550 5700 5 8 0 1 0 2 1
pintype=io
}
L 550 5824 1050 5824 3 0 0 0 -1 -1
P 200 4900 500 4900 1 0 0
{
T 400 4950 5 8 1 1 0 6 1
pinnumber=118
T 400 4850 5 8 0 1 0 8 1
pinseq=118
T 550 4900 9 8 1 1 0 0 1
pinlabel=PB8
T 550 4900 5 8 0 1 0 2 1
pintype=io
}
P 200 4500 500 4500 1 0 0
{
T 400 4550 5 8 1 1 0 6 1
pinnumber=119
T 400 4450 5 8 0 1 0 8 1
pinseq=119
T 550 4500 9 8 1 1 0 0 1
pinlabel=PB9
T 550 4500 5 8 0 1 0 2 1
pintype=io
}
P 200 4100 500 4100 1 0 0
{
T 400 4150 5 8 1 1 0 6 1
pinnumber=120
T 400 4050 5 8 0 1 0 8 1
pinseq=120
T 550 4100 9 8 1 1 0 0 1
pinlabel=PB10
T 550 4100 5 8 0 1 0 2 1
pintype=io
}
P 200 3700 500 3700 1 0 0
{
T 400 3750 5 8 1 1 0 6 1
pinnumber=121
T 400 3650 5 8 0 1 0 8 1
pinseq=121
T 550 3700 9 8 1 1 0 0 1
pinlabel=PB11
T 550 3700 5 8 0 1 0 2 1
pintype=io
}
B 500 100 3600 10800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 1100 2500 9 10 1 0 0 0 1
PERIPHERALS
T 1500 2200 9 10 1 0 0 0 1
2 OF 3