FreeCalypso > hg > ueda-linux
view ueda/sverp/struct.h @ 139:bf188727e606
donl-rename-parts reader: no tEDAx-style escapes
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Mon, 07 Sep 2020 04:25:11 +0000 |
parents | cd92449fdb51 |
children |
line wrap: on
line source
/* * Data structures for our structural Verilog to flat netlist processor */ /* * Definition of a module as a thing in itself, before elaboration */ struct module_def { char *name; struct module_def *next; int is_primitive; /* ports and internal nets */ struct module_net_def *nets; int nports; /* counts of individual wires (buses expanded) */ int nwires_ports; int nwires_internal; /* downward instantiations */ struct module_def_subinst *subinst; /* primitives only */ int prim_numeric_pins; int prim_is_mapped; }; /* * Definition of a wire or bus visible in a module (thing-in-itself), * either port or internal wire. */ struct module_net_def { char *name; struct module_net_def *next; int is_port; int def_complete; int is_bus; int bus_msb; int bus_lsb; int bus_width; int array_index; }; /* * Definition of an instantiation statement in a module as a thing-in-itself */ struct module_def_subinst { char *submod_name; struct module_def *submod_def; char *inst_name; struct module_def_subinst *next; struct connect_entry *connections; int connect_by_order; }; /* * Definition of a connection from a module to a downward port */ struct connect_entry { struct connect_entry *next; /* upper end of the connection */ struct module_net_def *up_netdef; /* NULL means no connect */ int up_offset; int up_width; /* lower end of the connection before link pass */ char *down_portname; /* NULL means connect by order */ int down_range_given; int down_range_msb; int down_range_lsb; /* lower end of the connection after link pass */ struct module_net_def *down_portdef; int down_offset; int down_width; /* source line number */ int src_lineno; }; /* output of the elaboration pass */ struct output_net { char *name; /* NULL means no connect */ int npoints; /* # of package pins connected to this net */ struct output_net *next; /* no-connect pseudo-nets */ char *nc_module_name; int nc_module_lineno; char *nc_module_inst; }; struct output_element { struct module_def *prim_def; char *hier_inst_name; struct output_net **connections; struct output_element *next; };