view ifctf-part-lib/geda-symbols/EPF10K30ATx144-confjtag.sym @ 149:d1a507d34e77

netdiff: donl-netmatch2 factored out
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Nov 2020 04:18:47 +0000
parents cd92449fdb51
children
line wrap: on
line source

v 20040111 1
T 4400 4900 8 10 1 1 0 6 1
refdes=U?
T 400 4850 9 10 1 1 0 0 1
device=EPF10K30ATx144
T 400 5250 5 10 0 0 0 0 1
footprint=LQFP144_20
T 400 5450 5 10 0 0 0 0 1
author=Michael Sokolov <msokolov@ivan.Harhan.ORG>
T 400 5850 5 10 0 0 0 0 1
description=EPF10K30ATx144 FPGA, configuration and JTAG pins
T 400 6050 5 10 0 0 0 0 1
numslots=0
P 100 4400 400 4400 1 0 0
{
T 300 4450 5 8 1 1 0 6 1
pinnumber=105
T 300 4350 5 8 0 1 0 8 1
pinseq=105
T 450 4400 9 8 1 1 0 0 1
pinlabel=TDI
T 450 4400 5 8 0 1 0 2 1
pintype=in
}
P 100 4000 400 4000 1 0 0
{
T 300 4050 5 8 1 1 0 6 1
pinnumber=34
T 300 3950 5 8 0 1 0 8 1
pinseq=34
T 450 4000 9 8 1 1 0 0 1
pinlabel=TMS
T 450 4000 5 8 0 1 0 2 1
pintype=in
}
P 100 3600 400 3600 1 0 0
{
T 300 3650 5 8 1 1 0 6 1
pinnumber=4
T 300 3550 5 8 0 1 0 8 1
pinseq=4
T 450 3600 9 8 1 1 0 0 1
pinlabel=TDO
T 450 3600 5 8 0 1 0 2 1
pintype=out
}
P 100 3200 400 3200 1 0 0
{
T 300 3250 5 8 1 1 0 6 1
pinnumber=1
T 300 3150 5 8 0 1 0 8 1
pinseq=1
T 525 3200 9 8 1 1 0 0 1
pinlabel=TCK
T 525 3200 5 8 0 1 0 2 1
pintype=in
}
L 500 3200 400 3275 3 0 0 0 -1 -1
L 500 3200 400 3125 3 0 0 0 -1 -1
P 100 2400 400 2400 1 0 0
{
T 300 2450 5 8 1 1 0 6 1
pinnumber=106
T 300 2350 5 8 0 1 0 8 1
pinseq=106
T 450 2400 9 8 1 1 0 0 1
pinlabel=nCE
T 450 2400 5 8 0 1 0 2 1
pintype=in
}
P 100 1600 400 1600 1 0 0
{
T 300 1650 5 8 1 1 0 6 1
pinnumber=74
T 300 1550 5 8 0 1 0 8 1
pinseq=74
T 450 1600 9 8 1 1 0 0 1
pinlabel=nCONFIG
T 450 1600 5 8 0 1 0 2 1
pintype=in
}
P 100 1200 400 1200 1 0 0
{
T 300 1250 5 8 1 1 0 6 1
pinnumber=35
T 300 1150 5 8 0 1 0 8 1
pinseq=35
T 450 1200 9 8 1 1 0 0 1
pinlabel=nSTATUS
T 450 1200 5 8 0 1 0 2 1
pintype=tri
}
P 100 800 400 800 1 0 0
{
T 300 850 5 8 1 1 0 6 1
pinnumber=2
T 300 750 5 8 0 1 0 8 1
pinseq=2
T 450 800 9 8 1 1 0 0 1
pinlabel=CONF_DONE
T 450 800 5 8 0 1 0 2 1
pintype=out
}
P 100 400 400 400 1 0 0
{
T 300 450 5 8 1 1 0 6 1
pinnumber=14
T 300 350 5 8 0 1 0 8 1
pinseq=14
T 450 400 9 8 1 1 0 0 1
pinlabel=INIT_DONE
T 450 400 5 8 0 1 0 2 1
pintype=out
}
P 4700 4400 4400 4400 1 0 0
{
T 4500 4450 5 8 1 1 0 0 1
pinnumber=77
T 4500 4350 5 8 0 1 0 2 1
pinseq=77
T 4350 4400 9 8 1 1 0 6 1
pinlabel=MSEL0
T 4350 4400 5 8 0 1 0 8 1
pintype=in
}
P 4700 4000 4400 4000 1 0 0
{
T 4500 4050 5 8 1 1 0 0 1
pinnumber=76
T 4500 3950 5 8 0 1 0 2 1
pinseq=76
T 4350 4000 9 8 1 1 0 6 1
pinlabel=MSEL1
T 4350 4000 5 8 0 1 0 8 1
pintype=in
}
P 4700 2400 4400 2400 1 0 0
{
T 4500 2450 5 8 1 1 0 0 1
pinnumber=3
T 4500 2350 5 8 0 1 0 2 1
pinseq=3
T 4350 2400 9 8 1 1 0 6 1
pinlabel=nCEO
T 4350 2400 5 8 0 1 0 8 1
pintype=out
}
B 400 0 4000 4800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 2000 1600 9 10 1 0 0 0 1
CONFIGURATION
T 2400 1300 9 10 1 0 0 0 1
& JTAG