Sun, 28 Jun 2020 20:02:47 +0000 |
Mychaela Falconia |
TSSOP20_MNF.fp created
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Sat, 13 Jun 2020 17:43:22 +0000 |
Mychaela Falconia |
HC49_SMT.fp created
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Sat, 13 Jun 2020 04:25:44 +0000 |
Mychaela Falconia |
HEADER10_Shrouded.fp: silk corner makes no sense here
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Sat, 13 Jun 2020 04:14:10 +0000 |
Mychaela Falconia |
m4-fp/qfpmnf.inc: basic fixes
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Fri, 12 Jun 2020 07:25:04 +0000 |
Mychaela Falconia |
M4 library: new metric QFP footprints
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Fri, 12 Jun 2020 03:21:37 +0000 |
Mychaela Falconia |
TSSOP14_MNF.fp: pads need to rectangular fingers, not oval
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Fri, 12 Jun 2020 03:08:14 +0000 |
Mychaela Falconia |
USB_CONN_1734035.fp: mask opening for non-plated holes
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Thu, 11 Jun 2020 06:39:49 +0000 |
Mychaela Falconia |
USB_CONN_1734035.fp created
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Thu, 11 Jun 2020 05:35:43 +0000 |
Mychaela Falconia |
HEADER10_Shrouded.fp created
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Mon, 01 Jun 2020 17:17:48 +0000 |
Mychaela Falconia |
TSSOP14_MNF.fp created
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Sat, 09 May 2020 01:55:17 +0000 |
Mychaela Falconia |
TL1105.fp created
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Wed, 01 Apr 2020 08:50:18 +0000 |
Mychaela Falconia |
TLV702xxDBV.fp created
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Wed, 01 Apr 2020 05:58:23 +0000 |
Mychaela Falconia |
HT020K1QC36S.fp created
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Wed, 29 Jan 2020 00:43:04 +0000 |
Mychaela Falconia |
SIM_Socket_SparkFun.fp created
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Wed, 02 Oct 2019 05:12:36 +0000 |
Mychaela Falconia |
SC75A.fp: created based on E-Sample version,
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Wed, 02 Oct 2019 02:10:44 +0000 |
Mychaela Falconia |
Omron_B3S_1000.fp: created based on E-Sample and FCDEV3B
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Mon, 30 Sep 2019 02:24:55 +0000 |
Mychaela Falconia |
SIM_Socket_473882001.pinout added to uschem-symbols
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Mon, 30 Sep 2019 02:21:41 +0000 |
Mychaela Falconia |
SIM_Socket_473882001.fp: M1&M2 pads moved to pin numbers 4 & 8
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Sun, 29 Sep 2019 22:42:41 +0000 |
Mychaela Falconia |
ueda: unet-bind program moved into sensibly named unet-bind subdir
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Sun, 29 Sep 2019 19:13:09 +0000 |
Mychaela Falconia |
SIM_Socket_473882001.fp: silk courtyard captured
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Sun, 29 Sep 2019 18:28:30 +0000 |
Mychaela Falconia |
SIM_Socket_473882001.fp: converted from um to mm units
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Thu, 26 Sep 2019 07:21:11 +0000 |
Mychaela Falconia |
SIM_Socket_473882001.fp: pads captured, no silk courtyard yet
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Thu, 26 Sep 2019 06:17:51 +0000 |
Mychaela Falconia |
Weidmuller_1510460000.fp: created based on FCDEV3B version
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Thu, 26 Sep 2019 05:30:41 +0000 |
Mychaela Falconia |
SML-510MW.fp: created based on E-Sample and FCDEV3B versions
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Wed, 25 Sep 2019 20:13:49 +0000 |
Mychaela Falconia |
ifctf-part-lib/footprints/TAN-R-59XD.fp: created based on
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Sat, 24 Aug 2019 08:54:11 +0000 |
Mychaela Falconia |
ifctf-part-lib/uschem-symbols: added Si1032R.pinout and ipc-diode.pinout
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Sun, 16 Dec 2018 00:14:30 +0000 |
Mychaela Falconia |
ifctf-part-lib/footprints/TLV700xxDDC.fp: created based on datasheet
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Sat, 15 Dec 2018 23:34:05 +0000 |
Mychaela Falconia |
ifctf-part-lib/footprints/SN74AVC4T774PW.fp: created based on datasheet
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Sun, 11 Nov 2018 01:41:30 +0000 |
Mychaela Falconia |
M4 lib: added vertically mirrored 2-row headers
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Sun, 11 Nov 2018 01:25:59 +0000 |
Mychaela Falconia |
M4 lib: 2-row header pin count repertoire more complete
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Thu, 26 Apr 2018 02:21:30 +0000 |
Mychaela Falconia |
FH12 footprints: the left side of the silk outline was misplaced
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Thu, 26 Apr 2018 01:09:19 +0000 |
Mychaela Falconia |
FH12 footprints: square pads
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Thu, 26 Apr 2018 00:42:23 +0000 |
Mychaela Falconia |
ifctf-part-lib/m4-fp/hirose.inc: FH12 series footprints created
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Wed, 25 Apr 2018 20:13:34 +0000 |
Mychaela Falconia |
ifctf-part-lib/m4-fp/geda.inc: JUMPERn covers full [1,20] range
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Wed, 25 Apr 2018 19:42:32 +0000 |
Mychaela Falconia |
ifctf-part-lib/m4-fp: removing RCS IDs
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Thu, 23 Feb 2017 19:55:51 +0000 |
Mychaela Falconia |
ueda-csvbom utility written
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Thu, 23 Feb 2017 19:27:14 +0000 |
Mychaela Falconia |
BOM tallying code factored out of ueda-mkbom
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Thu, 23 Feb 2017 19:18:16 +0000 |
Mychaela Falconia |
bomstruct.h factored out
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Thu, 23 Feb 2017 19:15:48 +0000 |
Mychaela Falconia |
beginning of BOM utils refactoring: seqrefdes code factored out
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Thu, 23 Feb 2017 18:54:47 +0000 |
Mychaela Falconia |
ueda-mkbom refdes list output: refdes range detection implemented
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Mon, 01 Feb 2016 06:11:57 +0000 |
Mychaela Falconia |
pads2gpcb -f: saving of alphapins footprints implemented
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Mon, 01 Feb 2016 02:22:37 +0000 |
Mychaela Falconia |
pads2gpcb: output offset implemented
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Mon, 01 Feb 2016 02:18:06 +0000 |
Mychaela Falconia |
pads2gpcb: soldermask and clearance adjustment options added
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Mon, 01 Feb 2016 02:14:10 +0000 |
Mychaela Falconia |
pads2gpcb: soldermask delta and clearance setting moved to variables
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Mon, 01 Feb 2016 02:09:25 +0000 |
Mychaela Falconia |
pads2gpcb: command line dimension input implemented
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Mon, 01 Feb 2016 00:45:24 +0000 |
Mychaela Falconia |
pads2gpcb: main output implemented
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Mon, 01 Feb 2016 00:29:36 +0000 |
Mychaela Falconia |
pads2gpcb/main.c: preparations for main output of named and placed elements
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Mon, 01 Feb 2016 00:26:04 +0000 |
Mychaela Falconia |
pads2gpcb: single -f option to write loose footprint files
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Mon, 01 Feb 2016 00:13:20 +0000 |
Mychaela Falconia |
pads2gpcb: implemented mirroring and rotation of instantiated parts
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Mon, 01 Feb 2016 00:06:43 +0000 |
Mychaela Falconia |
pads2gpcb: foundation laid for mirroring and rotation
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Sun, 31 Jan 2016 23:41:00 +0000 |
Mychaela Falconia |
pads2gpcb: struct coord_pair introduced
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Sun, 31 Jan 2016 23:19:37 +0000 |
Mychaela Falconia |
pads2gpcb: use Cartesian Y axis direction internally
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Sun, 31 Jan 2016 22:59:36 +0000 |
Mychaela Falconia |
pads2gpcb/partinst.c: checkpoint before adding mirroring and rotation
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Sun, 31 Jan 2016 22:03:08 +0000 |
Mychaela Falconia |
pads2gpcb/partinst.c: buglet fixed, swallows GTA02*.asc now
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Sun, 31 Jan 2016 21:32:08 +0000 |
Mychaela Falconia |
pads2gpcb: PART section parsing implemented, compiles
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Sun, 31 Jan 2016 07:37:09 +0000 |
Mychaela Falconia |
pads2gpcb: PARTTYPE section processing enabled
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Sun, 31 Jan 2016 07:32:08 +0000 |
Mychaela Falconia |
pads2gpcb: PARTTYPE parsing implemented, compiles
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Sun, 31 Jan 2016 05:30:33 +0000 |
Mychaela Falconia |
pads2gpcb: select specific drawing levels for silk with -s
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Sun, 31 Jan 2016 05:02:49 +0000 |
Mychaela Falconia |
pads2gpcb: handle dummy decals with no pins (found in the E-Sample PCB)
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Sun, 31 Jan 2016 03:29:33 +0000 |
Mychaela Falconia |
pads2gpcb: recognize drawing on levels 0 and 1 in decals as silk
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