| Thu, 22 Aug 2024 06:39:12 +0000 |
Mychaela Falconia |
fr-sid: generate test sequence
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| Thu, 22 Aug 2024 05:00:08 +0000 |
Mychaela Falconia |
fr-sid/goodsp-frame41.gsmx: starting point
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| Mon, 19 Aug 2024 17:40:43 +0000 |
Mychaela Falconia |
efr-sid/Unit-test-desc: update for complete status
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| Mon, 12 Aug 2024 03:39:42 +0000 |
Mychaela Falconia |
efr-sid/Unit-test-desc: blurb written
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| Mon, 12 Aug 2024 03:09:13 +0000 |
Mychaela Falconia |
efr-sid OS#6538: generate TCH UL file for FC testing
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| Mon, 12 Aug 2024 03:06:17 +0000 |
Mychaela Falconia |
efr-sid OS#6538: generate test frames in hex form
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| Mon, 12 Aug 2024 02:49:28 +0000 |
Mychaela Falconia |
efr-sid OS#6538: more sensible 2-bit errors
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| Mon, 12 Aug 2024 02:37:21 +0000 |
Mychaela Falconia |
efr-sid OS#6538: more sensible 15-bit and 16-bit errors
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| Sun, 11 Aug 2024 22:17:37 +0000 |
Mychaela Falconia |
efr-sid: generate efr-sid-test2.gsmx for OS#6538
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| Wed, 24 Jul 2024 05:39:51 +0000 |
Mychaela Falconia |
hr-sid: add conversion of misordered SID field
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| Sun, 09 Jun 2024 08:58:44 +0000 |
Mychaela Falconia |
top Makefile: add hr-sid
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| Sun, 09 Jun 2024 08:57:28 +0000 |
Mychaela Falconia |
hr-sid: hack created
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| Sun, 09 Jun 2024 06:00:43 +0000 |
Mychaela Falconia |
top Makefile: add efr-sid
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| Sun, 09 Jun 2024 05:57:48 +0000 |
Mychaela Falconia |
efr-sid: hack created
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| Sun, 09 Jun 2024 05:28:22 +0000 |
Mychaela Falconia |
efr-sid: starting with dtx01-frame71.cod as good SID
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