FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/p_include/l1p_sign.h @ 624:012028896cfb
FFS dev.c, Leonardo target: Fujitsu MB84VF5F5F4J2 #if 0'ed out
The FFS code we got from TI/Openmoko had a stanza for "Fujitsu MB84VF5F5F4J2
stacked device", using a fake device ID code that would need to be patched
manually into cfgffs.c (suppressing and overriding autodetection) and using
an FFS base address in the nCS2 bank, indicating that this FFS config was
probably meant for the MCP version of Leonardo which allows for 16 MiB flash
with a second bank on nCS2.
We previously had this FFS config stanza conditionalized under
CONFIG_TARGET_LEONARDO because the base address contained therein is invalid
for other targets, but now that we actually have a Leonardo build target in
FC Magnetite, I realize that the better approach is to #if 0 out this stanza
altogether: it is already non-functional because it uses a fake device ID
code, thus it is does not add support for more Leonardo board variants,
instead it is just noise.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 22 Dec 2019 21:24:29 +0000 |
parents | 945cf7f506b2 |
children |
rev | line source |
---|---|
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1 /************* Revision Controle System Header ************* |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2 * GSM Layer 1 software |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3 * L1P_SIGN.H |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4 * |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5 * Filename l1p_sign.h |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
6 * Copyright 2003 (C) Texas Instruments |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
7 * |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
8 ************* Revision Controle System Header *************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 #define P_GPRS ( P_L1C + 2 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 // Messages Packet Transfer <-> L1A |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
13 #define MPHP_SINGLE_BLOCK_REQ ( ( P_GPRS << 8 ) | 1 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
14 #define MPHP_SINGLE_BLOCK_CON ( ( P_GPRS << 8 ) | 2 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
15 #define MPHP_STOP_SINGLE_BLOCK_REQ ( ( P_GPRS << 8 ) | 3 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
16 #define MPHP_STOP_SINGLE_BLOCK_CON ( ( P_GPRS << 8 ) | 4 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
17 #define L1P_SINGLE_BLOCK_CON ( ( P_GPRS << 8 ) | 5 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
18 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
19 #define MPHP_ASSIGNMENT_REQ ( ( P_GPRS << 8 ) | 6 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
20 #define MPHP_ASSIGNMENT_CON ( ( P_GPRS << 8 ) | 7 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
21 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
22 #define MPHP_TBF_RELEASE_REQ ( ( P_GPRS << 8 ) | 8 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
23 #define MPHP_TBF_RELEASE_CON ( ( P_GPRS << 8 ) | 9 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
24 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
25 #define MPHP_REPEAT_UL_FIXED_ALLOC_REQ ( ( P_GPRS << 8 ) | 10 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
26 #define MPHP_REPEAT_UL_FIXED_ALLOC_CON ( ( P_GPRS << 8 ) | 11 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
27 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
28 #define MPHP_PDCH_RELEASE_REQ ( ( P_GPRS << 8 ) | 12 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
29 #define MPHP_PDCH_RELEASE_CON ( ( P_GPRS << 8 ) | 13 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
30 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
31 #define MPHP_TIMING_ADVANCE_REQ ( ( P_GPRS << 8 ) | 14 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
32 #define MPHP_TIMING_ADVANCE_CON ( ( P_GPRS << 8 ) | 15 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
33 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
34 #define MPHP_UPDATE_PSI_PARAM_REQ ( ( P_GPRS << 8 ) | 16 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
35 #define MPHP_UPDATE_PSI_PARAM_CON ( ( P_GPRS << 8 ) | 17 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
36 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
37 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
38 #define MPHP_RA_REQ ( ( P_GPRS << 8 ) | 18 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
39 #define MPHP_RA_CON ( ( P_GPRS << 8 ) | 19 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
40 #define MPHP_RA_STOP_REQ ( ( P_GPRS << 8 ) | 20 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
41 #define MPHP_RA_STOP_CON ( ( P_GPRS << 8 ) | 21 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
42 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
43 #define MPHP_POLLING_RESPONSE_REQ ( ( P_GPRS << 8 ) | 22 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
44 #define MPHP_POLLING_IND ( ( P_GPRS << 8 ) | 23 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
45 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
46 #define L1P_RA_DONE ( ( P_GPRS << 8 ) | 24 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
47 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
48 // Messages Packet Idle <-> L1A |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
49 #define MPHP_START_PCCCH_REQ ( ( P_GPRS << 8 ) | 25 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
50 #define MPHP_STOP_PCCCH_REQ ( ( P_GPRS << 8 ) | 26 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
51 #define MPHP_STOP_PCCCH_CON ( ( P_GPRS << 8 ) | 27 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
52 #define MPHP_SCELL_PBCCH_REQ ( ( P_GPRS << 8 ) | 28 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
53 #define MPHP_SCELL_PBCCH_STOP_REQ ( ( P_GPRS << 8 ) | 29 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
54 #define MPHP_SCELL_PBCCH_STOP_CON ( ( P_GPRS << 8 ) | 30 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
55 #define MPHP_CR_MEAS_REQ ( ( P_GPRS << 8 ) | 31 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
56 #define MPHP_CR_MEAS_STOP_REQ ( ( P_GPRS << 8 ) | 32 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
57 #define MPHP_CR_MEAS_STOP_CON ( ( P_GPRS << 8 ) | 33 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
58 #define MPHP_INT_MEAS_REQ ( ( P_GPRS << 8 ) | 34 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
59 #define MPHP_INT_MEAS_STOP_REQ ( ( P_GPRS << 8 ) | 35 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
60 #define MPHP_INT_MEAS_STOP_CON ( ( P_GPRS << 8 ) | 36 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
61 #define MPHP_NCELL_PBCCH_REQ ( ( P_GPRS << 8 ) | 37 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
62 #define MPHP_NCELL_PBCCH_STOP_REQ ( ( P_GPRS << 8 ) | 38 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
63 #define MPHP_NCELL_PBCCH_STOP_CON ( ( P_GPRS << 8 ) | 39 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
64 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
65 #define MPHP_DATA_IND ( ( P_GPRS << 8 ) | 40 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
66 #define MPHP_CR_MEAS_IND ( ( P_GPRS << 8 ) | 41 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
67 #define MPHP_INT_MEAS_IND ( ( P_GPRS << 8 ) | 42 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
68 #define MPHP_TINT_MEAS_IND ( ( P_GPRS << 8 ) | 43 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
69 #define MPHP_NCELL_PBCCH_IND ( ( P_GPRS << 8 ) | 44 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
70 #define MPHP_TCR_MEAS_REQ ( ( P_GPRS << 8 ) | 45 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
71 #define MPHP_TCR_MEAS_IND ( ( P_GPRS << 8 ) | 46 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
72 #define MPHP_TCR_MEAS_STOP_REQ ( ( P_GPRS << 8 ) | 47 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
73 #define MPHP_TCR_MEAS_STOP_CON ( ( P_GPRS << 8 ) | 48 ) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
74 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
75 /*** L1S -> L1A communication ***/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
76 #define L1P_PALLC_INFO ( ( P_GPRS << 8) | 49) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
77 #define L1P_PNP_INFO ( ( P_GPRS << 8) | 50) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
78 #define L1P_PEP_INFO ( ( P_GPRS << 8) | 51) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
79 #define L1P_PBCCHS_INFO ( ( P_GPRS << 8) | 52) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
80 #define L1P_PACCH_INFO ( ( P_GPRS << 8) | 53) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
81 #define L1P_CR_MEAS_DONE ( ( P_GPRS << 8) | 54) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
82 #define L1P_TRANSFER_DONE ( ( P_GPRS << 8) | 55) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
83 #define L1P_TCR_MEAS_DONE ( ( P_GPRS << 8) | 56) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
84 #define L1P_TBF_RELEASED ( ( P_GPRS << 8) | 57) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
85 #define L1P_ITMEAS_IND ( ( P_GPRS << 8) | 58) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
86 #define L1P_POLL_DONE ( ( P_GPRS << 8) | 59) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
87 #define L1P_PDCH_RELEASED ( ( P_GPRS << 8) | 60) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
88 #define L1P_TA_CONFIG_DONE ( ( P_GPRS << 8) | 61) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
89 #define L1P_PBCCHN_INFO ( ( P_GPRS << 8) | 62) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
90 #define L1P_REPEAT_ALLOC_DONE ( ( P_GPRS << 8) | 63) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
91 #define L1P_ALLOC_EXHAUST_DONE ( ( P_GPRS << 8) | 64) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
92 |