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annotate src/cs/drivers/drv_app/spi/spi_task.h @ 639:026c98f757a6

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tpudrv12.h & targets/gtm900.h: our current support is for MGC2GSMT version only As it turns out, there exist two different Huawei-made hw platforms both bearing the marketing name GTM900-B: one is MG01GSMT, the other is MGC2GSMT. The two are NOT fw-compatible: aside from flash chip differences which should be handled by autodetection, the two hw platforms are already known to have different RFFEs with different control signals, and there may be other differences not yet known. Our current gtm900 build target is for MGC2GSMT only; we do not yet have a specimen of MG01GSMT on hand, hence no support for that version will be possible until and unless someone provides one.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 30 Jan 2020 18:19:01 +0000 (2020-01-30)
parents 945cf7f506b2
children
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945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /*****************************************************************************/
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2 /* */
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3 /* Name spi_task.h */
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4 /* */
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5 /* Function this file contains timers definitions used by spi_core, */
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6 /* in case the PWR SWE is defined. */
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7 /* */
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8 /* Version 0.1 */
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9 /* Author Candice Bazanegue */
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10 /* */
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11 /* Date Modification */
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12 /* ------------------------------------ */
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13 /* 20/08/2000 Create */
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14 /* 01/09/2003 Modfication */
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15 /* Author Pascal Puel */
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16 /* */
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17 /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */
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18 /*****************************************************************************/
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19
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20 #ifndef _SPI_TASK_H_
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21 #define _SPI_TASK_H_
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23 #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE
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25 #ifdef RVM_PWR_SWE
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27 #include "pwr/pwr_cust.h"
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29 #define SPI_TIMER0 (RVF_TIMER_0)
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30 #define SPI_TIMER0_INTERVAL_1 (PWR_BAT_TEST_TIME_1)
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31 #define SPI_TIMER0_INTERVAL_2 (PWR_BAT_TEST_TIME_2)
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32 #define SPI_TIMER0_INTERVAL_3 (PWR_CALIBRATION_TIME_1)
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33 #define SPI_TIMER0_INTERVAL_4 (PWR_CALIBRATION_TIME_2)
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34 #define SPI_TIMER0_WAIT_EVENT (RVF_TIMER_0_EVT_MASK)
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35
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36 #define SPI_TIMER1 (RVF_TIMER_1)
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37 #define SPI_TIMER1_INTERVAL (PWR_CI_CHECKING_TIME)
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38 #define SPI_TIMER1_WAIT_EVENT (RVF_TIMER_1_EVT_MASK)
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39
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40 #define SPI_TIMER2 (RVF_TIMER_2)
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41 #define SPI_TIMER2_INTERVAL (PWR_CV_CHECKING_TIME)
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42 #define SPI_TIMER2_WAIT_EVENT (RVF_TIMER_2_EVT_MASK)
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43
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44 #define SPI_TIMER3 (RVF_TIMER_3)
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45 #define SPI_TIMER3_INTERVAL (PWR_DISCHARGE_CHECKING_TIME_1)
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46 #define SPI_TIMER3_INTERVAL_BIS (PWR_DISCHARGE_CHECKING_TIME_2)
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47 #define SPI_TIMER3_WAIT_EVENT (RVF_TIMER_3_EVT_MASK)
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48
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49 #endif // RVM_PWR_SWE
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51
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52 // Prototypes
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53 void spi_adc_on (void);
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54 T_RV_RET spi_core(void);
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56 #endif // _SPI_TASK_H_