FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/gtt_include/l1gtt_signa.h @ 605:07d0dc4431f4
bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix
Both MEMIF and DPLL settings are now the same between int.s and bootloader.s
assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode,
which persisted until _INT_Initialize code with the bootloader body omitted,
or was changed to /1 in the hardware init function in the
bootloader.lib:start.obj module.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 17 Jun 2019 18:40:32 +0000 |
parents | 945cf7f506b2 |
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rev | line source |
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0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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1 /************* Revision Controle System Header ************* |
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src/cs: chipsetsw import from tcs211-fcmodem
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2 * GSM Layer 1 software |
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Mychaela Falconia <falcon@freecalypso.org>
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3 * L1GTT_SIGNA.H |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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4 * |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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5 * Filename l1gtt_signa.h |
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6 * Copyright 2003 (C) Texas Instruments |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 * |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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8 ************* Revision Controle System Header *************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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9 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 #if (L1_GTT == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
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11 |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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12 #define P_GTT ( 0x19 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 |
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src/cs: chipsetsw import from tcs211-fcmodem
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14 // Messages Upper layer <-> L1A |
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15 #define MMI_GTT_START_REQ ( ( P_GTT << 8 ) | 1 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
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16 #define MMI_GTT_START_CON ( ( P_GTT << 8 ) | 2 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 #define MMI_GTT_STOP_REQ ( ( P_GTT << 8 ) | 3 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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18 #define MMI_GTT_STOP_CON ( ( P_GTT << 8 ) | 4 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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19 |
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Mychaela Falconia <falcon@freecalypso.org>
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20 // Messages L1S <-> L1A |
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src/cs: chipsetsw import from tcs211-fcmodem
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21 #define L1_GTT_START_CON ( ( P_GTT << 8 ) | 5 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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22 #define L1_GTT_STOP_CON ( ( P_GTT << 8 ) | 6 ) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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23 |
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24 // Test messages |
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25 #define TST_CLOSE_GTT_LOOP_REQ ( ( P_GTT << 8 ) | 7 ) |
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26 #define TST_CLOSE_GTT_LOOP_CON ( ( P_GTT << 8 ) | 8 ) |
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27 #define TST_OPEN_GTT_LOOP_REQ ( ( P_GTT << 8 ) | 9 ) |
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28 #define TST_OPEN_GTT_LOOP_CON ( ( P_GTT << 8 ) | 10 ) |
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29 #define TST_START_GTT_TEST_REQ ( ( P_GTT << 8 ) | 11 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
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parents:
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30 #define TST_START_GTT_TEST_CON ( ( P_GTT << 8 ) | 12 ) |
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parents:
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31 #define TST_STOP_GTT_TEST_REQ ( ( P_GTT << 8 ) | 13 ) |
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src/cs: chipsetsw import from tcs211-fcmodem
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parents:
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32 #define TST_STOP_GTT_TEST_CON ( ( P_GTT << 8 ) | 14 ) |
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parents:
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33 |
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src/cs: chipsetsw import from tcs211-fcmodem
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34 #endif // L1_GTT == 1 |