annotate src/cs/layer1/tm_include/l1tm_varex.h @ 605:07d0dc4431f4

bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 945cf7f506b2
children
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945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1TM_VAREX.H
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4 *
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5 * Filename l1tm_varex.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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11 #ifdef L1TM_ASYNC_C //Defined in l1_tmode.c
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12 #define TMVAR
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13 #else
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14 #define TMVAR extern
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15 #endif
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17 TMVAR T_L1TM_GLOBAL l1tm;
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