FreeCalypso > hg > fc-magnetite
view src/cs/layer1/tm_include/l1tm_varex.h @ 605:07d0dc4431f4
bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix
Both MEMIF and DPLL settings are now the same between int.s and bootloader.s
assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode,
which persisted until _INT_Initialize code with the bootloader body omitted,
or was changed to /1 in the hardware init function in the
bootloader.lib:start.obj module.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Mon, 17 Jun 2019 18:40:32 +0000 |
parents | 945cf7f506b2 |
children |
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/************* Revision Controle System Header ************* * GSM Layer 1 software * L1TM_VAREX.H * * Filename l1tm_varex.h * Copyright 2003 (C) Texas Instruments * ************* Revision Controle System Header *************/ #ifdef L1TM_ASYNC_C //Defined in l1_tmode.c #define TMVAR #else #define TMVAR extern #endif TMVAR T_L1TM_GLOBAL l1tm;