FreeCalypso > hg > fc-magnetite

annotate src/cs/services/dar/dar_diagnose.c @ 665:2795a11973b8

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UART PS entity: added trace of line state changes
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 27 May 2020 22:46:55 +0000
parents 945cf7f506b2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /****************************************************************************/
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2 /* */
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3 /* File Name: dar_diagnose.c */
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4 /* */
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5 /* Purpose: This function contains the DAR diagnose functions */
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6 /* */
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7 /* */
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8 /* Version 0.1 */
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9 /* */
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10 /* Date Modification */
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11 /* ------------------------------------ */
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12 /* 18 October 2001 Create */
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13 /* */
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14 /* Author Stephanie Gerthoux */
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15 /* */
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16 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved*/
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17 /****************************************************************************/
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18
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19 #include "rv/rv_defined_swe.h"
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20 #ifdef RVM_DAR_SWE
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21 #ifndef _WINDOWS
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22 #include "timer/timer.h"
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23 #endif
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24
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25 #include "rv/rv_general.h"
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26 #include "rvm/rvm_gen.h"
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27 #include "rvm/rvm_priorities.h"
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28 #include "dar/dar_api.h"
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29 #include "dar/dar_structs_i.h"
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30 #include "dar/dar_env.h"
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31 #include "rvf/rvf_target.h"
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32 #include "dar/dar_const_i.h"
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33 #include "dar/dar_macro_i.h"
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34 #include "dar/dar_messages_i.h"
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35 #include "dar/dar_error_hdlr_i.h"
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36 //#include "rvf/rvf_i.h"
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37
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38 /**** Global variables ****/
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39
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40 /* Define a pointer to the Global Environment Control block */
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41 extern T_DAR_ENV_CTRL_BLK *dar_gbl_var_p;
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42
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43
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44
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45 /********************************************************************************/
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46 /* Function dar_search_group */
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47 /* */
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48 /* Description This function checks if the use_id group_nb exists: */
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49 /* */
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50 /********************************************************************************/
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51 T_RV_RET dar_search_group(UINT16 group, UINT8 *index_p)
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52 {
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53 /* Declare local variables */
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54 UINT8 i=0;
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55
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56 /* Check if the DAR entity is started */
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57 if (dar_gbl_var_p != NULL )
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58 {
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59 /* Search in the dar_filter_array if the group exists */
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60 for (i=0;i< DAR_MAX_GROUP_NB; i++)
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61 {
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62 if(dar_gbl_var_p->dar_filter_array[i].group_nb == group)
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63 {
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64 *index_p=i;
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65 //DAR_SEND_TRACE_PARAM("dar filter_array index",*index_p,RV_TRACE_LEVEL_DEBUG_LOW);
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66 return(RV_OK);
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67 }
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68 }
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69 return(RV_NOT_SUPPORTED);
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70 }
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71 else
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72 {
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73 return(RV_NOT_READY);
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74 }
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75 }
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76
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77 /********************************************************************************/
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78 /* Function dar_add_group */
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79 /* */
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80 /* Description This function research the index of the first free group */
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81 /* */
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82 /********************************************************************************/
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83 T_RV_RET dar_add_group(UINT8 *index_p)
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84 {
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85 /* Declare local variables */
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86 UINT8 i=0;
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87
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88 /* Check if the DAR entity is started */
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89 if (dar_gbl_var_p == NULL )
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90 {
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91 dar_error_trace(DAR_ENTITY_NOT_START);
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92 return(RV_NOT_READY);
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93 }
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94
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95 /* Search in the dar_filter_array the first free group */
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96 for (i=0;i< DAR_MAX_GROUP_NB; i++)
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97 {
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98 if(dar_gbl_var_p->dar_filter_array[i].group_nb == DAR_INITIALIZATION_VALUE)
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99 {
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100 *index_p=i;
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101 return(RV_OK);
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102 }
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103 }
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104 return(RV_NOT_SUPPORTED);
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105 }
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106
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107
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108 /********************************************************************************/
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109 /* */
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110 /* Function Name: dar_send_write_data */
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111 /* */
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112 /* Purpose: This function is called to send write data in the DAR mailbox */
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113 /* */
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114 /* Input Parameters: */
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115 /* Pointer to the message to store */
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116 /* Data Format, */
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117 /* Data level, */
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118 /* Data Use Id, */
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119 /* */
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120 /* Output Parameters: */
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121 /* Validation of the function execution. */
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122 /* */
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123 /* Note: */
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124 /* None */
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125 /* */
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126 /********************************************************************************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 T_RV_RET dar_send_write_data ( T_DAR_INFO *buffer_p,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 T_DAR_FORMAT format,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 T_DAR_LEVEL diagnose_info_level,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 T_RVM_USE_ID dar_use_id)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 /* Declare local variables */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 T_RVF_MB_STATUS mb_status = RVF_GREEN;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 T_DAR_WRITE_START *write_data_p = NULL;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 /************************** dar_send_write_data **********************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 if (dar_gbl_var_p != NULL )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 /* allocate the memory for the message to send */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 mb_status = rvf_get_buf (dar_gbl_var_p->mb_dar,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 sizeof (T_DAR_WRITE_START),
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 (T_RVF_BUFFER **) (&write_data_p));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 /* If insufficient resources, then report a memory error and abort.*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 if (mb_status == RVF_YELLOW)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 /* deallocate the memory */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 rvf_free_buf((T_RVF_BUFFER *)write_data_p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 dar_error_trace(DAR_ENTITY_NO_MEMORY);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 return (RV_NOT_SUPPORTED);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 else
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 if (mb_status == RVF_RED)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 dar_error_trace(DAR_ENTITY_NO_MEMORY);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 return (RV_MEMORY_ERR);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 /* fill the message id */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 write_data_p->os_hdr.msg_id = DAR_WRITE_REQ;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 /* fill the addr source id */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 write_data_p->os_hdr.src_addr_id = dar_gbl_var_p->addrId;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 /* fill the message parameters */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 write_data_p->data_write.char_p = buffer_p ;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 write_data_p->data_write.data_format = format;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 write_data_p->data_write.level = diagnose_info_level;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 write_data_p->data_write.use_id.group_nb = (dar_use_id>>16)& 0x7FFF;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 write_data_p->data_write.use_id.mask = (dar_use_id)&0xFFFF;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 /* send the messsage to the DAR entity */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 rvf_send_msg (dar_gbl_var_p->addrId,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 write_data_p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 return (RV_OK);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 else
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 return(RV_NOT_READY);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 } /* dar_send_write_data */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 /********************************************************************************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 /* Function dar_reset */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 /* Description This function is used to reset the system */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 /* Input Parameters: */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 /* None */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 /* Output Parameters: */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 /* Validation of the function execution. */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 /* Note: */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 /* None */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 /********************************************************************************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 T_RV_RET dar_reset(void)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 #ifndef _WINDOWS
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 /* Declare global variable*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 volatile UINT16 *register_p;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 volatile UINT8 i;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 /* enable the Watchdog timer */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 TM_EnableWatchdog();
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 /* Reset the system with the Watchdog */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 /* initialize the adress of the watchdog timer pointer */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 register_p = (volatile UINT16 *)WATCHDOG_TIM_MODE;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 /* Write the 0xF5 value to the Watchdog timer mode register to disable the Watchdog*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 /* Note the bit 15 must be unchanged ( bit 15 = 1 -> 0x8000)*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 *register_p =0x80F5;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 /* Wait a couple of time to be sure that this register has a new value */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 for (i=0;i<100;i++);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 /* After having received 0xF5 in the Watchdog timer mode register, if the */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 /* second write access is differennt from 0xA0, ARM core is reset */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 /* The ARM HW core is reset + branch to adress 0x0000 ( SW reset) */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 *register_p=0x80F5;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 /* Wait until the ARM reset */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 while(1);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 return(RV_OK);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 } /* dar_reset */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 /********************************************************************************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 /* Function dar_read_mbox */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 /* Description Called by the dar to read a buffer from its mailboxes. */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 /* when the Operating System is out */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 /* Input Parameters: */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 /* None */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 /* Output Parameters: */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 /* NULL if the mailbox was empty, else the address of a buffer */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 /* */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 /********************************************************************************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 void * dar_read_mbox (UINT8 mbox)
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253 {
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254 // void * p_buf = NULL;
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255 // T_RVF_INTERNAL_BUF * p_hdr;
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256
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257 /* Verify if DAR's global struct was set by RVM, then read the mailbox */
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258 if (dar_gbl_var_p != NULL )
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259 return rvf_read_addr_mbox (dar_gbl_var_p->addrId, mbox);
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260
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261 return NULL;
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262
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263 // Check if the DAR entity is started
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264 /*if (dar_gbl_var_p != NULL )
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265 {
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266
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267 if ( OSTaskQFirst[dar_gbl_var_p->addrId][mbox] )// if the chained list is not empty
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268 {
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269 p_hdr = OSTaskQFirst[dar_gbl_var_p->addrId][mbox];
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270 OSTaskQFirst[dar_gbl_var_p->addrId][mbox] = p_hdr->p_next;
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271
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272 p_hdr->p_next = NULL;
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273
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274 #if RVF_ENABLE_BUF_LINKAGE_CHECK
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275 RVF_SET_BUF_UNLINKED(p_hdr); // change buffer status
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276 #endif
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277
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278 p_buf = (UINT8 *)p_hdr + sizeof(T_RVF_INTERNAL_BUF);
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279 }
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280 }
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281 return (p_buf); */
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282 } // dar_read_mbox
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283
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284 #else
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285
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286 /* ******************************************************* */
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287 /* THE DAR ENTITY IS DISABLED */
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288 /* ******************************************************* */
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289 #ifndef _WINDOWS
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290 #include "config/swconfig.cfg"
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291 #include "config/sys.cfg"
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292 #include "config/chipset.cfg"
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293 #include "timer/timer.h"
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294 #endif
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295
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296 #include "rv/rv_general.h"
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297 #include "rvm/rvm_gen.h"
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298 #include "rvm/rvm_priorities.h"
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299 #include "rvf/rvf_target.h"
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300 //#include "rvf/rvf_i.h"
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301
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302 /* Define the Watchdog timer register mode */
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303 #define WATCHDOG_TIM_MODE (0xFFFFF804)
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304
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305
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306 /********************************************************************************/
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307 /* Function dar_reset */
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308 /* */
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309 /* Description This function is used to reset the system */
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310 /* */
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311 /* Input Parameters: */
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312 /* None */
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313 /* */
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314 /* Output Parameters: */
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315 /* Validation of the function execution. */
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316 /* */
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317 /* Note: */
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318 /* None */
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319 /* */
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320 /********************************************************************************/
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321 T_RV_RET dar_reset(void)
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322 {
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323 #ifndef _WINDOWS
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324 /* Declare global variable*/
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325 volatile UINT16 *register_p;
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326 volatile UINT8 i;
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327
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328
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329 /* enable the Watchdog timer */
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330 TM_EnableWatchdog();
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331
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332 /* Reset the system with the Watchdog */
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333 /* initialize the adress of the watchdog timer pointer */
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334 register_p = (volatile UINT16 *)WATCHDOG_TIM_MODE;
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335
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336 /* Write the 0xF5 value to the Watchdog timer mode register to disable the Watchdog*/
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337 /* Note the bit 15 must be unchanged ( bit 15 = 1 -> 0x8000)*/
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338 *register_p =0x80F5;
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339
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340 /* Wait a couple of time to be sure that this register has a new value */
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341 for (i=0;i<100;i++);
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342
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343 /* After having received 0xF5 in the Watchdog timer mode register, if the */
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344 /* second write access is differennt from 0xA0, ARM core is reset */
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345 /* The ARM HW core is reset + branch to adress 0x0000 ( SW reset) */
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346 *register_p=0x80F5;
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347
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348 /* Wait until the ARM reset */
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349 while(1);
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350 #endif
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351
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352 return(RV_OK);
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353 } /* dar_reset */
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354
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355 #endif /* #ifdef RVM_DAR_SWE */