FreeCalypso > hg > fc-magnetite
annotate src/cs/drivers/drv_app/fchg/fchg_struct.h @ 453:96c047b4325e
R2D D-Sample drivers: only do the actual hw pokes when CONFIG_TARGET_DSAMPLE
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 15 Mar 2018 05:48:03 +0000 |
parents | 4c3d05866531 |
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1 /* |
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2 * Internal structure definitions for the FCHG SWE reside here. |
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3 * abb_inth.c will also need to include this header in order to |
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4 * get our T_PWR_CTRL_BLOCK definition. |
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5 */ |
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6 |
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7 #ifndef __FCHG_STRUCT_H |
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8 #define __FCHG_STRUCT_H |
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9 |
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10 #include "rv/rv_general.h" |
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11 #include "rvf/rvf_api.h" |
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12 #include "fchg/fchg_common.h" |
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13 |
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14 struct charging_config { |
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15 UINT16 start_delay; |
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16 UINT16 start_thresh; |
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17 UINT16 restart_thresh; |
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18 UINT16 ci2cv_thresh; |
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19 UINT16 cv_init_set; |
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20 UINT16 cv_ctrl_loop_high; |
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21 UINT16 cv_ctrl_loop_low; |
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22 UINT16 cv_dac_max_incr; |
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23 UINT16 cv_dac_max_decr; |
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24 UINT16 cv_samples_needed; |
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25 UINT16 overvoltage; |
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26 UINT16 ci_current; |
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27 UINT16 end_current; |
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28 UINT16 ichg_max_spike; |
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29 UINT16 ichg_samples_needed; |
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30 UINT16 charge_time_limit; |
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31 UINT16 recharge_delay; |
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32 UINT16 bciconf; |
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33 }; |
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34 |
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35 /* from original PWR SWE */ |
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36 typedef struct { |
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37 UINT16 bat_voltage; |
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38 T_PWR_PERCENT remain_capa; |
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39 } T_PWR_THRESHOLDS; |
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40 |
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41 #define MAX_THRESHOLDS 101 |
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42 |
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43 #define ICHG_AVG_WINDOW 6 |
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44 |
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45 typedef struct { |
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46 /* RiViera boilerplate */ |
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47 T_RVF_ADDR_ID addr_id; |
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48 T_RVF_MB_ID prim_id; |
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49 /* configuration */ |
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50 struct charging_config config; |
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51 BOOL config_present; |
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52 T_PWR_THRESHOLDS batt_thresholds[MAX_THRESHOLDS]; |
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53 UINT16 nb_thresholds; |
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54 /* state */ |
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55 enum fchg_state state; |
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56 UINT16 batt_mv; |
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57 UINT16 curr_disch_thresh; |
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58 /* valid only during a charging cycle */ |
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59 UINT16 i2v_offset; |
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60 UINT16 cv_dac_init; |
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61 UINT16 cv_dac_curr; |
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62 UINT16 cv_high_vbat_count; |
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63 UINT16 cv_low_vbat_count; |
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64 UINT16 ichg_avg_buf[ICHG_AVG_WINDOW]; |
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65 UINT16 ichg_fill_level; |
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66 UINT16 ichg_ring_ptr; |
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67 UINT16 ichg_average; |
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68 UINT16 ichg_low_count; |
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69 UINT32 start_time; |
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70 } T_PWR_CTRL_BLOCK; |
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71 |
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72 #endif /* include guard */ |