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changeset 322:c4077830aeeb

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FCHG implementation code started
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 04 Dec 2017 05:55:58 +0000
parents 5dea7e937c37
children f08212cf0b04
files src/cs/drivers/drv_app/fchg/fchg_api.h src/cs/drivers/drv_app/fchg/fchg_common.h src/cs/drivers/drv_app/fchg/fchg_env.c src/cs/drivers/drv_app/fchg/fchg_env.h src/cs/drivers/drv_app/fchg/fchg_messages.h src/cs/drivers/drv_app/fchg/fchg_pool_size.h src/cs/drivers/drv_app/fchg/fchg_struct.h
diffstat 7 files changed, 292 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_api.h	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,26 @@
+/*
+ * This header file defines the external API of the FCHG SWE,
+ * callable from other tasks such as UI or AT commands.
+ */
+
+#ifndef __FCHG_API_H
+#define __FCHG_API_H
+
+#include "rv/rv_general.h"
+#include "fchg/fchg_common.h"
+
+enum fchg_user_charge_ctrl {
+	FCHG_CHARGE_STOP	= 0,
+	FCHG_CHARGE_START	= 1
+};
+
+struct fchg_user_state {
+	enum fchg_state	chg_state;
+	UINT16		batt_mv;
+	T_PWR_PERCENT	batt_percent;
+};
+
+T_RV_RET fchg_user_charge_control(enum fchg_user_charge_ctrl);
+T_RV_RET fchg_get_current_state(struct fchg_user_state *);
+
+#endif	/* include guard */
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_common.h	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,24 @@
+/*
+ * The definitions in this header file are used both in the external API
+ * and in the internal structures.
+ */
+
+#ifndef __FCHG_COMMON_H
+#define __FCHG_COMMON_H
+
+enum fchg_state {
+	FCHG_STATE_NO_EXT_PWR = 0,
+	FCHG_STATE_PWR_PLUG_TIMER,
+	FCHG_STATE_READY_TO_CHARGE,
+	FCHG_STATE_READY_TO_RECHARGE,
+	FCHG_STATE_I2V_CAL_1,
+	FCHG_STATE_I2V_CAL_2,
+	FCHG_STATE_CI_CHARGING,
+	FCHG_STATE_CV_CHARGING,
+	FCHG_STATE_NO_CHARGING
+};
+
+/* from original PWR SWE */
+typedef UINT8 T_PWR_PERCENT;
+
+#endif	/* include guard */
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_env.c	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,108 @@
+/*
+ * This module provides the glue to the RiViera environment
+ * for our FCHG SWE.
+ */
+
+#include "fchg/fchg_env.h"
+#include "rv/rv_general.h"
+#include "rvm/rvm_priorities.h"
+#include "rvm/rvm_api.h"
+#include "rvm/rvm_use_id_list.h"
+#include <string.h>
+
+/* Define a pointer to the PWR environment control block */
+T_PWR_CTRL_BLOCK *pwr_ctrl = NULL;
+
+/* Define global pointer to the error function */
+static T_RVM_RETURN (*pwr_error_ft) (T_RVM_NAME    swe_name,
+                                     T_RVM_RETURN  error_cause,
+                                     T_RVM_ERROR_TYPE  error_type,
+                                     T_RVM_STRING   error_msg);
+
+T_RVM_RETURN fchg_get_info (T_RVM_INFO_SWE  *infoSWE)
+{
+   /* SWE info */
+
+   infoSWE->swe_type = RVM_SWE_TYPE_4;
+   infoSWE->type_info.type4.swe_use_id = FCHG_USE_ID;
+   memcpy( infoSWE->type_info.type4.swe_name, "FCHG", 5 );
+
+   infoSWE->type_info.type4.stack_size = FCHG_STACK_SIZE;
+   infoSWE->type_info.type4.priority   = RVM_LCC_TASK_PRIORITY;
+
+   /* memory bank info */
+   infoSWE->type_info.type4.nb_mem_bank = 1;
+
+   memcpy ((UINT8 *) infoSWE->type_info.type4.mem_bank[0].bank_name, "FCHG_PRIM", 10);
+   infoSWE->type_info.type4.mem_bank[0].initial_params.size          = FCHG_MB_PRIM_SIZE;
+   infoSWE->type_info.type4.mem_bank[0].initial_params.watermark     = FCHG_MB_PRIM_WATERMARK;
+
+   /* linked SWE info: we use FFS */
+   infoSWE->type_info.type4.nb_linked_swe    = 1;
+   infoSWE->type_info.type4.linked_swe_id[0] = FFS_USE_ID;
+
+   /* generic functions */
+   infoSWE->type_info.type4.set_info = fchg_set_info;
+   infoSWE->type_info.type4.init     = fchg_init;
+   infoSWE->type_info.type4.core     = fchg_core;
+   infoSWE->type_info.type4.stop     = fchg_stop;
+   infoSWE->type_info.type4.kill     = fchg_kill;
+
+   /* Set the return path */
+   infoSWE->type_info.type4.return_path.callback_func	= NULL;
+   infoSWE->type_info.type4.return_path.addr_id	      = 0;
+
+   return RV_OK;
+}
+
+T_RVM_RETURN fchg_set_info(T_RVF_ADDR_ID   addr_id,
+                           T_RV_RETURN     return_path[],
+                           T_RVF_MB_ID     mbId[],
+                           T_RVM_RETURN  (*callBackFct) (T_RVM_NAME SWEntName,
+                                                         T_RVM_RETURN errorCause,
+                                                         T_RVM_ERROR_TYPE errorType,
+                                                         T_RVM_STRING errorMsg))
+{
+
+    T_RVF_MB_STATUS   mb_status;
+
+    mb_status = rvf_get_buf(mbId[0],sizeof(T_PWR_CTRL_BLOCK),(void **) &pwr_ctrl);
+    if (mb_status == RVF_RED) 
+    {
+        rvf_send_trace("fchg_set_info: rvf_get_buf() failed", 35,
+                       NULL_PARAM,
+                       RV_TRACE_LEVEL_ERROR,
+                       FCHG_USE_ID);
+        return (RVM_MEMORY_ERR);
+    }
+    memset(pwr_ctrl, 0, sizeof(T_PWR_CTRL_BLOCK));
+
+    /* store the pointer to the error function */
+    pwr_error_ft = callBackFct ;
+
+    /* Store the addr id */
+    pwr_ctrl->addr_id = addr_id;
+
+    /* Store the memory bank id */
+    pwr_ctrl->prim_id = mbId[0];
+
+    return RV_OK;
+}
+
+T_RVM_RETURN fchg_init(void)
+{
+   return RV_OK;
+}
+
+T_RVM_RETURN fchg_stop(void)
+{
+   return RV_OK;
+}
+
+T_RVM_RETURN fchg_kill(void)
+{
+   /* free all memory buffer previously allocated */
+   rvf_free_buf ((void *) pwr_ctrl);
+
+   return RV_OK;
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_env.h	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,40 @@
+/*
+ * RiViera environment boilerplate header for the FCHG SWE
+ */
+
+#ifndef __FCHG_ENV_H__
+#define __FCHG_ENV_H__
+
+#include "rvm/rvm_gen.h"
+#include "fchg/fchg_struct.h"
+#include "fchg/fchg_pool_size.h"
+
+#define FCHG_MAILBOX_USED   RVF_TASK_MBOX_1
+
+/* memory bank size and watermark */
+#define FCHG_MB_PRIM_SIZE            FCHG_MB1_SIZE
+#define FCHG_MB_PRIM_WATERMARK 	    (FCHG_MB_PRIM_SIZE)
+
+#define FCHG_MB_PRIM_INC_SIZE        0
+#define FCHG_MB_PRIM_INC_WATERMARK   0
+
+extern T_PWR_CTRL_BLOCK *pwr_ctrl;
+
+/* Prototypes */
+
+T_RVM_RETURN fchg_get_info (T_RVM_INFO_SWE  *infoSWE);
+
+T_RVM_RETURN fchg_set_info(T_RVF_ADDR_ID  addr_id,
+                           T_RV_RETURN    return_path[],
+                           T_RVF_MB_ID    mbId[],
+                           T_RVM_RETURN   (*callBackFct) (T_RVM_NAME SWEntName,
+                           T_RVM_RETURN errorCause,
+                           T_RVM_ERROR_TYPE errorType,
+                           T_RVM_STRING errorMsg));
+
+T_RVM_RETURN fchg_init (void);
+T_RVM_RETURN fchg_core (void);
+T_RVM_RETURN fchg_stop (void);
+T_RVM_RETURN fchg_kill (void);
+
+#endif	/* include guard */
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_messages.h	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,33 @@
+/*
+ * In this header file we are going to define the messages
+ * that can be sent to the FCHG task.
+ */
+
+#ifndef __FCHG_MESSAGES_H
+#define __FCHG_MESSAGES_H
+
+#include "rv/rv_general.h"
+
+// Request mail
+struct pwr_req_s {
+     T_RV_HDR header;
+};
+
+// Indication mail with ADC measurements
+struct pwr_adc_ind_s {
+     T_RV_HDR header;
+     unsigned short data[9+1]; // ADC measurements + status of VRPCSTS register
+};
+
+// Message IDs for all PWR module messages
+enum pwr_msg_id {
+	/* message types new to FCHG */
+	USER_START_CHARGE_REQ	= 1,
+	USER_STOP_CHARGE_REQ,
+	/* messages sent to us by SPI task, same as TI's LCC */
+	PWR_CHARGER_PLUGGED_IND  = 40,
+	PWR_CHARGER_UNPLUGGED_IND,
+	PWR_ADC_IND = 90
+};
+
+#endif
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_pool_size.h	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,13 @@
+/*
+ * Pool size definition required for every RiViera SWE
+ * The present FCHG version is based on TI's LCC
+ */
+
+#ifndef __FCHG_POOL_SIZE_H_
+#define __FCHG_POOL_SIZE_H_
+
+#define FCHG_STACK_SIZE (1024)
+#define FCHG_MB1_SIZE   (2048)
+ 
+#define FCHG_POOL_SIZE  (FCHG_STACK_SIZE + FCHG_MB1_SIZE)
+#endif
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_struct.h	Mon Dec 04 05:55:58 2017 +0000
@@ -0,0 +1,48 @@
+/*
+ * Internal structure definitions for the FCHG SWE reside here.
+ * abb_inth.c will also need to include this header in order to
+ * get our T_PWR_CTRL_BLOCK definition.
+ */
+
+#ifndef __FCHG_STRUCT_H
+#define __FCHG_STRUCT_H
+
+#include "rv/rv_general.h"
+#include "rvf/rvf_api.h"
+#include "fchg/fchg_common.h"
+
+struct charging_config {
+	UINT16	start_delay;
+	UINT16	start_thresh;
+	UINT16	restart_thresh;
+	UINT16	charge_to_mv;
+	UINT16	overvoltage;
+	UINT16	ci_current;
+	UINT16	end_current;
+	UINT16	bciconf;
+};
+
+/* from original PWR SWE */
+typedef struct {
+	UINT16		bat_voltage;
+	T_PWR_PERCENT	remain_capa;
+} T_PWR_THRESHOLDS;
+
+#define	MAX_THRESHOLDS	101
+
+typedef struct {
+	/* RiViera boilerplate */
+	T_RVF_ADDR_ID		addr_id;
+	T_RVF_MB_ID		prim_id;
+	/* configuration */
+	struct charging_config	config;
+	BOOL			config_present;
+	T_PWR_THRESHOLDS	batt_thresholds[MAX_THRESHOLDS];
+	UINT16			nb_thresholds;
+	/* state */
+	enum fchg_state		state;
+	UINT16			batt_mv;
+	T_PWR_PERCENT		curr_percent;
+} T_PWR_CTRL_BLOCK;
+
+#endif	/* include guard */