FreeCalypso > hg > fc-magnetite
annotate src/cs/drivers/drv_app/ffs/board/drv.c @ 542:b48e9892ee65
FFS dev.c: Mot C155 flash turns out to be of the same kind as on TI's D-Sample
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 06 Nov 2018 16:30:16 +0000 |
parents | 204d6866901b |
children | 7aad22344e77 |
rev | line source |
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1 /****************************************************************************** |
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2 * Flash File System (ffs) |
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3 * Idea, design and coding by Mads Meisner-Jensen, mmj@ti.com |
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4 * |
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5 * ffs low level flash driver |
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6 * |
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7 * $Id: drv.c 1.30.1.6.1.51.1.1.1.13.1.11 Tue, 06 Jan 2004 14:36:52 +0100 tsj $ |
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8 * |
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9 ******************************************************************************/ |
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10 |
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11 #ifndef TARGET |
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12 #include "ffs.cfg" |
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13 #endif |
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14 |
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15 #include "ffs/ffs.h" |
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16 #include "ffs/board/drv.h" |
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17 #include "ffs/board/ffstrace.h" |
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18 |
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19 #if (TARGET == 0) |
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20 |
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21 #ifdef WIN32 |
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22 #include "windows.h" |
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23 #else //WIN32 |
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24 #include "sys/mman.h" |
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25 #include "unistd.h" |
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26 #endif //WIN32 |
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27 |
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28 #include "stdio.h" |
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29 #include "sys/types.h" |
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30 #include "sys/stat.h" |
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31 #include "fcntl.h" |
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32 #else |
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33 #include "nucleus.h" |
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34 |
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35 #endif |
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36 |
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37 |
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38 // Note that all code notes and comments pertaining to single-bank flash |
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39 // drivers are located in the AMD SB driver (amdsbdrv.c). Consider this as |
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40 // the reference. |
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41 |
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42 |
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43 /****************************************************************************** |
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44 * Globals |
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45 ******************************************************************************/ |
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46 |
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47 #if (TARGET == 1) |
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48 // NOTE: This is the size in bytes of the single-bank driver code that is |
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49 // copied to RAM. The only way to determine the amount of memory needed is |
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50 // to look into the linker output file (.map) or the assembler output of |
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51 // both amdsbdrv.obj and intelsbdrv.obj files. |
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52 #define FFSDRV_CODE_SIZE (0x200) |
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53 |
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54 uint8 ffsdrv_code[FFSDRV_CODE_SIZE]; |
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55 |
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56 #endif |
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57 |
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58 #define INTEL_UNLOCK_SLOW 1 |
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59 |
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60 struct dev_s dev; |
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61 struct ffsdrv_s ffsdrv; |
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62 |
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63 uint32 int_disable(void); |
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64 void int_enable(uint32 tmp); |
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65 |
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66 /****************************************************************************** |
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67 * Macros |
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68 ******************************************************************************/ |
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69 |
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70 #define addr2offset(address) ( (int) (address) - (int) dev.base ) |
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71 |
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72 |
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73 /****************************************************************************** |
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74 * Generic Driver Functions |
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75 ******************************************************************************/ |
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76 |
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77 void ffsdrv_generic_write(void *dst, const void *src, uint16 size) |
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78 { |
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79 uint8 *mydst = dst; |
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80 const uint8 *mysrc = src; |
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81 |
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82 if (size > 0) |
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83 { |
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84 if ((unsigned int) mydst & 1) { |
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85 ffsdrv_write_byte(mydst++, *mysrc++); |
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86 size--; |
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87 } |
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88 while (size >= 2) { |
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89 ffsdrv.write_halfword((uint16 *) mydst, |
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90 mysrc[0] | (mysrc[1] << 8)); |
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91 size -= 2; |
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92 mysrc += 2; |
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93 mydst += 2; |
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94 } |
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95 if (size == 1) |
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96 ffsdrv_write_byte(mydst++, *mysrc++); |
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97 } |
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98 } |
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99 |
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100 |
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101 /****************************************************************************** |
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102 * AMD Single Bank Driver Functions |
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103 ******************************************************************************/ |
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104 |
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105 #if (TARGET == 1) |
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106 |
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107 // Forward declaration of functions in file amdsbdrv.c |
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108 void ffsdrv_ram_amd_sb_write_halfword(volatile uint16 *addr, uint16 value); |
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109 void ffsdrv_ram_amd_sb_erase(uint8 block); |
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110 |
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111 #else // (TARGET == 0) |
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112 |
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113 // On PC these functions are empty |
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114 void ffsdrv_ram_amd_sb_write_halfword(volatile uint16 *addr, uint16 value) {} |
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115 void ffsdrv_ram_amd_sb_erase(uint8 block) {} |
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116 |
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117 #endif // (TARGET == 1) |
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118 |
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119 |
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120 /****************************************************************************** |
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121 * AMD Pseudo Single Bank Driver Functions |
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122 ******************************************************************************/ |
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123 |
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124 // This is a pseudo single-bank flash driver. It simulates a single-bank |
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125 // flash device on a dual-bank device. |
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126 |
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127 #if (TARGET == 1) |
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128 |
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129 void ffsdrv_amd_pseudo_sb_write_halfword(volatile uint16 *addr, uint16 value) |
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130 { |
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131 volatile char *flash = dev.base; |
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132 uint32 cpsr, i, x; |
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133 |
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134 ttw(ttr(TTrDrvWrite, "wh(%x,%x)" NL, addr, value)); |
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135 |
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136 if (~*addr & value) { |
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137 ttw(ttr(TTrFatal, "wh(%x,%x->%x) fatal" NL, addr, *addr, value)); |
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138 return; |
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139 } |
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140 |
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141 cpsr = int_disable(); |
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142 tlw(led_on(LED_WRITE)); |
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143 |
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144 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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145 flash[0x5555] = 0x55; // unlock cycle 2 |
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146 flash[0xAAAA] = 0xA0; |
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147 *addr = value; |
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148 |
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149 while ((*dev.addr ^ dev.data) & 0x80) |
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150 ; |
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151 |
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152 tlw(led_off(LED_WRITE)); |
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153 int_enable(cpsr); |
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154 } |
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155 |
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156 // This VERY simple way of erase suspending only works because we run under |
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157 // a pre-emptive operating system, so whenever an interrupt occurs, another |
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158 // task takes the CPU, and at the end of the interrupt, FFS gets the CPU |
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159 // again. |
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160 void ffsdrv_amd_pseudo_sb_erase(uint8 block) |
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161 { |
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162 volatile char *flash = dev.base; |
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163 volatile char *addr; |
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164 uint32 cpsr; |
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165 uint16 flashpoll; |
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166 |
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167 addr = block2addr(block); |
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168 |
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169 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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170 |
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171 cpsr = int_disable(); |
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172 tlw(led_on(LED_ERASE)); |
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173 |
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174 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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175 flash[0x5555] = 0x55; // unlock cycle 2 |
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176 flash[0xAAAA] = 0x80; |
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177 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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178 flash[0x5555] = 0x55; // unlock cycle 2 |
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179 *addr = 0x30; // AMD erase sector command |
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180 |
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181 // Wait for erase to finish. |
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182 while ((*addr & 0x80) == 0) { |
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183 tlw(led_toggle(LED_ERASE)); |
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184 // Poll interrupts, taking interrupt mask into account. |
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185 if (INT_REQUESTED) |
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186 { |
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187 // 1. suspend erase |
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188 // 2. enable interrupts |
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189 // .. now the interrupt code executes |
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190 // 3. disable interrupts |
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191 // 4. resume erase |
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192 |
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193 tlw(led_on(LED_ERASE_SUSPEND)); |
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194 *addr = 0xB0; |
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195 |
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196 // wait for erase suspend to finish |
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197 while ((*addr & 0x80) == 0) |
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198 ; |
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199 |
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200 tlw(led_off(LED_ERASE_SUSPEND)); |
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201 int_enable(cpsr); |
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202 |
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203 // Other interrupts and tasks run now... |
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204 |
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205 cpsr = int_disable(); |
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206 tlw(led_on(LED_ERASE_SUSPEND)); |
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207 |
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208 // Before resuming erase we must? check if the erase is really |
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209 // suspended or if it did finish |
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210 flashpoll = *addr; |
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211 *addr = 0x30; |
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212 |
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213 tlw(led_off(LED_ERASE_SUSPEND)); |
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214 } |
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215 } |
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216 |
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217 tlw(led_on(LED_ERASE)); |
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218 tlw(led_off(LED_ERASE)); |
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219 int_enable(cpsr); |
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220 } |
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221 |
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222 #else // (TARGET == 0) |
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223 |
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224 void ffsdrv_amd_pseudo_sb_write_halfword(volatile uint16 *addr, uint16 value) {} |
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225 void ffsdrv_amd_pseudo_sb_erase(uint8 block) {} |
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226 |
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227 #endif // (TARGET == 1) |
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228 |
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229 |
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230 /****************************************************************************** |
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231 * AMD Dual/Multi Bank Driver Functions |
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232 ******************************************************************************/ |
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233 |
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234 // All erase and write operations are performed atomically (interrupts |
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235 // disabled). Otherwise we cannot trust the value of dev.state and we cannot |
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236 // determine exactly how many of the command words have already been |
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237 // written. |
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238 |
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239 // in ffs_end() when we resume an erasure that was previously suspended, how |
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240 // does that affect multiple tasks doing that simultaneously? |
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241 |
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242 void ffsdrv_amd_write_end(void); |
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243 void ffsdrv_amd_erase_end(void); |
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244 |
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245 void ffsdrv_amd_write_halfword(volatile uint16 *addr, uint16 value) |
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246 { |
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247 volatile uint16 *flash = (volatile uint16 *)dev.base; |
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248 uint32 cpsr; |
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249 |
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250 tlw(led_on(LED_WRITE)); |
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251 ttw(ttr(TTrDrvWrite, "wh(%x,%x)" NL, addr, value)); |
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252 |
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253 dev.addr = addr; |
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254 dev.data = value; |
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255 |
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256 if (~*addr & value) { |
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257 ttw(ttr(TTrFatal, "wh(%x,%x->%x) fatal" NL, addr, *addr, value)); |
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258 return; |
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259 } |
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260 |
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261 cpsr = int_disable(); |
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262 tlw(led_toggle(LED_WRITE_SUSPEND)); |
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263 dev.state = DEV_WRITE; |
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264 flash[0x555] = 0xAA; // unlock cycle 1 |
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265 flash[0x2AA] = 0x55; // unlock cycle 2 |
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266 flash[0x555] = 0xA0; |
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267 *addr = value; |
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268 int_enable(cpsr); |
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269 tlw(led_toggle(LED_WRITE_SUSPEND)); |
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270 |
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271 ffsdrv_amd_write_end(); |
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272 } |
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273 |
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274 void ffsdrv_amd_write(void *dst, const void *src, uint16 size) |
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275 { |
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276 uint8 *mydst = dst; |
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277 const uint8 *mysrc = src; |
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278 |
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279 if (size > 0) |
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280 { |
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281 if ((unsigned int) mydst & 1) { |
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282 ffsdrv_write_byte(mydst++, *mysrc++); |
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283 size--; |
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284 } |
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285 while (size >= 2) { |
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286 ffsdrv_amd_write_halfword((uint16 *) mydst, |
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287 mysrc[0] | (mysrc[1] << 8)); |
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288 size -= 2; |
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289 mysrc += 2; |
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290 mydst += 2; |
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291 } |
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292 if (size == 1) |
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293 ffsdrv_write_byte(mydst++, *mysrc++); |
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294 } |
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295 } |
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296 |
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297 void ffsdrv_amd_write_end(void) |
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298 { |
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299 while ((*dev.addr ^ dev.data) & 0x80) |
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300 tlw(led_toggle(LED_WRITE_SUSPEND)); |
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301 |
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302 dev.state = DEV_READ; |
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303 |
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304 tlw(led_off(LED_WRITE)); |
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305 } |
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306 |
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307 void ffsdrv_amd_erase(uint8 block) |
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308 { |
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309 volatile uint16 *flash = (volatile uint16 *)dev.base; |
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310 uint32 cpsr; |
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311 |
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312 tlw(led_on(LED_ERASE)); |
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313 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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314 |
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315 dev.addr = (uint16 *) block2addr(block); |
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316 |
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317 cpsr = int_disable(); |
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318 dev.state = DEV_ERASE; |
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319 flash[0x555] = 0xAA; // unlock cycle 1 |
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320 flash[0x2AA] = 0x55; // unlock cycle 2 |
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321 flash[0x555] = 0x80; |
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322 flash[0x555] = 0xAA; // unlock cycle 1 |
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323 flash[0x2AA] = 0x55; // unlock cycle 2 |
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324 *dev.addr = 0x30; // AMD erase sector command |
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325 int_enable(cpsr); |
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326 |
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327 ffsdrv_amd_erase_end(); |
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328 } |
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329 |
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330 void ffsdrv_amd_erase_end(void) |
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331 { |
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332 while ((*dev.addr & 0x80) == 0) |
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333 ; |
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334 |
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335 dev.state = DEV_READ; |
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336 |
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337 tlw(led_off(LED_ERASE)); |
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338 } |
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339 |
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340 void ffsdrv_amd_erase_suspend(void) |
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341 { |
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342 uint32 cpsr; |
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343 |
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344 tlw(led_on(LED_ERASE_SUSPEND)); |
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345 ttw(str(TTrDrvErase, "es" NL)); |
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346 |
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347 // if erase has finished then all is ok |
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348 if (*dev.addr & 0x80) { |
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349 ffsdrv_amd_erase_end(); |
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350 tlw(led_off(LED_ERASE_SUSPEND)); |
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351 return; |
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352 } |
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353 |
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354 // NOTEME: As there is no way to be absolutely certain that erase |
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355 // doesn't finish between last poll and the following erase suspend |
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356 // command, we assume that the erase suspend is safe even though the |
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357 // erase IS actually already finished. |
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358 |
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359 cpsr = int_disable(); |
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360 dev.state = DEV_ERASE_SUSPEND; |
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361 *dev.addr = 0xB0; |
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362 |
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363 // Wait for erase suspend to finish |
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364 while ((*dev.addr & 0x80) == 0) |
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365 ; |
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366 |
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367 int_enable(cpsr); |
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368 } |
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369 |
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370 void ffsdrv_amd_erase_resume(void) |
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371 { |
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372 uint32 cpsr; |
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373 |
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374 ttw(str(TTrDrvErase, "er" NL)); |
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375 |
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376 // NOTEME: See note in erase_suspend()... We assume that the erase |
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377 // resume is safe even though the erase IS actually already finished. |
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378 cpsr = int_disable(); |
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379 dev.state = DEV_ERASE; |
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380 *dev.addr = 0x30; |
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381 int_enable(cpsr); |
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382 |
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383 tlw(led_off(LED_ERASE_SUSPEND)); |
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384 } |
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385 |
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386 |
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387 /****************************************************************************** |
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388 * SST Dual/Multi Bank Driver Functions |
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389 ******************************************************************************/ |
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390 |
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391 // SST flashes use almost same command set as AMD flashes. Only the command |
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392 // addresses (4 more bits) and erase command data (0x50 instead of 0x30) are |
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393 // different. SST flashes have no erase suspend/resume commands because they |
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394 // are so fast at erasing! |
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395 |
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396 void ffsdrv_sst_write_end(void); |
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397 void ffsdrv_sst_erase_end(void); |
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398 |
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399 void ffsdrv_sst_write(void *dst, const void *src, uint16 size) |
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400 { |
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401 uint8 *mydst = dst; |
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402 const uint8 *mysrc = src; |
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403 |
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404 if (size > 0) |
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405 { |
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406 if ((unsigned int) mydst & 1) { |
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407 ffsdrv_write_byte(mydst++, *mysrc++); |
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408 size--; |
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409 } |
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410 while (size >= 2) { |
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411 ffsdrv_amd_write_halfword((uint16 *) mydst, |
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412 mysrc[0] | (mysrc[1] << 8)); |
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413 size -= 2; |
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414 mysrc += 2; |
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415 mydst += 2; |
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416 } |
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417 if (size == 1) |
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418 ffsdrv_write_byte(mydst++, *mysrc++); |
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419 } |
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420 } |
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421 |
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422 // Note that SST flashes have smaller sectors than other flash families. |
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423 // Fortunately they support erasure of several of these sectors in a logical |
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424 // unit called a "block". |
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425 void ffsdrv_sst_erase(uint8 block) |
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426 { |
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427 volatile char *flash = dev.base; |
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428 uint32 cpsr; |
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429 |
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430 tlw(led_on(LED_ERASE)); |
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431 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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432 |
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433 dev.addr = (uint16 *) block2addr(block); |
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434 |
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435 cpsr = int_disable(); |
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436 dev.state = DEV_ERASE; |
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437 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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438 flash[0x5555] = 0x55; // unlock cycle 2 |
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439 flash[0xAAAA] = 0x80; |
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440 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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441 flash[0x5555] = 0x55; // unlock cycle 2 |
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442 *dev.addr = 0x50; // SST erase block command |
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443 int_enable(cpsr); |
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444 |
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445 ffsdrv_sst_erase_end(); |
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446 } |
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447 |
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448 void ffsdrv_sst_erase_end(void) |
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449 { |
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450 // Wait for erase end |
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451 while ((*dev.addr & 0x80) == 0) |
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452 ; |
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453 |
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454 dev.state = DEV_READ; |
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455 |
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456 tlw(led_off(LED_ERASE)); |
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457 } |
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458 |
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459 // Erase suspend/resume commands do not exist for SST flashes, so we just |
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460 // poll for the end of the erase operation... |
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461 |
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462 void ffsdrv_sst_erase_suspend(void) |
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463 { |
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464 ttw(str(TTrDrvErase, "es" NL)); |
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465 |
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466 ffsdrv_sst_erase_end(); |
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467 } |
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468 |
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469 |
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470 /****************************************************************************** |
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471 * Intel Single Bank Driver Functions |
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472 ******************************************************************************/ |
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473 |
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474 #if (TARGET == 1) |
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475 |
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476 // Forward declaration of functions in file intelsbdrv.c |
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477 int ffsdrv_ram_intel_sb_init(void); |
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478 void ffsdrv_ram_intel_sb_write_halfword(volatile uint16 *addr, uint16 value); |
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479 void ffsdrv_ram_intel_sb_erase(uint8 block); |
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480 void ffsdrv_ram_intel_erase(uint8 block); |
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481 |
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482 #else // (TARGET == 0) |
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483 |
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484 // On PC these functions are empty |
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485 void ffsdrv_ram_intel_sb_write_halfword(volatile uint16 *addr, uint16 value) {} |
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486 void ffsdrv_ram_intel_sb_erase(uint8 block) {} |
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487 void ffsdrv_ram_intel_erase(uint8 block) {} |
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488 |
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489 #endif // (TARGET == 1) |
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490 |
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491 |
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492 /****************************************************************************** |
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493 * Intel Dual/Multi Bank Driver Functions |
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494 ******************************************************************************/ |
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495 |
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496 void ffsdrv_intel_write_end(void); |
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497 void ffsdrv_intel_erase_end(void); |
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498 |
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499 |
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500 // ffsdrv_intel_write_halfword and ffsdrv_intel_write_end is not used |
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501 // because of the bug in the intel flash device. Instead is the functions |
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502 // ffsdrv_ram_intel_sb_write_halfword and ffsdrv_ram_intel_erase used. |
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503 void ffsdrv_intel_write_halfword(volatile uint16 *addr, uint16 value) |
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504 { |
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505 uint32 cpsr; |
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506 |
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507 tlw(led_on(LED_WRITE)); |
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508 ttw(ttr(TTrDrvWrite, "wh(%x,%x)" NL, addr, value)); |
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509 |
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510 dev.addr = addr; |
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511 |
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512 if (~*addr & value) { |
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513 ttw(ttr(TTrFatal, "wh(%x,%x->%x) fatal" NL, addr, *addr, value)); |
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514 return; |
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515 } |
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516 |
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517 cpsr = int_disable(); |
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518 dev.state = DEV_WRITE; |
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519 |
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520 #if (INTEL_UNLOCK_SLOW == 1) |
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521 *addr = 0x60; // Intel Config setup |
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522 *addr = 0xD0; // Intel Unlock block |
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523 *addr = 0x50; // Intel Clear Status Register |
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524 #endif |
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525 |
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526 *addr = 0x40; // Intel program byte/word |
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527 *addr = value; |
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528 |
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529 int_enable(cpsr); |
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530 |
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531 ffsdrv_intel_write_end(); |
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532 } |
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533 |
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534 void ffsdrv_intel_write(void *dst, const void *src, uint16 size) |
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535 { |
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536 uint8 *mydst = dst; |
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537 const uint8 *mysrc = src; |
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538 |
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539 if (size > 0) |
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540 { |
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541 if ((unsigned int) mydst & 1) { |
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542 ffsdrv_write_byte(mydst++, *mysrc++); |
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543 size--; |
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544 } |
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545 while (size >= 2) { |
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546 ffsdrv_intel_write_halfword((uint16 *) mydst, |
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547 mysrc[0] | (mysrc[1] << 8)); |
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548 size -= 2; |
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549 mysrc += 2; |
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550 mydst += 2; |
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551 } |
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552 if (size == 1) |
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553 ffsdrv_write_byte(mydst++, *mysrc++); |
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554 } |
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555 } |
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556 |
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557 void ffsdrv_intel_write_end(void) |
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558 { |
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559 uint32 cpsr; |
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560 // We can be interrupted and reentered thus the state can have been changed. |
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561 while ((*dev.addr & 0x80) == 0 && dev.state == DEV_WRITE) |
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562 ; |
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563 |
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564 // The flash state and dev.state must be in sync thus the stat changes |
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565 // must be protect from being interrupted |
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566 cpsr = int_disable(); |
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567 *dev.addr = 0xFF; // Intel read array |
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568 dev.state = DEV_READ; |
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569 int_enable(cpsr); |
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570 |
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571 tlw(led_off(LED_WRITE)); |
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572 } |
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573 |
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574 |
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575 void ffsdrv_intel_erase(uint8 block) |
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576 { |
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577 uint32 cpsr; |
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578 |
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579 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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580 tlw(led_on(LED_ERASE)); |
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581 |
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582 dev.addr = (uint16 *) block2addr(block); |
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583 |
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584 cpsr = int_disable(); |
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585 dev.state = DEV_ERASE; |
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586 |
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587 #if (INTEL_UNLOCK_SLOW == 1) |
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588 *dev.addr = 0x60; // Intel Config setup |
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589 *dev.addr = 0xD0; // Intel Unlock block |
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590 #endif |
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591 |
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592 *dev.addr = 0x50; // Intel clear status register (not really necessary) |
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593 *dev.addr = 0x20; // Intel erase setup |
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594 *dev.addr = 0xD0; // Intel erase confirm |
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595 |
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596 int_enable(cpsr); |
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597 |
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598 ffsdrv_intel_erase_end(); |
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599 } |
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600 |
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601 void ffsdrv_intel_erase_end(void) |
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602 { |
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603 while ((*dev.addr & 0x80) == 0 && dev.state == DEV_ERASE) |
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604 ; |
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605 |
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606 *dev.addr = 0xFF; // Intel read array |
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607 |
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608 dev.state = DEV_READ; |
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609 tlw(led_off(LED_ERASE)); |
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610 } |
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611 |
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612 void ffsdrv_intel_erase_suspend(void) |
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613 { |
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614 uint32 cpsr; |
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615 uint16 poll; |
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616 |
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617 ttw(str(TTrDrvErase, "es" NL)); |
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618 tlw(led_on(LED_ERASE_SUSPEND)); |
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619 |
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620 cpsr = int_disable(); |
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621 dev.state = DEV_ERASE_SUSPEND; |
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622 *dev.addr = 0xB0; // Intel Erase Suspend |
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623 *dev.addr = 0x70; // Intel Read Status Register |
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624 while (((poll = *dev.addr) & 0x80) == 0) |
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625 ; |
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626 |
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627 if ((poll & 0x40) == 0) { |
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628 // Block erase has completed |
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629 tlw(led_off(LED_ERASE_SUSPEND)); |
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630 dev.state = DEV_READ; |
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631 tlw(led_off(LED_ERASE)); |
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632 } |
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633 *dev.addr = 0xFF; // Intel read array |
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634 int_enable(cpsr); |
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635 } |
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636 |
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637 void ffsdrv_intel_erase_resume(void) |
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638 { |
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639 uint32 cpsr; |
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640 |
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641 ttw(str(TTrDrvErase, "er" NL)); |
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642 |
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643 cpsr = int_disable(); |
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644 dev.state = DEV_ERASE; |
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645 *dev.addr = 0xD0; // Intel erase resume |
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646 |
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647 // The following "extra" Read Status command is required because Intel |
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648 // has changed the specification of the W30 flash! (See "1.8 Volt Intel® |
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649 // Wireless Flash Memory with 3 Volt I/O 28F6408W30, 28F640W30, |
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650 // 28F320W30 Specification Update") |
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651 *dev.addr = 0x70; // Intel Read Status Register |
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652 |
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653 int_enable(cpsr); |
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654 |
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655 tlw(led_off(LED_ERASE_SUSPEND)); |
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656 } |
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657 |
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658 |
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659 /****************************************************************************** |
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660 * RAM Family Functions |
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661 ******************************************************************************/ |
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662 |
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663 void ffsdrv_ram_write_halfword(volatile uint16 *dst, uint16 value) |
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664 { |
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665 *dst = value; |
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666 } |
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667 |
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668 void ffsdrv_ram_write(void *dst, const void *src, uint16 size) |
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669 { |
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670 uint8 *mydst = dst; |
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671 const uint8 *mysrc = src; |
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672 |
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673 if (size == 0) |
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674 return; |
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675 else if (size == 1) |
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676 ffsdrv_write_byte(mydst, *mysrc); |
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677 else { |
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678 if ((int) mydst & 1) { |
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679 ffsdrv_write_byte(mydst++, *mysrc++); |
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680 size--; |
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681 } |
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682 while (size >= 2) { |
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683 ffsdrv_ram_write_halfword((uint16 *) mydst, mysrc[0]|(mysrc[1] << 8)); |
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684 size -= 2; |
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685 mysrc += 2; |
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686 mydst += 2; |
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687 } |
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|
688 if (size == 1) |
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|
689 ffsdrv_write_byte(mydst++, *mysrc++); |
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690 } |
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|
691 } |
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692 |
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|
693 void ffsdrv_ram_erase(uint8 block) |
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694 { |
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695 int i; |
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696 char *addr; |
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parents:
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697 |
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698 addr = block2addr(block); |
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|
699 |
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700 for (i = 0; i < (1 << dev.binfo[block].size_ld); i++) { |
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parents:
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701 *addr++ = 0xFF; |
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parents:
diff
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|
702 } |
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703 } |
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Mychaela Falconia <falcon@freecalypso.org>
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|
704 |
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|
705 /****************************************************************************** |
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706 * Void Functions |
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|
707 ******************************************************************************/ |
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parents:
diff
changeset
|
708 |
945cf7f506b2
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parents:
diff
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|
709 int ffsdrv_null_init(void) |
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parents:
diff
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|
710 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
711 ttw(ttr(TTrDrvOther, "ffsdrv_null_init()" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
712 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
713 return 0; |
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parents:
diff
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|
714 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
715 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
716 void ffsdrv_null_erase(uint8 block) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 { |
945cf7f506b2
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parents:
diff
changeset
|
718 ttw(ttr(TTrDrvErase, "ffsdrv_null_erase(%d)" NL, block)); |
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parents:
diff
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|
719 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
720 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
721 void ffsdrv_null_write_halfword(volatile uint16 *addr, uint16 value) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
722 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 ttw(ttr(TTrDrvWrite, "ffsdrv_null_write_halfword(0x%x, 0x%x)" NL, addr, value)); |
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parents:
diff
changeset
|
724 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 void ffsdrv_null_write(void *dst, const void *src, uint16 size) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 ttw(ttr(TTrDrvWrite, "ffsdrv_null_write(0x%x, 0x%x, %d)" NL, dst, src, size)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
731 void ffsdrv_null_erase_suspend(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 ttw(str(TTrDrvErase, "ffsdrv_null_erase_suspend()" NL)); |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 void ffsdrv_null_erase_resume(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 ttw(str(TTrDrvErase, "ffsdrv_null_erase_resume()" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 void ffsdrv_null_write_end(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 ttw(str(TTrDrvWrite, "ffsdrv_null_write_end()" NL)); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 void ffsdrv_null_erase_end(void) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 ttw(str(TTrDrvErase, "ffsdrv_null_erase_end()" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 /****************************************************************************** |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753 * Test Driver Functions |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 ******************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 #if (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 static char *image_addr = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 static int image_size = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 #ifdef WIN32 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 HANDLE image_fd, map_fd; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 #else //WIN32 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
763 static int image_fd = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
764 #endif //WIN32 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
765 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
766 extern int arg_removeimage; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 extern char *arg_imagename; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
768 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 extern void test_fatal_printf(char *format, ...); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
770 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 void ffsdrv_write_check(char *addr, int size) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 offset_t offset, last; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 offset = addr2offset(addr); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 last = dev.binfo[dev.numblocks-1].offset |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777 + (1 << dev.binfo[dev.numblocks-1].size_ld); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 if (offset < 0 || (offset + size) > last) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 fprintf(stderr, "ffsdrv_write_check() failed (addr = 0x%x, size = %d)\n", |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 (int) addr, size); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 fprintf(stdout, "ffsdrv_write_check() failed (addr = 0x%x, size = %d)\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
783 (int) addr, size); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 exit (1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
786 } |
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|
787 |
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788 |
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789 void ffsdrv_write_error(uint16 old, uint16 new) |
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790 { |
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791 test_fatal_printf("FATAL: Attempt to rewrite 0 to 1 bit " |
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parents:
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792 "(old:0x%x/%c new:0x%x/%c)\n", |
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793 old, (old < ' ' ? '?' : old), |
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794 new, (new < ' ' ? '?' : new)); |
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795 } |
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796 |
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797 void ffsdrv_test_write_halfword(volatile uint16 *addr, uint16 value) |
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798 { |
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|
799 tw(tr(TR_FUNC, TrDrvWrite, "test_write_halfword(0x%05x, 0x%x)\n", |
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|
800 addr2offset(addr), value)); |
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|
801 |
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diff
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|
802 ffsdrv_write_check((uint8 *) addr, 2); |
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803 |
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804 if (~*addr & value) |
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|
805 ffsdrv_write_error(*addr, value); |
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parents:
diff
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|
806 |
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parents:
diff
changeset
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807 *addr = value; |
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808 } |
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809 |
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810 void ffsdrv_test_write(void *dst, const void *src, uint16 size) |
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|
811 { |
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|
812 uint8 *mydst = dst; |
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813 const uint8 *mysrc = src; |
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|
814 |
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|
815 tw(tr(TR_FUNC, TrDrvWrite, "test_write(0x%05x, 0x%x, %d)\n", |
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parents:
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816 addr2offset(mydst), mysrc, size)); |
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817 |
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|
818 if (size > 0) |
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|
819 { |
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820 if ((int) mydst & 1) { |
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|
821 ffsdrv_write_byte(mydst++, *mysrc++); |
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822 size--; |
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823 } |
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diff
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|
824 while (size >= 2) { |
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diff
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|
825 ffsdrv_test_write_halfword((uint16 *) mydst, mysrc[0]|(mysrc[1] << 8)); |
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|
826 size -= 2; |
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827 mysrc += 2; |
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|
828 mydst += 2; |
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diff
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829 } |
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830 if (size == 1) |
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|
831 ffsdrv_write_byte(mydst++, *mysrc++); |
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|
832 } |
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parents:
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833 } |
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|
834 |
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diff
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|
835 void ffsdrv_test_erase(uint8 block) |
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|
836 { |
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|
837 int i; |
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|
838 uint8 *addr; |
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diff
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839 |
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840 addr = block2addr(block); |
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|
841 |
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diff
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|
842 tw(tr(TR_FUNC, TrDrvErase, "ffsdrv_test_erase(%d)\n", block)); |
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parents:
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843 |
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diff
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|
844 for (i = 0; i < 1 << dev.binfo[block].size_ld; i++) { |
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diff
changeset
|
845 *addr++ = 0xFF; |
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diff
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|
846 } |
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|
847 } |
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diff
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848 |
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849 char *ffsdrv_test_create(void) |
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|
850 { |
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|
851 // If flash image file already exists, open the file, and mmap it. |
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diff
changeset
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852 // Otherwise, create file, fill file with 1's, then mmap it. |
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|
853 |
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changeset
|
854 int i; |
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diff
changeset
|
855 struct stat statbuf; |
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diff
changeset
|
856 #ifdef WIN32 |
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diff
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|
857 OFSTRUCT lpReOpenBuff; |
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parents:
diff
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|
858 DWORD last_error; |
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|
859 SECURITY_ATTRIBUTES lpAttributes; |
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changeset
|
860 |
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changeset
|
861 lpAttributes.nLength = sizeof (lpAttributes); |
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|
862 lpAttributes.lpSecurityDescriptor = NULL; |
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|
863 lpAttributes.bInheritHandle = TRUE; |
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|
864 #endif |
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diff
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|
865 image_size = (int) dev.binfo[dev.numblocks - 1].offset + |
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|
866 (1 << dev.binfo[dev.numblocks - 1].size_ld); |
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|
867 |
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diff
changeset
|
868 tw(tr(TR_BEGIN, TrDrvInit, "ffsdrv_test_create() {\n")); |
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|
869 tw(tr(TR_FUNC, TrDrvInit, "%s image: '%s', size = %d\n", |
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|
870 arg_removeimage ? "new" : "current", arg_imagename, image_size)); |
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|
871 |
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changeset
|
872 // create file if it does not exist |
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diff
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|
873 #ifdef WIN32 |
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diff
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874 if( arg_removeimage || OpenFile( arg_imagename, &lpReOpenBuff, OF_EXIST) == HFILE_ERROR ) |
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|
875 #else |
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diff
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|
876 if (arg_removeimage || lstat(arg_imagename, &statbuf) == -1) |
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|
877 #endif |
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diff
changeset
|
878 { |
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changeset
|
879 char data[64]; |
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parents:
diff
changeset
|
880 #ifdef WIN32 |
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changeset
|
881 DWORD bwritten; |
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parents:
diff
changeset
|
882 #endif |
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changeset
|
883 // only the first run should remove the flash image file |
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diff
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|
884 arg_removeimage = 0; |
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diff
changeset
|
885 |
945cf7f506b2
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parents:
diff
changeset
|
886 tw(tr(TR_FUNC, TrDrvInit, "creating new flash image file '%s'\n", |
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|
887 arg_imagename)); |
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diff
changeset
|
888 #ifdef WIN32 |
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|
889 image_fd = CreateFile(arg_imagename, |
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diff
changeset
|
890 GENERIC_WRITE | GENERIC_READ, |
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diff
changeset
|
891 0, |
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diff
changeset
|
892 NULL, |
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diff
changeset
|
893 OPEN_ALWAYS, |
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diff
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|
894 FILE_ATTRIBUTE_NORMAL, |
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diff
changeset
|
895 NULL ); |
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parents:
diff
changeset
|
896 #else |
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parents:
diff
changeset
|
897 image_fd = open(arg_imagename , O_RDWR|O_CREAT, |
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|
898 (S_IRWXU & ~S_IXUSR) | |
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|
899 ( S_IRWXG & ~S_IXGRP) | (S_IRWXO & ~S_IXOTH)); |
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|
900 #endif |
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diff
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|
901 if (image_fd == -1) { |
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diff
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|
902 perror("Failed to create flash image"); |
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parents:
diff
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|
903 exit(1); |
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|
904 } |
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diff
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|
905 |
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diff
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|
906 // write 1's to the file. |
945cf7f506b2
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parents:
diff
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|
907 for (i = 0; i < 64; i++) |
945cf7f506b2
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diff
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|
908 data[i] = 0xff; |
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parents:
diff
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|
909 |
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diff
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|
910 #ifdef WIN32 |
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diff
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|
911 for (i = 0; i < image_size/64; i++) |
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parents:
diff
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|
912 WriteFile(image_fd, data, 64, &bwritten, NULL); |
945cf7f506b2
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parents:
diff
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|
913 CloseHandle(image_fd); |
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parents:
diff
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|
914 #else |
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diff
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|
915 for (i = 0; i < image_size/64; i++) |
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parents:
diff
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|
916 write(image_fd, data, 64); |
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parents:
diff
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|
917 |
945cf7f506b2
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diff
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|
918 close(image_fd); |
945cf7f506b2
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parents:
diff
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|
919 #endif |
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diff
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|
920 image_fd = 0; |
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diff
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|
921 tw(tr(TR_FUNC, TrDrvInit, "flash image file created\n")); |
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parents:
diff
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|
922 } |
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diff
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|
923 |
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|
924 // only open image file if this is the first initialization. |
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parents:
diff
changeset
|
925 if (image_fd > 0) { |
945cf7f506b2
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parents:
diff
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|
926 tw(tr(TR_FUNC, TrDrvInit, "re-opening '%s' file of size %d\n", |
945cf7f506b2
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parents:
diff
changeset
|
927 arg_imagename, image_size)); |
945cf7f506b2
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parents:
diff
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|
928 } |
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parents:
diff
changeset
|
929 else { |
945cf7f506b2
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parents:
diff
changeset
|
930 tw(tr(TR_FUNC, TrDrvInit, "opening '%s' file of size %d\n", |
945cf7f506b2
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parents:
diff
changeset
|
931 arg_imagename, image_size)); |
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parents:
diff
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|
932 |
945cf7f506b2
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parents:
diff
changeset
|
933 #ifdef WIN32 |
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parents:
diff
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|
934 image_fd = OpenFile( arg_imagename, &lpReOpenBuff, OF_READWRITE); |
945cf7f506b2
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parents:
diff
changeset
|
935 map_fd = CreateFileMapping (image_fd, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
936 &lpAttributes, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
937 PAGE_READWRITE, |
945cf7f506b2
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parents:
diff
changeset
|
938 0, |
945cf7f506b2
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parents:
diff
changeset
|
939 0, |
945cf7f506b2
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parents:
diff
changeset
|
940 arg_imagename); |
945cf7f506b2
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parents:
diff
changeset
|
941 #else |
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parents:
diff
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|
942 image_fd = open(arg_imagename, O_RDWR, S_IRWXU|S_IRWXG|S_IRWXO); |
945cf7f506b2
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parents:
diff
changeset
|
943 #endif |
945cf7f506b2
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parents:
diff
changeset
|
944 if (image_fd == -1) { |
945cf7f506b2
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parents:
diff
changeset
|
945 perror("Failed to open flash image"); |
945cf7f506b2
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parents:
diff
changeset
|
946 exit(1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
947 } |
945cf7f506b2
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parents:
diff
changeset
|
948 |
945cf7f506b2
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parents:
diff
changeset
|
949 // memory map the file and update block addresses of binfo array |
945cf7f506b2
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parents:
diff
changeset
|
950 #ifdef WIN32 |
945cf7f506b2
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parents:
diff
changeset
|
951 image_addr = MapViewOfFile( map_fd, |
945cf7f506b2
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parents:
diff
changeset
|
952 FILE_MAP_ALL_ACCESS, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
953 0, |
945cf7f506b2
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parents:
diff
changeset
|
954 0, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
955 0); |
945cf7f506b2
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parents:
diff
changeset
|
956 #else |
945cf7f506b2
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parents:
diff
changeset
|
957 image_addr = mmap(0, image_size, PROT_READ|PROT_WRITE, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
958 MAP_FILE|MAP_SHARED, image_fd, 0); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
959 #endif |
945cf7f506b2
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parents:
diff
changeset
|
960 } |
945cf7f506b2
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parents:
diff
changeset
|
961 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
962 tw(tr(TR_END, TrDrvInit, "}\n")); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
963 |
945cf7f506b2
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parents:
diff
changeset
|
964 return image_addr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
965 } |
945cf7f506b2
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parents:
diff
changeset
|
966 |
945cf7f506b2
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parents:
diff
changeset
|
967 #endif // (TARGET == 0) |
945cf7f506b2
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parents:
diff
changeset
|
968 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
969 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
970 /****************************************************************************** |
945cf7f506b2
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parents:
diff
changeset
|
971 * Device Detection and Copying of Driver to RAM |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
972 ******************************************************************************/ |
945cf7f506b2
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parents:
diff
changeset
|
973 |
945cf7f506b2
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parents:
diff
changeset
|
974 #if (TARGET == 1) |
945cf7f506b2
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parents:
diff
changeset
|
975 |
945cf7f506b2
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parents:
diff
changeset
|
976 // Note that this function reads device code of any of the three known flash |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
977 // families; Intel, AMD and SST. This works because Intel and AMD use |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
978 // the same command data for entering READ_IDENTIFIER mode (0x90). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
979 // The function should be copied and executed from RAM! |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
980 void ffsdrv_device_id_read(uint16 *manufact, uint16 *device) |
945cf7f506b2
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parents:
diff
changeset
|
981 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
982 int addr, i; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
983 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
984 // This silly looking code has one purpose; to set addr = 0xAAAA. It is |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
985 // necessary in order to force the compiler NOT to produce code that |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
986 // uses LDR opcode(s) with PC-relative addressing. The assember code |
945cf7f506b2
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parents:
diff
changeset
|
987 // produced from this C code is completely relocatable! |
945cf7f506b2
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parents:
diff
changeset
|
988 for (i = 0, addr = 0; i < 2; i++) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
989 addr |= addr << 8 | 0xAA; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
990 |
945cf7f506b2
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parents:
diff
changeset
|
991 FLASH_WRITE_HALFWORD (addr, 0xAA); |
945cf7f506b2
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parents:
diff
changeset
|
992 FLASH_WRITE_HALFWORD (addr >> 1, 0x55); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
993 FLASH_WRITE_HALFWORD (addr, 0x90); // Intel/AMD read id command |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
994 |
945cf7f506b2
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parents:
diff
changeset
|
995 *manufact = FLASH_READ_HALFWORD (0); // flash a0 = 0 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
996 *device = FLASH_READ_HALFWORD (2); // flash a0 = 1 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
997 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
998 // Read extended id |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
999 device[1] = FLASH_READ_HALFWORD (0xE << 1); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1000 device[2] = FLASH_READ_HALFWORD (0xF << 1); |
945cf7f506b2
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parents:
diff
changeset
|
1001 FLASH_WRITE_HALFWORD (0, 0xFF); // Intel read-array command |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1002 |
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parents:
diff
changeset
|
1003 // AMD devices do not need the two unlock cycles but SST devices do, |
945cf7f506b2
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parents:
diff
changeset
|
1004 // even though the SST datasheets states otherwise ;-) |
945cf7f506b2
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parents:
diff
changeset
|
1005 FLASH_WRITE_HALFWORD (addr, 0xAA); |
945cf7f506b2
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parents:
diff
changeset
|
1006 FLASH_WRITE_HALFWORD (addr >> 1, 0x55); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1007 FLASH_WRITE_HALFWORD (addr, 0xF0); // AMD read-array/reset command |
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1008 } |
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1009 |
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1010 // Copy ffsdrv_device_id_read() function code to RAM. The only known way to |
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1011 // determine the size of the code is to look either in the linker-generated |
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1012 // map file or in the assember output file. |
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1013 void ffsdrv_device_id_read_copy_to_ram(uint16 *dst, int size) |
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|
1014 { |
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|
1015 uint16 *src = (uint16 *) &ffsdrv_device_id_read; |
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|
1016 |
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parents:
diff
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|
1017 // The ARM7TDMI compiler sets bit 0 for thumb mode function pointers, so |
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parents:
diff
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|
1018 // we need to clear this in order to copy *all* bytes. Otherwise we |
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diff
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|
1019 // exclude first byte and the resulting copy becomes garbage |
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|
1020 src = (uint16 *) (~1 & (int) src); |
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|
1021 size /= 2; |
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|
1022 |
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1023 while (size--) |
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|
1024 *dst++ = *src++; |
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|
1025 } |
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|
1026 |
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1027 // Copy ffsdrv_xxx_sb_erase() and ffsdrv_xxx_sb_write_halfword() functions |
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|
1028 // to RAM. The only known way to determine the size of the code is to look |
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1029 // either in the linker-generated map file or in the assember output file. |
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diff
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|
1030 int ffsdrv_driver_copy_to_ram(int type) |
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1031 { |
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1032 int size; |
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diff
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|
1033 uint16 *src, *dst; |
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|
1034 extern uint16 ffsdrv_ram_amd_begin[]; |
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|
1035 extern uint16 ffsdrv_ram_intel_begin[]; |
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|
1036 uint32 offset_of_init; |
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|
1037 uint32 offset_of_erase; |
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|
1038 uint32 offset_of_write_halfword; |
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|
1039 |
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diff
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|
1040 ttw(ttr(TTrDrvOther, "ffsdrv_driver_copy_to_ram() {" NL)); |
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|
1041 |
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|
1042 switch (type) { |
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diff
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|
1043 case FFS_DRIVER_AMD: |
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|
1044 case FFS_DRIVER_AMD_SB: |
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|
1045 src = ffsdrv_ram_amd_begin; |
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|
1046 offset_of_erase = |
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|
1047 (uint32) ffsdrv_ram_amd_sb_erase - (uint32) src; |
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|
1048 offset_of_write_halfword = |
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|
1049 (uint32) ffsdrv_ram_amd_sb_write_halfword - (uint32) src; |
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diff
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|
1050 break; |
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|
1051 case FFS_DRIVER_INTEL_SB: |
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parents:
diff
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|
1052 src = ffsdrv_ram_intel_begin; |
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diff
changeset
|
1053 offset_of_init = |
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diff
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|
1054 (uint32) ffsdrv_ram_intel_sb_init - (uint32) src; |
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diff
changeset
|
1055 offset_of_erase = |
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|
1056 (uint32) ffsdrv_ram_intel_sb_erase - (uint32) src; |
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diff
changeset
|
1057 offset_of_write_halfword = |
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diff
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|
1058 (uint32) ffsdrv_ram_intel_sb_write_halfword - (uint32) src; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
1059 break; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1060 case FFS_DRIVER_INTEL: |
945cf7f506b2
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parents:
diff
changeset
|
1061 src = ffsdrv_ram_intel_begin; |
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diff
changeset
|
1062 offset_of_init = |
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parents:
diff
changeset
|
1063 (uint32) ffsdrv_ram_intel_sb_init - (uint32) src; |
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parents:
diff
changeset
|
1064 offset_of_erase = |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1065 (uint32) ffsdrv_ram_intel_erase - (uint32) src; |
945cf7f506b2
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parents:
diff
changeset
|
1066 offset_of_write_halfword = |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1067 (uint32) ffsdrv_ram_intel_sb_write_halfword - (uint32) src; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1068 break; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1069 default: |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1070 ttw(ttr(TTrDrvOther, "}" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1071 return 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1072 } |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1073 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1074 // Make sure we are handling a half-word aligned address (Thumb mode |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1075 // function pointers have lsb set!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1076 src = (uint16 *) (~1 & (int) src); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1077 |
945cf7f506b2
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parents:
diff
changeset
|
1078 // If we detect that the linker allocated the driver to RUN in RAM, the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1079 // user has obviously NOT removed those linker lines and we bail out! |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1080 if (offset_of_erase > FFSDRV_CODE_SIZE) |
945cf7f506b2
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parents:
diff
changeset
|
1081 return EFFS_DRIVER; |
945cf7f506b2
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parents:
diff
changeset
|
1082 |
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diff
changeset
|
1083 dst = (uint16 *) &ffsdrv_code; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
1084 |
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parents:
diff
changeset
|
1085 // Code size in halfwords |
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parents:
diff
changeset
|
1086 size = FFSDRV_CODE_SIZE / 2; |
945cf7f506b2
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parents:
diff
changeset
|
1087 |
945cf7f506b2
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parents:
diff
changeset
|
1088 // Rebind the two changed driver functions |
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src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
1089 if (type == FFS_DRIVER_AMD_SB || type == FFS_DRIVER_INTEL_SB) { |
945cf7f506b2
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parents:
diff
changeset
|
1090 ffsdrv.erase = |
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diff
changeset
|
1091 (void (*)(uint8)) |
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parents:
diff
changeset
|
1092 (offset_of_erase + (uint32) dst); |
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diff
changeset
|
1093 ffsdrv.write_halfword = |
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parents:
diff
changeset
|
1094 (void (*)(volatile uint16 *, uint16)) |
945cf7f506b2
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parents:
diff
changeset
|
1095 (offset_of_write_halfword + (uint32) dst); |
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diff
changeset
|
1096 } |
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diff
changeset
|
1097 if (type == FFS_DRIVER_INTEL_SB) { |
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parents:
diff
changeset
|
1098 ffsdrv.init = |
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diff
changeset
|
1099 (int (*)(void)) |
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diff
changeset
|
1100 (offset_of_init + (uint32) dst); |
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diff
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|
1101 } |
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|
1102 |
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diff
changeset
|
1103 ttw(ttr(TTrDrvOther, "ffsdrv_code, init, write, erase = 0x%07x, 0x%07x, 0x%07x, 0x%07x" NL, |
945cf7f506b2
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parents:
diff
changeset
|
1104 dst, (uint32) ffsdrv.init, |
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diff
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|
1105 (uint32) ffsdrv.write_halfword, (uint32) ffsdrv.erase)); |
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diff
changeset
|
1106 |
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diff
changeset
|
1107 ttw(ttr(TTrDrvOther, "amd_begin, init, write, erase = 0x%07x, 0x%07x, 0x%07x, 0x%07x" NL, |
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parents:
diff
changeset
|
1108 ffsdrv_ram_amd_begin, ffsdrv_null_init, |
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diff
changeset
|
1109 ffsdrv_ram_amd_sb_write_halfword, ffsdrv_ram_amd_sb_erase)); |
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diff
changeset
|
1110 |
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parents:
diff
changeset
|
1111 ttw(ttr(TTrDrvOther, "intel_begin, init, write, erase = 0x%07x, 0x%07x, 0x%07x, 0x%07x" NL, |
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diff
changeset
|
1112 ffsdrv_ram_intel_begin, ffsdrv_ram_intel_sb_init, |
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diff
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1113 ffsdrv_ram_intel_sb_write_halfword, ffsdrv_ram_intel_sb_erase)); |
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diff
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|
1114 |
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diff
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|
1115 // Copy the code to RAM |
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parents:
diff
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|
1116 while (size--) |
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parents:
diff
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|
1117 *dst++ = *src++; |
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diff
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|
1118 |
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diff
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|
1119 ttw(ttr(TTrDrvOther, "}" NL)); |
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|
1120 |
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|
1121 return 0; |
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1122 } |
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1123 |
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|
1124 #else // (TARGET == 0) |
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1125 |
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diff
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|
1126 void ffsdrv_device_id_read(uint16 *manufact, uint16 *device) {} |
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|
1127 int ffsdrv_driver_copy_to_ram(int type) { return 0; } |
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|
1128 |
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diff
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|
1129 #endif // (TARGET == 1) |
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1130 |
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1131 |
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|
1132 /****************************************************************************** |
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parents:
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|
1133 * Initialization |
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parents:
diff
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|
1134 ******************************************************************************/ |
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parents:
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1135 |
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|
1136 const struct ffsdrv_s ffsdrv_amd = { |
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|
1137 ffsdrv_null_init, |
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diff
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|
1138 ffsdrv_amd_erase, |
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parents:
diff
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|
1139 ffsdrv_amd_write_halfword, |
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parents:
diff
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|
1140 ffsdrv_amd_write, |
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parents:
diff
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|
1141 ffsdrv_amd_write_end, |
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parents:
diff
changeset
|
1142 ffsdrv_amd_erase_suspend, |
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parents:
diff
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|
1143 ffsdrv_amd_erase_resume |
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|
1144 }; |
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|
1145 |
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diff
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|
1146 const struct ffsdrv_s ffsdrv_amd_sb = { |
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parents:
diff
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|
1147 ffsdrv_null_init, |
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parents:
diff
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|
1148 ffsdrv_ram_amd_sb_erase, |
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parents:
diff
changeset
|
1149 ffsdrv_ram_amd_sb_write_halfword, |
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parents:
diff
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|
1150 ffsdrv_generic_write, |
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parents:
diff
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|
1151 ffsdrv_null_write_end, |
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parents:
diff
changeset
|
1152 ffsdrv_null_erase_suspend, |
945cf7f506b2
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parents:
diff
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|
1153 ffsdrv_null_erase_resume |
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parents:
diff
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|
1154 }; |
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|
1155 |
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diff
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|
1156 const struct ffsdrv_s ffsdrv_sst = { |
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parents:
diff
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|
1157 ffsdrv_null_init, |
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parents:
diff
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|
1158 ffsdrv_sst_erase, |
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parents:
diff
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|
1159 ffsdrv_amd_write_halfword, // Use AMD driver function |
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parents:
diff
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|
1160 ffsdrv_sst_write, |
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parents:
diff
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|
1161 ffsdrv_amd_write_end, // Use AMD driver function |
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parents:
diff
changeset
|
1162 ffsdrv_sst_erase_suspend, |
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parents:
diff
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|
1163 ffsdrv_null_erase_resume |
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parents:
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|
1164 }; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
1165 |
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diff
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|
1166 const struct ffsdrv_s ffsdrv_sst_sb = { |
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parents:
diff
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|
1167 ffsdrv_null_init, |
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diff
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|
1168 ffsdrv_null_erase, |
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parents:
diff
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|
1169 ffsdrv_null_write_halfword, |
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parents:
diff
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|
1170 ffsdrv_null_write, |
945cf7f506b2
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parents:
diff
changeset
|
1171 ffsdrv_null_write_end, |
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parents:
diff
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|
1172 ffsdrv_null_erase_suspend, |
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parents:
diff
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|
1173 ffsdrv_null_erase_resume |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
1174 }; |
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diff
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|
1175 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1176 // We use the functions ffsdrv_ram_intel_sb_write_halfword and |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1177 // ffsdrv_ram_intel_erase due to the bug in the intel wireless flash |
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diff
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|
1178 // device. See 28F640W30.pdf specification Errata 5. |
945cf7f506b2
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diff
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|
1179 const struct ffsdrv_s ffsdrv_intel = { |
945cf7f506b2
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parents:
diff
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|
1180 ffsdrv_null_init, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1181 ffsdrv_intel_erase, |
945cf7f506b2
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parents:
diff
changeset
|
1182 ffsdrv_intel_write_halfword, |
945cf7f506b2
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parents:
diff
changeset
|
1183 ffsdrv_generic_write, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1184 ffsdrv_intel_write_end, |
945cf7f506b2
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parents:
diff
changeset
|
1185 ffsdrv_intel_erase_suspend, |
945cf7f506b2
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parents:
diff
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|
1186 ffsdrv_intel_erase_resume |
945cf7f506b2
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diff
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|
1187 }; |
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|
1188 |
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|
1189 const struct ffsdrv_s ffsdrv_intel_sb = { |
945cf7f506b2
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|
1190 ffsdrv_null_init, |
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diff
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|
1191 ffsdrv_ram_intel_sb_erase, |
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diff
changeset
|
1192 ffsdrv_ram_intel_sb_write_halfword, |
945cf7f506b2
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diff
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|
1193 ffsdrv_generic_write, |
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diff
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|
1194 ffsdrv_null_write_end, |
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diff
changeset
|
1195 ffsdrv_null_erase_suspend, |
945cf7f506b2
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|
1196 ffsdrv_null_erase_resume |
945cf7f506b2
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|
1197 }; |
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|
1198 |
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changeset
|
1199 const struct ffsdrv_s ffsdrv_null = { |
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|
1200 ffsdrv_null_init, |
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diff
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|
1201 ffsdrv_null_erase, |
945cf7f506b2
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parents:
diff
changeset
|
1202 ffsdrv_null_write_halfword, |
945cf7f506b2
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parents:
diff
changeset
|
1203 ffsdrv_null_write, |
945cf7f506b2
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parents:
diff
changeset
|
1204 ffsdrv_null_write_end, |
945cf7f506b2
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parents:
diff
changeset
|
1205 ffsdrv_null_erase_suspend, |
945cf7f506b2
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parents:
diff
changeset
|
1206 ffsdrv_null_erase_resume |
945cf7f506b2
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parents:
diff
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|
1207 }; |
945cf7f506b2
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diff
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|
1208 |
945cf7f506b2
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diff
changeset
|
1209 const struct ffsdrv_s ffsdrv_amd_pseudo_sb = { |
945cf7f506b2
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parents:
diff
changeset
|
1210 ffsdrv_null_init, |
945cf7f506b2
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parents:
diff
changeset
|
1211 ffsdrv_amd_pseudo_sb_erase, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1212 ffsdrv_amd_pseudo_sb_write_halfword, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
1213 ffsdrv_generic_write, |
945cf7f506b2
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parents:
diff
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|
1214 ffsdrv_null_write_end, |
945cf7f506b2
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parents:
diff
changeset
|
1215 ffsdrv_null_erase_suspend, |
945cf7f506b2
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parents:
diff
changeset
|
1216 ffsdrv_null_erase_resume |
945cf7f506b2
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diff
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|
1217 }; |
945cf7f506b2
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|
1218 |
945cf7f506b2
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diff
changeset
|
1219 const struct ffsdrv_s ffsdrv_ram = { |
945cf7f506b2
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parents:
diff
changeset
|
1220 ffsdrv_null_init, |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1221 ffsdrv_ram_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1222 ffsdrv_ram_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1223 ffsdrv_ram_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1224 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1225 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1226 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1227 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1228 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1229 #if (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1230 const struct ffsdrv_s ffsdrv_test = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1231 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1232 ffsdrv_test_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1233 ffsdrv_test_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1234 ffsdrv_test_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1235 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1236 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1237 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1238 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1239 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1240 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1241 // Note: This function is designed for little-endian memory addressing! |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1242 void ffsdrv_write_byte(void *dst, uint8 value) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1243 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1244 uint16 halfword; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1245 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1246 tw(tr(TR_FUNC, TrDrvWrite, "ffsdrv_write_byte(0x%05x, 0x%x)\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1247 (int) (addr2offset(dst)), value)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1248 ttw(str(TTrDrvWrite, "wb" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1249 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1250 if ((int) dst & 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1251 halfword = (value << 8) | *((uint8 *) dst - 1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1252 else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1253 halfword = (*((uint8 *) dst + 1) << 8) | (value); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1254 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1255 ffsdrv.write_halfword((uint16 *) ((int) dst & ~1), halfword); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1256 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1257 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1258 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1259 extern uint16 ffs_flash_manufact; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1260 extern uint16 ffs_flash_device; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1261 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1262 effs_t ffsdrv_init(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1263 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1264 const struct ffsdrv_s *p; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1265 const struct flash_info_s *flash = &flash_info[0]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1266 int error; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1267 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1268 tw(tr(TR_BEGIN, TrDrvInit, "drv_init() {\n")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1269 ttw(str(TTrDrvOther, "ffsdrv_init() {" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1270 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1271 dev.state = DEV_READ; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1272 dev.binfo = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1273 dev.base = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1274 dev.numblocks = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1275 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1276 // If ffs_flash_device is zero, detect device automatically by copying |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1277 // the detect function into RAM and execute it from there... |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1278 if (ffs_flash_manufact == 0 && ffs_flash_device == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1279 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1280 #if (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1281 char detect_code[80]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1282 typedef (*pf_t)(uint16 *, uint16 *); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1283 pf_t myfp; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1284 uint16 device_id[3]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1285 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1286 ffsdrv_device_id_read_copy_to_ram((uint16 *) detect_code, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1287 sizeof(detect_code)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1288 // Combine bit 0 of the thumb mode function pointer with the address |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1289 // of the code in RAM. Then call the detect function in RAM. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1290 myfp = (pf_t) (((int) &ffsdrv_device_id_read & 1) | (int) detect_code); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1291 (*myfp)(&dev.manufact, device_id); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1292 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1293 if ((dev.manufact == MANUFACT_AMD || dev.manufact == MANUFACT_FUJITSU) && |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1294 device_id[0] == 0x227E) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1295 // This is a multi-id device |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1296 dev.device = (device_id[1] << 8) | (device_id[2] & 0xFF); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1297 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1298 else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1299 dev.device = device_id[0]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1300 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1301 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1302 else { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1303 dev.manufact = ffs_flash_manufact; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1304 dev.device = ffs_flash_device; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1305 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1306 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1307 tw(tr(TR_FUNC, TrDrvInit, "TARGET = %d\n", TARGET)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1308 tw(tr(TR_FUNC, TrDrvInit, "Looking up device (0x%2x,0x%4x): ", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1309 dev.manufact, dev.device)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1310 while (flash->manufact) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1311 tw(tr(TR_NULL, TrDrvInit, "(0x%02x,0x%04x) ", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1312 flash->manufact, flash->device)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1313 if (dev.manufact == flash->manufact && dev.device == flash->device) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1314 tw(tr(TR_NULL, TrDrvInit, "FOUND ")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1315 break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1316 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1317 flash++; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1318 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1319 tw(tr(TR_NULL, TrDrvInit, "\n")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1320 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1321 if (flash->manufact == 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1322 tw(tr(TR_END, TrDrvInit, "} (%d)\n", EFFS_NODEVICE)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1323 return EFFS_NODEVICE; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1324 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1325 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1326 dev.binfo = (struct block_info_s *) flash->binfo; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1327 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1328 if (flash->driver == FFS_DRIVER_RAM && flash->base == 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1329 if (ffs_ram_image_address <= 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1330 tw(tr(TR_END, TrDrvInit, "} (%d)\n", EFFS_DRIVER)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1331 return EFFS_DRIVER; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1332 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1333 dev.base = (char *) ffs_ram_image_address; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1334 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1335 else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1336 dev.base = (char *) flash->base; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1337 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1338 dev.numblocks = flash->numblocks; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1339 dev.driver = flash->driver; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1340 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1341 // We assume that ALL blocks are of equal size |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1342 dev.blocksize_ld = dev.binfo[0].size_ld; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1343 dev.blocksize = (1 << dev.blocksize_ld); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1344 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1345 dev.atomlog2 = FFS_ATOM_LOG2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1346 dev.atomsize = 1 << dev.atomlog2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1347 dev.atomnotmask = dev.atomsize - 1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1348 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1349 #if (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1350 if (dev.manufact == MANUFACT_TEST) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1351 dev.base = ffsdrv_test_create(); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1352 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1353 p = &ffsdrv_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1354 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1355 #else // (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1356 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1357 // Initialize hardware independent driver functions array |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1358 switch (dev.driver) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1359 case FFS_DRIVER_AMD: p = &ffsdrv_amd; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1360 case FFS_DRIVER_AMD_SB: p = &ffsdrv_amd_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1361 case FFS_DRIVER_SST: p = &ffsdrv_sst; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1362 case FFS_DRIVER_SST_SB: p = &ffsdrv_sst_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1363 case FFS_DRIVER_INTEL: p = &ffsdrv_intel; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1364 case FFS_DRIVER_INTEL_SB: p = &ffsdrv_intel_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1365 case FFS_DRIVER_AMD_PSEUDO_SB: p = &ffsdrv_amd_pseudo_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1366 case FFS_DRIVER_RAM: p = &ffsdrv_ram; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1367 default: p = &ffsdrv_null; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1368 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1369 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1370 #endif // (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1371 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1372 // Bind the driver functions |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1373 ffsdrv.init = p->init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1374 ffsdrv.erase = p->erase; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1375 ffsdrv.write_halfword = p->write_halfword; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1376 ffsdrv.write = p->write; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1377 ffsdrv.write_end = p->write_end; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1378 ffsdrv.erase_suspend = p->erase_suspend; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1379 ffsdrv.erase_resume = p->erase_resume; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1380 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1381 // Copy single bank driver code to RAM (and possibly re-bind some of the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1382 // driver functions) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1383 error = ffsdrv_driver_copy_to_ram(dev.driver); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1384 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1385 if (error >= 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1386 error = ffsdrv.init(); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1387 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1388 tw(tr(TR_FUNC, TrDrvInit, "dev.binfo = 0x%x\n", (unsigned int) dev.binfo)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1389 tw(tr(TR_FUNC, TrDrvInit, "dev.base = 0x%x\n", (unsigned int) dev.base)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1390 tw(tr(TR_FUNC, TrDrvInit, "dev.numblocks = %d\n", dev.numblocks)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1391 tw(tr(TR_FUNC, TrDrvInit, "dev.blocksize = %d\n", dev.blocksize)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1392 tw(tr(TR_FUNC, TrDrvInit, "dev.atomlog2/atomsize/atomnotmask = %d/%d/%x\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1393 dev.atomlog2, dev.atomsize, dev.atomnotmask)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1394 tw(tr(TR_END, TrDrvInit, "} %d\n", error)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1395 ttw(ttr(TTrDrvOther, "} %d" NL, error)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1396 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1397 return error; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1398 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1399 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1400 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1401 /****************************************************************************** |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1402 * Interrupt Enable/Disable |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1403 ******************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1404 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1405 // IMPORTANT NOTE! Apparently, locating this ARM assembly code at the top of |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1406 // this file will make the compiler trash the A1 register between the calls |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1407 // of arm_int_disable and arm_int_enable() thus crashing the whole system. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1408 // If the code is placed AFTER the usage of the functions, the compiler |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1409 // saves the A1 register. Strange but true. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1410 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1411 // IMPORTANT NOTE! Apparently, another strange thing is that if the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1412 // functions are declared static, they don't work! |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1413 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1414 // Executing code from RAM is NOT trivial when we need to jump between ROM |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1415 // (flash) and RAM memory. The ARM only supports 26-bit relative branch |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1416 // offsets. This is the reason why we have a local copy of the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1417 // arm_int_disable/enable() functions in this file plus each of the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1418 // single-bank drivers. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1419 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1420 #if (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1421 // Note that we use our own interrupt disable/enable function because |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1422 // Nucleus allegedly should have a bug in its implementation for this. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1423 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1424 uint32 int_disable(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1425 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1426 asm(" .state16"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1427 asm(" mov A1, #0xC0"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1428 asm(" ldr A2, tct_disable"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1429 asm(" bx A2 "); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1430 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1431 asm("tct_disable .field _TCT_Control_Interrupts+0,32"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1432 asm(" .global _TCT_Control_Interrupts"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1433 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1434 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1435 void int_enable(uint32 cpsr) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1436 { |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1437 asm(" .state16"); |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1438 asm(" ldr A2, tct_enable"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1439 asm(" bx A2 "); |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1440 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1441 asm("tct_enable .field _TCT_Control_Interrupts+0,32"); |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1442 asm(" .global _TCT_Control_Interrupts"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1443 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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1444 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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1445 #else |
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1446 |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1447 uint32 int_disable(void) { return 0; } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1448 void int_enable(uint32 tmp) {} |
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1449 |
945cf7f506b2
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1450 #endif // (TARGET == 1) |
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1451 |
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Mychaela Falconia <falcon@freecalypso.org>
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1452 |