FreeCalypso > hg > fc-magnetite
annotate src/cs/drivers/drv_app/ffs/board/drv.c @ 560:d380b62e1019
tpudrv12.h: provision for future FCFAM triband-or-quadband support
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 29 Dec 2018 04:06:37 +0000 |
parents | 7aad22344e77 |
children | 92dbfa906f66 |
rev | line source |
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1 /****************************************************************************** |
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2 * Flash File System (ffs) |
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3 * Idea, design and coding by Mads Meisner-Jensen, mmj@ti.com |
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4 * |
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5 * ffs low level flash driver |
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6 * |
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7 * $Id: drv.c 1.30.1.6.1.51.1.1.1.13.1.11 Tue, 06 Jan 2004 14:36:52 +0100 tsj $ |
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8 * |
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9 ******************************************************************************/ |
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10 |
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11 #ifndef TARGET |
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12 #include "ffs.cfg" |
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13 #endif |
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14 |
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15 #include "fc-target.cfg" |
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16 |
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17 #include "ffs/ffs.h" |
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18 #include "ffs/board/drv.h" |
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19 #include "ffs/board/ffstrace.h" |
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20 |
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21 #if (TARGET == 0) |
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22 |
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23 #ifdef WIN32 |
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24 #include "windows.h" |
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25 #else //WIN32 |
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26 #include "sys/mman.h" |
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27 #include "unistd.h" |
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28 #endif //WIN32 |
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29 |
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30 #include "stdio.h" |
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31 #include "sys/types.h" |
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32 #include "sys/stat.h" |
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33 #include "fcntl.h" |
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34 #else |
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35 #include "nucleus.h" |
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36 |
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37 #endif |
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38 |
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39 |
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40 // Note that all code notes and comments pertaining to single-bank flash |
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41 // drivers are located in the AMD SB driver (amdsbdrv.c). Consider this as |
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42 // the reference. |
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43 |
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44 |
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45 /****************************************************************************** |
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46 * Globals |
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47 ******************************************************************************/ |
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48 |
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49 #if (TARGET == 1) |
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50 // NOTE: This is the size in bytes of the single-bank driver code that is |
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51 // copied to RAM. The only way to determine the amount of memory needed is |
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52 // to look into the linker output file (.map) or the assembler output of |
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53 // both amdsbdrv.obj and intelsbdrv.obj files. |
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54 #define FFSDRV_CODE_SIZE (0x200) |
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55 |
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56 uint8 ffsdrv_code[FFSDRV_CODE_SIZE]; |
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57 |
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58 #endif |
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59 |
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60 #define INTEL_UNLOCK_SLOW 1 |
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61 |
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62 struct dev_s dev; |
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63 struct ffsdrv_s ffsdrv; |
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64 |
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65 uint32 int_disable(void); |
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66 void int_enable(uint32 tmp); |
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67 |
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68 /****************************************************************************** |
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69 * Macros |
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70 ******************************************************************************/ |
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71 |
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72 #define addr2offset(address) ( (int) (address) - (int) dev.base ) |
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73 |
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74 |
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75 /****************************************************************************** |
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76 * Generic Driver Functions |
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77 ******************************************************************************/ |
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78 |
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79 void ffsdrv_generic_write(void *dst, const void *src, uint16 size) |
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80 { |
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81 uint8 *mydst = dst; |
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82 const uint8 *mysrc = src; |
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83 |
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84 if (size > 0) |
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85 { |
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86 if ((unsigned int) mydst & 1) { |
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87 ffsdrv_write_byte(mydst++, *mysrc++); |
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88 size--; |
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89 } |
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90 while (size >= 2) { |
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91 ffsdrv.write_halfword((uint16 *) mydst, |
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92 mysrc[0] | (mysrc[1] << 8)); |
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93 size -= 2; |
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94 mysrc += 2; |
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95 mydst += 2; |
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96 } |
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97 if (size == 1) |
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98 ffsdrv_write_byte(mydst++, *mysrc++); |
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99 } |
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100 } |
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101 |
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102 |
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103 /****************************************************************************** |
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104 * AMD Single Bank Driver Functions |
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105 ******************************************************************************/ |
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106 |
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107 #if (TARGET == 1) |
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108 |
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109 // Forward declaration of functions in file amdsbdrv.c |
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110 void ffsdrv_ram_amd_sb_write_halfword(volatile uint16 *addr, uint16 value); |
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111 void ffsdrv_ram_amd_sb_erase(uint8 block); |
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112 |
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113 #else // (TARGET == 0) |
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114 |
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115 // On PC these functions are empty |
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116 void ffsdrv_ram_amd_sb_write_halfword(volatile uint16 *addr, uint16 value) {} |
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117 void ffsdrv_ram_amd_sb_erase(uint8 block) {} |
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118 |
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119 #endif // (TARGET == 1) |
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120 |
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121 |
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122 /****************************************************************************** |
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123 * AMD Pseudo Single Bank Driver Functions |
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124 ******************************************************************************/ |
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125 |
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126 // This is a pseudo single-bank flash driver. It simulates a single-bank |
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127 // flash device on a dual-bank device. |
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128 |
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129 #if (TARGET == 1) |
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130 |
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131 void ffsdrv_amd_pseudo_sb_write_halfword(volatile uint16 *addr, uint16 value) |
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132 { |
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133 volatile char *flash = dev.base; |
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134 uint32 cpsr, i, x; |
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135 |
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136 ttw(ttr(TTrDrvWrite, "wh(%x,%x)" NL, addr, value)); |
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137 |
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138 if (~*addr & value) { |
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139 ttw(ttr(TTrFatal, "wh(%x,%x->%x) fatal" NL, addr, *addr, value)); |
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140 return; |
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141 } |
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142 |
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143 cpsr = int_disable(); |
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144 tlw(led_on(LED_WRITE)); |
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145 |
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146 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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147 flash[0x5555] = 0x55; // unlock cycle 2 |
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148 flash[0xAAAA] = 0xA0; |
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149 *addr = value; |
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150 |
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151 while ((*dev.addr ^ dev.data) & 0x80) |
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152 ; |
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153 |
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154 tlw(led_off(LED_WRITE)); |
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155 int_enable(cpsr); |
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156 } |
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157 |
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158 // This VERY simple way of erase suspending only works because we run under |
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159 // a pre-emptive operating system, so whenever an interrupt occurs, another |
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160 // task takes the CPU, and at the end of the interrupt, FFS gets the CPU |
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161 // again. |
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162 void ffsdrv_amd_pseudo_sb_erase(uint8 block) |
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163 { |
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164 volatile char *flash = dev.base; |
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165 volatile char *addr; |
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166 uint32 cpsr; |
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167 uint16 flashpoll; |
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168 |
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169 addr = block2addr(block); |
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170 |
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171 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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172 |
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173 cpsr = int_disable(); |
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174 tlw(led_on(LED_ERASE)); |
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175 |
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176 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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177 flash[0x5555] = 0x55; // unlock cycle 2 |
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178 flash[0xAAAA] = 0x80; |
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179 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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180 flash[0x5555] = 0x55; // unlock cycle 2 |
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181 *addr = 0x30; // AMD erase sector command |
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182 |
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183 // Wait for erase to finish. |
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184 while ((*addr & 0x80) == 0) { |
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185 tlw(led_toggle(LED_ERASE)); |
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186 // Poll interrupts, taking interrupt mask into account. |
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187 if (INT_REQUESTED) |
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188 { |
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189 // 1. suspend erase |
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190 // 2. enable interrupts |
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191 // .. now the interrupt code executes |
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192 // 3. disable interrupts |
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193 // 4. resume erase |
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194 |
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195 tlw(led_on(LED_ERASE_SUSPEND)); |
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196 *addr = 0xB0; |
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197 |
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198 // wait for erase suspend to finish |
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199 while ((*addr & 0x80) == 0) |
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200 ; |
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201 |
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202 tlw(led_off(LED_ERASE_SUSPEND)); |
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203 int_enable(cpsr); |
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204 |
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205 // Other interrupts and tasks run now... |
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206 |
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207 cpsr = int_disable(); |
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208 tlw(led_on(LED_ERASE_SUSPEND)); |
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209 |
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210 // Before resuming erase we must? check if the erase is really |
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211 // suspended or if it did finish |
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212 flashpoll = *addr; |
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213 *addr = 0x30; |
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214 |
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215 tlw(led_off(LED_ERASE_SUSPEND)); |
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216 } |
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217 } |
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218 |
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219 tlw(led_on(LED_ERASE)); |
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220 tlw(led_off(LED_ERASE)); |
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221 int_enable(cpsr); |
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222 } |
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223 |
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224 #else // (TARGET == 0) |
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225 |
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226 void ffsdrv_amd_pseudo_sb_write_halfword(volatile uint16 *addr, uint16 value) {} |
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227 void ffsdrv_amd_pseudo_sb_erase(uint8 block) {} |
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228 |
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229 #endif // (TARGET == 1) |
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230 |
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231 |
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232 /****************************************************************************** |
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233 * AMD Dual/Multi Bank Driver Functions |
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234 ******************************************************************************/ |
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235 |
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236 // All erase and write operations are performed atomically (interrupts |
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237 // disabled). Otherwise we cannot trust the value of dev.state and we cannot |
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238 // determine exactly how many of the command words have already been |
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239 // written. |
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240 |
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241 // in ffs_end() when we resume an erasure that was previously suspended, how |
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242 // does that affect multiple tasks doing that simultaneously? |
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243 |
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244 void ffsdrv_amd_write_end(void); |
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245 void ffsdrv_amd_erase_end(void); |
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246 |
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247 void ffsdrv_amd_write_halfword(volatile uint16 *addr, uint16 value) |
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248 { |
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249 volatile uint16 *flash = (volatile uint16 *)dev.base; |
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250 uint32 cpsr; |
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251 |
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252 tlw(led_on(LED_WRITE)); |
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253 ttw(ttr(TTrDrvWrite, "wh(%x,%x)" NL, addr, value)); |
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254 |
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255 dev.addr = addr; |
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256 dev.data = value; |
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257 |
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258 if (~*addr & value) { |
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259 ttw(ttr(TTrFatal, "wh(%x,%x->%x) fatal" NL, addr, *addr, value)); |
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260 return; |
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261 } |
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262 |
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263 cpsr = int_disable(); |
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264 tlw(led_toggle(LED_WRITE_SUSPEND)); |
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265 dev.state = DEV_WRITE; |
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266 flash[0x555] = 0xAA; // unlock cycle 1 |
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267 flash[0x2AA] = 0x55; // unlock cycle 2 |
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268 flash[0x555] = 0xA0; |
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269 *addr = value; |
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270 int_enable(cpsr); |
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271 tlw(led_toggle(LED_WRITE_SUSPEND)); |
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272 |
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273 ffsdrv_amd_write_end(); |
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274 } |
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275 |
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276 void ffsdrv_amd_write(void *dst, const void *src, uint16 size) |
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277 { |
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278 uint8 *mydst = dst; |
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279 const uint8 *mysrc = src; |
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280 |
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281 if (size > 0) |
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282 { |
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283 if ((unsigned int) mydst & 1) { |
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284 ffsdrv_write_byte(mydst++, *mysrc++); |
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285 size--; |
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286 } |
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287 while (size >= 2) { |
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288 ffsdrv_amd_write_halfword((uint16 *) mydst, |
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289 mysrc[0] | (mysrc[1] << 8)); |
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290 size -= 2; |
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291 mysrc += 2; |
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292 mydst += 2; |
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293 } |
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294 if (size == 1) |
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295 ffsdrv_write_byte(mydst++, *mysrc++); |
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296 } |
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297 } |
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298 |
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299 void ffsdrv_amd_write_end(void) |
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300 { |
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301 while ((*dev.addr ^ dev.data) & 0x80) |
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302 tlw(led_toggle(LED_WRITE_SUSPEND)); |
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303 |
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304 dev.state = DEV_READ; |
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305 |
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306 tlw(led_off(LED_WRITE)); |
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307 } |
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308 |
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309 void ffsdrv_amd_erase(uint8 block) |
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310 { |
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311 volatile uint16 *flash = (volatile uint16 *)dev.base; |
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312 uint32 cpsr; |
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313 |
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314 tlw(led_on(LED_ERASE)); |
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315 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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316 |
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317 dev.addr = (uint16 *) block2addr(block); |
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318 |
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319 cpsr = int_disable(); |
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320 dev.state = DEV_ERASE; |
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321 flash[0x555] = 0xAA; // unlock cycle 1 |
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322 flash[0x2AA] = 0x55; // unlock cycle 2 |
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323 flash[0x555] = 0x80; |
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324 flash[0x555] = 0xAA; // unlock cycle 1 |
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325 flash[0x2AA] = 0x55; // unlock cycle 2 |
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326 *dev.addr = 0x30; // AMD erase sector command |
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327 int_enable(cpsr); |
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328 |
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329 ffsdrv_amd_erase_end(); |
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330 } |
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331 |
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332 void ffsdrv_amd_erase_end(void) |
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333 { |
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334 while ((*dev.addr & 0x80) == 0) |
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335 ; |
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336 |
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337 dev.state = DEV_READ; |
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338 |
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339 tlw(led_off(LED_ERASE)); |
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340 } |
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341 |
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342 void ffsdrv_amd_erase_suspend(void) |
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343 { |
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344 uint32 cpsr; |
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345 |
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346 tlw(led_on(LED_ERASE_SUSPEND)); |
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347 ttw(str(TTrDrvErase, "es" NL)); |
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348 |
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349 // if erase has finished then all is ok |
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350 if (*dev.addr & 0x80) { |
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351 ffsdrv_amd_erase_end(); |
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352 tlw(led_off(LED_ERASE_SUSPEND)); |
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353 return; |
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354 } |
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355 |
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356 // NOTEME: As there is no way to be absolutely certain that erase |
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357 // doesn't finish between last poll and the following erase suspend |
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358 // command, we assume that the erase suspend is safe even though the |
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359 // erase IS actually already finished. |
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360 |
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361 cpsr = int_disable(); |
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362 dev.state = DEV_ERASE_SUSPEND; |
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363 *dev.addr = 0xB0; |
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364 |
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365 // Wait for erase suspend to finish |
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366 while ((*dev.addr & 0x80) == 0) |
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367 ; |
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368 |
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369 int_enable(cpsr); |
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370 } |
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371 |
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372 void ffsdrv_amd_erase_resume(void) |
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373 { |
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374 uint32 cpsr; |
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375 |
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376 ttw(str(TTrDrvErase, "er" NL)); |
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377 |
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378 // NOTEME: See note in erase_suspend()... We assume that the erase |
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379 // resume is safe even though the erase IS actually already finished. |
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380 cpsr = int_disable(); |
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381 dev.state = DEV_ERASE; |
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382 *dev.addr = 0x30; |
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383 int_enable(cpsr); |
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384 |
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385 tlw(led_off(LED_ERASE_SUSPEND)); |
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386 } |
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387 |
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388 |
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389 /****************************************************************************** |
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390 * SST Dual/Multi Bank Driver Functions |
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391 ******************************************************************************/ |
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392 |
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393 // SST flashes use almost same command set as AMD flashes. Only the command |
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394 // addresses (4 more bits) and erase command data (0x50 instead of 0x30) are |
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395 // different. SST flashes have no erase suspend/resume commands because they |
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396 // are so fast at erasing! |
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397 |
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398 void ffsdrv_sst_write_end(void); |
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399 void ffsdrv_sst_erase_end(void); |
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400 |
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401 void ffsdrv_sst_write(void *dst, const void *src, uint16 size) |
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402 { |
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403 uint8 *mydst = dst; |
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404 const uint8 *mysrc = src; |
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405 |
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406 if (size > 0) |
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407 { |
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408 if ((unsigned int) mydst & 1) { |
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409 ffsdrv_write_byte(mydst++, *mysrc++); |
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410 size--; |
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411 } |
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412 while (size >= 2) { |
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413 ffsdrv_amd_write_halfword((uint16 *) mydst, |
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414 mysrc[0] | (mysrc[1] << 8)); |
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415 size -= 2; |
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416 mysrc += 2; |
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417 mydst += 2; |
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418 } |
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419 if (size == 1) |
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420 ffsdrv_write_byte(mydst++, *mysrc++); |
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421 } |
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422 } |
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423 |
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424 // Note that SST flashes have smaller sectors than other flash families. |
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425 // Fortunately they support erasure of several of these sectors in a logical |
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426 // unit called a "block". |
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427 void ffsdrv_sst_erase(uint8 block) |
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428 { |
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429 volatile char *flash = dev.base; |
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430 uint32 cpsr; |
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431 |
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432 tlw(led_on(LED_ERASE)); |
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433 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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434 |
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435 dev.addr = (uint16 *) block2addr(block); |
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436 |
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437 cpsr = int_disable(); |
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438 dev.state = DEV_ERASE; |
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439 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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440 flash[0x5555] = 0x55; // unlock cycle 2 |
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441 flash[0xAAAA] = 0x80; |
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442 flash[0xAAAA] = 0xAA; // unlock cycle 1 |
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443 flash[0x5555] = 0x55; // unlock cycle 2 |
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444 *dev.addr = 0x50; // SST erase block command |
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445 int_enable(cpsr); |
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446 |
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447 ffsdrv_sst_erase_end(); |
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448 } |
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449 |
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450 void ffsdrv_sst_erase_end(void) |
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451 { |
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452 // Wait for erase end |
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453 while ((*dev.addr & 0x80) == 0) |
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454 ; |
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455 |
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456 dev.state = DEV_READ; |
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457 |
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458 tlw(led_off(LED_ERASE)); |
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459 } |
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460 |
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461 // Erase suspend/resume commands do not exist for SST flashes, so we just |
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462 // poll for the end of the erase operation... |
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463 |
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464 void ffsdrv_sst_erase_suspend(void) |
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465 { |
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466 ttw(str(TTrDrvErase, "es" NL)); |
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467 |
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468 ffsdrv_sst_erase_end(); |
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469 } |
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470 |
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471 |
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472 /****************************************************************************** |
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473 * Intel Single Bank Driver Functions |
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474 ******************************************************************************/ |
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475 |
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476 #if (TARGET == 1) |
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477 |
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478 // Forward declaration of functions in file intelsbdrv.c |
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479 int ffsdrv_ram_intel_sb_init(void); |
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480 void ffsdrv_ram_intel_sb_write_halfword(volatile uint16 *addr, uint16 value); |
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481 void ffsdrv_ram_intel_sb_erase(uint8 block); |
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482 void ffsdrv_ram_intel_erase(uint8 block); |
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483 |
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484 #else // (TARGET == 0) |
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485 |
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486 // On PC these functions are empty |
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487 void ffsdrv_ram_intel_sb_write_halfword(volatile uint16 *addr, uint16 value) {} |
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488 void ffsdrv_ram_intel_sb_erase(uint8 block) {} |
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489 void ffsdrv_ram_intel_erase(uint8 block) {} |
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490 |
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491 #endif // (TARGET == 1) |
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492 |
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493 |
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494 /****************************************************************************** |
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495 * Intel Dual/Multi Bank Driver Functions |
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496 ******************************************************************************/ |
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497 |
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498 void ffsdrv_intel_write_end(void); |
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499 void ffsdrv_intel_erase_end(void); |
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500 |
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501 |
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502 // ffsdrv_intel_write_halfword and ffsdrv_intel_write_end is not used |
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503 // because of the bug in the intel flash device. Instead is the functions |
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504 // ffsdrv_ram_intel_sb_write_halfword and ffsdrv_ram_intel_erase used. |
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505 void ffsdrv_intel_write_halfword(volatile uint16 *addr, uint16 value) |
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506 { |
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507 uint32 cpsr; |
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508 |
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509 tlw(led_on(LED_WRITE)); |
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510 ttw(ttr(TTrDrvWrite, "wh(%x,%x)" NL, addr, value)); |
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511 |
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512 dev.addr = addr; |
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513 |
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514 if (~*addr & value) { |
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515 ttw(ttr(TTrFatal, "wh(%x,%x->%x) fatal" NL, addr, *addr, value)); |
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516 return; |
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517 } |
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518 |
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519 cpsr = int_disable(); |
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520 dev.state = DEV_WRITE; |
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521 |
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522 #if (INTEL_UNLOCK_SLOW == 1) |
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523 *addr = 0x60; // Intel Config setup |
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524 *addr = 0xD0; // Intel Unlock block |
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525 *addr = 0x50; // Intel Clear Status Register |
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526 #endif |
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527 |
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528 *addr = 0x40; // Intel program byte/word |
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529 *addr = value; |
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530 |
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531 int_enable(cpsr); |
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532 |
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533 ffsdrv_intel_write_end(); |
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534 } |
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535 |
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536 void ffsdrv_intel_write(void *dst, const void *src, uint16 size) |
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537 { |
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538 uint8 *mydst = dst; |
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539 const uint8 *mysrc = src; |
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540 |
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541 if (size > 0) |
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542 { |
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543 if ((unsigned int) mydst & 1) { |
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544 ffsdrv_write_byte(mydst++, *mysrc++); |
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545 size--; |
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546 } |
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547 while (size >= 2) { |
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548 ffsdrv_intel_write_halfword((uint16 *) mydst, |
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549 mysrc[0] | (mysrc[1] << 8)); |
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550 size -= 2; |
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551 mysrc += 2; |
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552 mydst += 2; |
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553 } |
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554 if (size == 1) |
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555 ffsdrv_write_byte(mydst++, *mysrc++); |
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556 } |
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557 } |
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558 |
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559 void ffsdrv_intel_write_end(void) |
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560 { |
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561 uint32 cpsr; |
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562 // We can be interrupted and reentered thus the state can have been changed. |
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563 while ((*dev.addr & 0x80) == 0 && dev.state == DEV_WRITE) |
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564 ; |
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565 |
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566 // The flash state and dev.state must be in sync thus the stat changes |
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567 // must be protect from being interrupted |
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568 cpsr = int_disable(); |
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569 *dev.addr = 0xFF; // Intel read array |
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570 dev.state = DEV_READ; |
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571 int_enable(cpsr); |
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572 |
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573 tlw(led_off(LED_WRITE)); |
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574 } |
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575 |
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576 |
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577 void ffsdrv_intel_erase(uint8 block) |
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578 { |
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579 uint32 cpsr; |
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580 |
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581 ttw(ttr(TTrDrvErase, "e(%d)" NL, block)); |
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582 tlw(led_on(LED_ERASE)); |
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583 |
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584 dev.addr = (uint16 *) block2addr(block); |
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585 |
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586 cpsr = int_disable(); |
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587 dev.state = DEV_ERASE; |
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588 |
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589 #if (INTEL_UNLOCK_SLOW == 1) |
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590 *dev.addr = 0x60; // Intel Config setup |
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591 *dev.addr = 0xD0; // Intel Unlock block |
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592 #endif |
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593 |
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594 *dev.addr = 0x50; // Intel clear status register (not really necessary) |
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595 *dev.addr = 0x20; // Intel erase setup |
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596 *dev.addr = 0xD0; // Intel erase confirm |
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597 |
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598 int_enable(cpsr); |
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599 |
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600 ffsdrv_intel_erase_end(); |
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601 } |
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602 |
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603 void ffsdrv_intel_erase_end(void) |
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604 { |
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605 while ((*dev.addr & 0x80) == 0 && dev.state == DEV_ERASE) |
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606 ; |
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607 |
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608 *dev.addr = 0xFF; // Intel read array |
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609 |
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610 dev.state = DEV_READ; |
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611 tlw(led_off(LED_ERASE)); |
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612 } |
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613 |
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614 void ffsdrv_intel_erase_suspend(void) |
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615 { |
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616 uint32 cpsr; |
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617 uint16 poll; |
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618 |
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619 ttw(str(TTrDrvErase, "es" NL)); |
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620 tlw(led_on(LED_ERASE_SUSPEND)); |
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621 |
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622 cpsr = int_disable(); |
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623 dev.state = DEV_ERASE_SUSPEND; |
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624 *dev.addr = 0xB0; // Intel Erase Suspend |
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625 *dev.addr = 0x70; // Intel Read Status Register |
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626 while (((poll = *dev.addr) & 0x80) == 0) |
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627 ; |
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628 |
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629 if ((poll & 0x40) == 0) { |
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630 // Block erase has completed |
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631 tlw(led_off(LED_ERASE_SUSPEND)); |
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632 dev.state = DEV_READ; |
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633 tlw(led_off(LED_ERASE)); |
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634 } |
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635 *dev.addr = 0xFF; // Intel read array |
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636 int_enable(cpsr); |
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637 } |
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638 |
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639 void ffsdrv_intel_erase_resume(void) |
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640 { |
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641 uint32 cpsr; |
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642 |
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643 ttw(str(TTrDrvErase, "er" NL)); |
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644 |
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645 cpsr = int_disable(); |
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646 dev.state = DEV_ERASE; |
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647 *dev.addr = 0xD0; // Intel erase resume |
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648 |
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649 // The following "extra" Read Status command is required because Intel |
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650 // has changed the specification of the W30 flash! (See "1.8 Volt Intel® |
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651 // Wireless Flash Memory with 3 Volt I/O 28F6408W30, 28F640W30, |
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652 // 28F320W30 Specification Update") |
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653 *dev.addr = 0x70; // Intel Read Status Register |
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654 |
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655 int_enable(cpsr); |
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656 |
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657 tlw(led_off(LED_ERASE_SUSPEND)); |
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658 } |
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659 |
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660 |
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661 /****************************************************************************** |
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662 * RAM Family Functions |
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663 ******************************************************************************/ |
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664 |
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665 void ffsdrv_ram_write_halfword(volatile uint16 *dst, uint16 value) |
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666 { |
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667 *dst = value; |
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668 } |
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669 |
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670 void ffsdrv_ram_write(void *dst, const void *src, uint16 size) |
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671 { |
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672 uint8 *mydst = dst; |
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673 const uint8 *mysrc = src; |
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674 |
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675 if (size == 0) |
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676 return; |
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677 else if (size == 1) |
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678 ffsdrv_write_byte(mydst, *mysrc); |
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679 else { |
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680 if ((int) mydst & 1) { |
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681 ffsdrv_write_byte(mydst++, *mysrc++); |
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682 size--; |
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683 } |
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684 while (size >= 2) { |
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685 ffsdrv_ram_write_halfword((uint16 *) mydst, mysrc[0]|(mysrc[1] << 8)); |
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686 size -= 2; |
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687 mysrc += 2; |
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688 mydst += 2; |
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689 } |
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690 if (size == 1) |
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691 ffsdrv_write_byte(mydst++, *mysrc++); |
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692 } |
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693 } |
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694 |
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diff
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|
695 void ffsdrv_ram_erase(uint8 block) |
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696 { |
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697 int i; |
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698 char *addr; |
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699 |
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700 addr = block2addr(block); |
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|
701 |
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parents:
diff
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|
702 for (i = 0; i < (1 << dev.binfo[block].size_ld); i++) { |
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703 *addr++ = 0xFF; |
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|
704 } |
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705 } |
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parents:
diff
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|
706 |
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parents:
diff
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|
707 /****************************************************************************** |
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708 * Void Functions |
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Mychaela Falconia <falcon@freecalypso.org>
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709 ******************************************************************************/ |
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parents:
diff
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710 |
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parents:
diff
changeset
|
711 int ffsdrv_null_init(void) |
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parents:
diff
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712 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
713 ttw(ttr(TTrDrvOther, "ffsdrv_null_init()" NL)); |
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parents:
diff
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|
714 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
715 return 0; |
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parents:
diff
changeset
|
716 } |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 |
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parents:
diff
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|
718 void ffsdrv_null_erase(uint8 block) |
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parents:
diff
changeset
|
719 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
720 ttw(ttr(TTrDrvErase, "ffsdrv_null_erase(%d)" NL, block)); |
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parents:
diff
changeset
|
721 } |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
722 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 void ffsdrv_null_write_halfword(volatile uint16 *addr, uint16 value) |
945cf7f506b2
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parents:
diff
changeset
|
724 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 ttw(ttr(TTrDrvWrite, "ffsdrv_null_write_halfword(0x%x, 0x%x)" NL, addr, value)); |
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parents:
diff
changeset
|
726 } |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 void ffsdrv_null_write(void *dst, const void *src, uint16 size) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 ttw(ttr(TTrDrvWrite, "ffsdrv_null_write(0x%x, 0x%x, %d)" NL, dst, src, size)); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
731 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 void ffsdrv_null_erase_suspend(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 ttw(str(TTrDrvErase, "ffsdrv_null_erase_suspend()" NL)); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 void ffsdrv_null_erase_resume(void) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 ttw(str(TTrDrvErase, "ffsdrv_null_erase_resume()" NL)); |
945cf7f506b2
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parents:
diff
changeset
|
741 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 void ffsdrv_null_write_end(void) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 ttw(str(TTrDrvWrite, "ffsdrv_null_write_end()" NL)); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747 |
945cf7f506b2
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parents:
diff
changeset
|
748 void ffsdrv_null_erase_end(void) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 ttw(str(TTrDrvErase, "ffsdrv_null_erase_end()" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 /****************************************************************************** |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755 * Test Driver Functions |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 ******************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 #if (TARGET == 0) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 static char *image_addr = 0; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 static int image_size = 0; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 #ifdef WIN32 |
945cf7f506b2
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parents:
diff
changeset
|
763 HANDLE image_fd, map_fd; |
945cf7f506b2
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parents:
diff
changeset
|
764 #else //WIN32 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
765 static int image_fd = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
766 #endif //WIN32 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 |
945cf7f506b2
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parents:
diff
changeset
|
768 extern int arg_removeimage; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 extern char *arg_imagename; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
770 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 extern void test_fatal_printf(char *format, ...); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 void ffsdrv_write_check(char *addr, int size) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 offset_t offset, last; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 |
945cf7f506b2
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parents:
diff
changeset
|
777 offset = addr2offset(addr); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 last = dev.binfo[dev.numblocks-1].offset |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 + (1 << dev.binfo[dev.numblocks-1].size_ld); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 if (offset < 0 || (offset + size) > last) { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 fprintf(stderr, "ffsdrv_write_check() failed (addr = 0x%x, size = %d)\n", |
945cf7f506b2
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parents:
diff
changeset
|
783 (int) addr, size); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 fprintf(stdout, "ffsdrv_write_check() failed (addr = 0x%x, size = %d)\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 (int) addr, size); |
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|
786 exit (1); |
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diff
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|
787 } |
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|
788 } |
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diff
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|
789 |
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diff
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|
790 |
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diff
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|
791 void ffsdrv_write_error(uint16 old, uint16 new) |
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|
792 { |
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|
793 test_fatal_printf("FATAL: Attempt to rewrite 0 to 1 bit " |
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794 "(old:0x%x/%c new:0x%x/%c)\n", |
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parents:
diff
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|
795 old, (old < ' ' ? '?' : old), |
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parents:
diff
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|
796 new, (new < ' ' ? '?' : new)); |
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|
797 } |
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diff
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|
798 |
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parents:
diff
changeset
|
799 void ffsdrv_test_write_halfword(volatile uint16 *addr, uint16 value) |
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parents:
diff
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|
800 { |
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parents:
diff
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|
801 tw(tr(TR_FUNC, TrDrvWrite, "test_write_halfword(0x%05x, 0x%x)\n", |
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parents:
diff
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|
802 addr2offset(addr), value)); |
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parents:
diff
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|
803 |
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parents:
diff
changeset
|
804 ffsdrv_write_check((uint8 *) addr, 2); |
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parents:
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changeset
|
805 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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diff
changeset
|
806 if (~*addr & value) |
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parents:
diff
changeset
|
807 ffsdrv_write_error(*addr, value); |
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parents:
diff
changeset
|
808 |
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parents:
diff
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|
809 *addr = value; |
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810 } |
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|
811 |
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diff
changeset
|
812 void ffsdrv_test_write(void *dst, const void *src, uint16 size) |
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diff
changeset
|
813 { |
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diff
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814 uint8 *mydst = dst; |
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815 const uint8 *mysrc = src; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
816 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
817 tw(tr(TR_FUNC, TrDrvWrite, "test_write(0x%05x, 0x%x, %d)\n", |
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parents:
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|
818 addr2offset(mydst), mysrc, size)); |
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parents:
diff
changeset
|
819 |
945cf7f506b2
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|
820 if (size > 0) |
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|
821 { |
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diff
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|
822 if ((int) mydst & 1) { |
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parents:
diff
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|
823 ffsdrv_write_byte(mydst++, *mysrc++); |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
824 size--; |
945cf7f506b2
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parents:
diff
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|
825 } |
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diff
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|
826 while (size >= 2) { |
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diff
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|
827 ffsdrv_test_write_halfword((uint16 *) mydst, mysrc[0]|(mysrc[1] << 8)); |
945cf7f506b2
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diff
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|
828 size -= 2; |
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|
829 mysrc += 2; |
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diff
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|
830 mydst += 2; |
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|
831 } |
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|
832 if (size == 1) |
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diff
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|
833 ffsdrv_write_byte(mydst++, *mysrc++); |
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|
834 } |
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|
835 } |
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diff
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|
836 |
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|
837 void ffsdrv_test_erase(uint8 block) |
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diff
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|
838 { |
945cf7f506b2
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diff
changeset
|
839 int i; |
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diff
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|
840 uint8 *addr; |
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|
841 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
842 addr = block2addr(block); |
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src/cs: chipsetsw import from tcs211-fcmodem
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|
843 |
945cf7f506b2
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parents:
diff
changeset
|
844 tw(tr(TR_FUNC, TrDrvErase, "ffsdrv_test_erase(%d)\n", block)); |
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parents:
diff
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|
845 |
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diff
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|
846 for (i = 0; i < 1 << dev.binfo[block].size_ld; i++) { |
945cf7f506b2
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parents:
diff
changeset
|
847 *addr++ = 0xFF; |
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diff
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|
848 } |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
849 } |
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|
850 |
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|
851 char *ffsdrv_test_create(void) |
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diff
changeset
|
852 { |
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diff
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|
853 // If flash image file already exists, open the file, and mmap it. |
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diff
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|
854 // Otherwise, create file, fill file with 1's, then mmap it. |
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diff
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|
855 |
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diff
changeset
|
856 int i; |
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parents:
diff
changeset
|
857 struct stat statbuf; |
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diff
changeset
|
858 #ifdef WIN32 |
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diff
changeset
|
859 OFSTRUCT lpReOpenBuff; |
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diff
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|
860 DWORD last_error; |
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diff
changeset
|
861 SECURITY_ATTRIBUTES lpAttributes; |
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diff
changeset
|
862 |
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diff
changeset
|
863 lpAttributes.nLength = sizeof (lpAttributes); |
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diff
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|
864 lpAttributes.lpSecurityDescriptor = NULL; |
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|
865 lpAttributes.bInheritHandle = TRUE; |
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parents:
diff
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|
866 #endif |
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diff
changeset
|
867 image_size = (int) dev.binfo[dev.numblocks - 1].offset + |
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diff
changeset
|
868 (1 << dev.binfo[dev.numblocks - 1].size_ld); |
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parents:
diff
changeset
|
869 |
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parents:
diff
changeset
|
870 tw(tr(TR_BEGIN, TrDrvInit, "ffsdrv_test_create() {\n")); |
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parents:
diff
changeset
|
871 tw(tr(TR_FUNC, TrDrvInit, "%s image: '%s', size = %d\n", |
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diff
changeset
|
872 arg_removeimage ? "new" : "current", arg_imagename, image_size)); |
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parents:
diff
changeset
|
873 |
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parents:
diff
changeset
|
874 // create file if it does not exist |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
875 #ifdef WIN32 |
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diff
changeset
|
876 if( arg_removeimage || OpenFile( arg_imagename, &lpReOpenBuff, OF_EXIST) == HFILE_ERROR ) |
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diff
changeset
|
877 #else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
878 if (arg_removeimage || lstat(arg_imagename, &statbuf) == -1) |
945cf7f506b2
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diff
changeset
|
879 #endif |
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parents:
diff
changeset
|
880 { |
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parents:
diff
changeset
|
881 char data[64]; |
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parents:
diff
changeset
|
882 #ifdef WIN32 |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
883 DWORD bwritten; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
884 #endif |
945cf7f506b2
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diff
changeset
|
885 // only the first run should remove the flash image file |
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parents:
diff
changeset
|
886 arg_removeimage = 0; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
887 |
945cf7f506b2
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parents:
diff
changeset
|
888 tw(tr(TR_FUNC, TrDrvInit, "creating new flash image file '%s'\n", |
945cf7f506b2
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parents:
diff
changeset
|
889 arg_imagename)); |
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parents:
diff
changeset
|
890 #ifdef WIN32 |
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diff
changeset
|
891 image_fd = CreateFile(arg_imagename, |
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parents:
diff
changeset
|
892 GENERIC_WRITE | GENERIC_READ, |
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parents:
diff
changeset
|
893 0, |
945cf7f506b2
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parents:
diff
changeset
|
894 NULL, |
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parents:
diff
changeset
|
895 OPEN_ALWAYS, |
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parents:
diff
changeset
|
896 FILE_ATTRIBUTE_NORMAL, |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
897 NULL ); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
898 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
899 image_fd = open(arg_imagename , O_RDWR|O_CREAT, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
900 (S_IRWXU & ~S_IXUSR) | |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
901 ( S_IRWXG & ~S_IXGRP) | (S_IRWXO & ~S_IXOTH)); |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
902 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
903 if (image_fd == -1) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
904 perror("Failed to create flash image"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
905 exit(1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
906 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
907 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
908 // write 1's to the file. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
909 for (i = 0; i < 64; i++) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
910 data[i] = 0xff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
911 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
912 #ifdef WIN32 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
913 for (i = 0; i < image_size/64; i++) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
914 WriteFile(image_fd, data, 64, &bwritten, NULL); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
915 CloseHandle(image_fd); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
916 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
917 for (i = 0; i < image_size/64; i++) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
918 write(image_fd, data, 64); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
919 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
920 close(image_fd); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
921 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
922 image_fd = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
923 tw(tr(TR_FUNC, TrDrvInit, "flash image file created\n")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
924 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
925 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
926 // only open image file if this is the first initialization. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
927 if (image_fd > 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
928 tw(tr(TR_FUNC, TrDrvInit, "re-opening '%s' file of size %d\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
929 arg_imagename, image_size)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
930 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
931 else { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
932 tw(tr(TR_FUNC, TrDrvInit, "opening '%s' file of size %d\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
933 arg_imagename, image_size)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
934 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
935 #ifdef WIN32 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
936 image_fd = OpenFile( arg_imagename, &lpReOpenBuff, OF_READWRITE); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
937 map_fd = CreateFileMapping (image_fd, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
938 &lpAttributes, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
939 PAGE_READWRITE, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
940 0, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
941 0, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
942 arg_imagename); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
943 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
944 image_fd = open(arg_imagename, O_RDWR, S_IRWXU|S_IRWXG|S_IRWXO); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
945 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
946 if (image_fd == -1) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
947 perror("Failed to open flash image"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
948 exit(1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
949 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
950 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
951 // memory map the file and update block addresses of binfo array |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
952 #ifdef WIN32 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
953 image_addr = MapViewOfFile( map_fd, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
954 FILE_MAP_ALL_ACCESS, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
955 0, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
956 0, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
957 0); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
958 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
959 image_addr = mmap(0, image_size, PROT_READ|PROT_WRITE, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
960 MAP_FILE|MAP_SHARED, image_fd, 0); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
961 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
962 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
963 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
964 tw(tr(TR_END, TrDrvInit, "}\n")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
965 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
966 return image_addr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
967 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
968 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
969 #endif // (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
970 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
971 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
972 /****************************************************************************** |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
973 * Device Detection and Copying of Driver to RAM |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
974 ******************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
975 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
976 #if (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
977 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
978 // Note that this function reads device code of any of the three known flash |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
979 // families; Intel, AMD and SST. This works because Intel and AMD use |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
980 // the same command data for entering READ_IDENTIFIER mode (0x90). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
981 // The function should be copied and executed from RAM! |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
982 void ffsdrv_device_id_read(uint16 *manufact, uint16 *device) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
983 { |
557
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
984 #if defined(CONFIG_TARGET_FCFAM) || defined(CONFIG_TARGET_PIRELLI) |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
985 /* |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
986 * This new FreeCalypso version of the device ID read function |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
987 * should work for all current targets, but we are being conservative |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
988 * and only enabling it for those targets for which it is required, |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
989 * i.e., where TI's original version does not work. |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
990 */ |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
991 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
992 int addr, half, base, i; |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
993 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
994 /* |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
995 * We operate at a non-zero erase block boundary so that this ID read |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
996 * operation will still work in our newer FreeCalypso environments |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
997 * where we have the Calypso boot ROM mapped at 0. |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
998 */ |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
999 base = 0x40000; |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1000 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1001 /* |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1002 * muckery similar to TI's original to avoid literal pool loads, |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1003 * but we produce and use 0xAAA and 0x554 offsets instead of TI's |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1004 * original 0xAAAA and 0x5555. |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1005 */ |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1006 for (i = 0, addr = 0; i < 3; i++) |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1007 addr = addr << 4 | 0xA; |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1008 half = (addr >> 1) & ~1; |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1009 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1010 FLASH_WRITE_HALFWORD (base + addr, 0xAA); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1011 FLASH_WRITE_HALFWORD (base + half, 0x55); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1012 FLASH_WRITE_HALFWORD (base + addr, 0x90); // Intel/AMD read id command |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1013 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1014 *manufact = FLASH_READ_HALFWORD (base + 0); // flash a0 = 0 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1015 *device = FLASH_READ_HALFWORD (base + 2); // flash a0 = 1 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1016 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1017 // Read extended id |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1018 device[1] = FLASH_READ_HALFWORD (base + (0xE << 1)); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1019 device[2] = FLASH_READ_HALFWORD (base + (0xF << 1)); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1020 FLASH_WRITE_HALFWORD (base, 0xFF); // Intel read-array command |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1021 |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1022 // AMD devices do not need the two unlock cycles but SST devices do, |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1023 // even though the SST datasheets states otherwise ;-) |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1024 FLASH_WRITE_HALFWORD (base + addr, 0xAA); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1025 FLASH_WRITE_HALFWORD (base + half, 0x55); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1026 FLASH_WRITE_HALFWORD (base + addr, 0xF0); // AMD read-array/reset command |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1027 #else |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1028 /* TI's original version */ |
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1029 int addr, i; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1030 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1031 // This silly looking code has one purpose; to set addr = 0xAAAA. It is |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1032 // necessary in order to force the compiler NOT to produce code that |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1033 // uses LDR opcode(s) with PC-relative addressing. The assember code |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1034 // produced from this C code is completely relocatable! |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1035 for (i = 0, addr = 0; i < 2; i++) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1036 addr |= addr << 8 | 0xAA; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1037 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1038 FLASH_WRITE_HALFWORD (addr, 0xAA); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1039 FLASH_WRITE_HALFWORD (addr >> 1, 0x55); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1040 FLASH_WRITE_HALFWORD (addr, 0x90); // Intel/AMD read id command |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1041 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1042 *manufact = FLASH_READ_HALFWORD (0); // flash a0 = 0 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1043 *device = FLASH_READ_HALFWORD (2); // flash a0 = 1 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1044 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1045 // Read extended id |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1046 device[1] = FLASH_READ_HALFWORD (0xE << 1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1047 device[2] = FLASH_READ_HALFWORD (0xF << 1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1048 FLASH_WRITE_HALFWORD (0, 0xFF); // Intel read-array command |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1049 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1050 // AMD devices do not need the two unlock cycles but SST devices do, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1051 // even though the SST datasheets states otherwise ;-) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1052 FLASH_WRITE_HALFWORD (addr, 0xAA); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1053 FLASH_WRITE_HALFWORD (addr >> 1, 0x55); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1054 FLASH_WRITE_HALFWORD (addr, 0xF0); // AMD read-array/reset command |
557
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1055 #endif |
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1056 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1057 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1058 // Copy ffsdrv_device_id_read() function code to RAM. The only known way to |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1059 // determine the size of the code is to look either in the linker-generated |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1060 // map file or in the assember output file. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1061 void ffsdrv_device_id_read_copy_to_ram(uint16 *dst, int size) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1062 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1063 uint16 *src = (uint16 *) &ffsdrv_device_id_read; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1064 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1065 // The ARM7TDMI compiler sets bit 0 for thumb mode function pointers, so |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1066 // we need to clear this in order to copy *all* bytes. Otherwise we |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1067 // exclude first byte and the resulting copy becomes garbage |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1068 src = (uint16 *) (~1 & (int) src); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1069 size /= 2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1070 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1071 while (size--) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1072 *dst++ = *src++; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1073 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1074 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1075 // Copy ffsdrv_xxx_sb_erase() and ffsdrv_xxx_sb_write_halfword() functions |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1076 // to RAM. The only known way to determine the size of the code is to look |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1077 // either in the linker-generated map file or in the assember output file. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1078 int ffsdrv_driver_copy_to_ram(int type) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1079 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1080 int size; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1081 uint16 *src, *dst; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1082 extern uint16 ffsdrv_ram_amd_begin[]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1083 extern uint16 ffsdrv_ram_intel_begin[]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1084 uint32 offset_of_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1085 uint32 offset_of_erase; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1086 uint32 offset_of_write_halfword; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1087 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1088 ttw(ttr(TTrDrvOther, "ffsdrv_driver_copy_to_ram() {" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1089 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1090 switch (type) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1091 case FFS_DRIVER_AMD: |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1092 case FFS_DRIVER_AMD_SB: |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1093 src = ffsdrv_ram_amd_begin; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1094 offset_of_erase = |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1095 (uint32) ffsdrv_ram_amd_sb_erase - (uint32) src; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1096 offset_of_write_halfword = |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1097 (uint32) ffsdrv_ram_amd_sb_write_halfword - (uint32) src; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1098 break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1099 case FFS_DRIVER_INTEL_SB: |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1100 src = ffsdrv_ram_intel_begin; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1101 offset_of_init = |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1102 (uint32) ffsdrv_ram_intel_sb_init - (uint32) src; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1103 offset_of_erase = |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1104 (uint32) ffsdrv_ram_intel_sb_erase - (uint32) src; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1105 offset_of_write_halfword = |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1106 (uint32) ffsdrv_ram_intel_sb_write_halfword - (uint32) src; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1107 break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1108 case FFS_DRIVER_INTEL: |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1109 src = ffsdrv_ram_intel_begin; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1110 offset_of_init = |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1111 (uint32) ffsdrv_ram_intel_sb_init - (uint32) src; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1112 offset_of_erase = |
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1113 (uint32) ffsdrv_ram_intel_erase - (uint32) src; |
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1114 offset_of_write_halfword = |
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|
1115 (uint32) ffsdrv_ram_intel_sb_write_halfword - (uint32) src; |
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1116 break; |
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|
1117 default: |
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|
1118 ttw(ttr(TTrDrvOther, "}" NL)); |
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|
1119 return 0; |
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|
1120 } |
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|
1121 |
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1122 // Make sure we are handling a half-word aligned address (Thumb mode |
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|
1123 // function pointers have lsb set!) |
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|
1124 src = (uint16 *) (~1 & (int) src); |
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|
1125 |
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1126 // If we detect that the linker allocated the driver to RUN in RAM, the |
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|
1127 // user has obviously NOT removed those linker lines and we bail out! |
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|
1128 if (offset_of_erase > FFSDRV_CODE_SIZE) |
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|
1129 return EFFS_DRIVER; |
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1130 |
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1131 dst = (uint16 *) &ffsdrv_code; |
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1132 |
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1133 // Code size in halfwords |
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1134 size = FFSDRV_CODE_SIZE / 2; |
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1135 |
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|
1136 // Rebind the two changed driver functions |
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|
1137 if (type == FFS_DRIVER_AMD_SB || type == FFS_DRIVER_INTEL_SB) { |
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diff
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|
1138 ffsdrv.erase = |
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|
1139 (void (*)(uint8)) |
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|
1140 (offset_of_erase + (uint32) dst); |
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|
1141 ffsdrv.write_halfword = |
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|
1142 (void (*)(volatile uint16 *, uint16)) |
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|
1143 (offset_of_write_halfword + (uint32) dst); |
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|
1144 } |
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|
1145 if (type == FFS_DRIVER_INTEL_SB) { |
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|
1146 ffsdrv.init = |
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|
1147 (int (*)(void)) |
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|
1148 (offset_of_init + (uint32) dst); |
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|
1149 } |
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|
1150 |
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|
1151 ttw(ttr(TTrDrvOther, "ffsdrv_code, init, write, erase = 0x%07x, 0x%07x, 0x%07x, 0x%07x" NL, |
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|
1152 dst, (uint32) ffsdrv.init, |
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|
1153 (uint32) ffsdrv.write_halfword, (uint32) ffsdrv.erase)); |
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diff
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|
1154 |
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|
1155 ttw(ttr(TTrDrvOther, "amd_begin, init, write, erase = 0x%07x, 0x%07x, 0x%07x, 0x%07x" NL, |
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diff
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|
1156 ffsdrv_ram_amd_begin, ffsdrv_null_init, |
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diff
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|
1157 ffsdrv_ram_amd_sb_write_halfword, ffsdrv_ram_amd_sb_erase)); |
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|
1158 |
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|
1159 ttw(ttr(TTrDrvOther, "intel_begin, init, write, erase = 0x%07x, 0x%07x, 0x%07x, 0x%07x" NL, |
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|
1160 ffsdrv_ram_intel_begin, ffsdrv_ram_intel_sb_init, |
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diff
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|
1161 ffsdrv_ram_intel_sb_write_halfword, ffsdrv_ram_intel_sb_erase)); |
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|
1162 |
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|
1163 // Copy the code to RAM |
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|
1164 while (size--) |
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|
1165 *dst++ = *src++; |
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|
1166 |
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|
1167 ttw(ttr(TTrDrvOther, "}" NL)); |
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|
1168 |
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|
1169 return 0; |
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|
1170 } |
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|
1171 |
557
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85
diff
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|
1172 #if defined(CONFIG_TARGET_PIRELLI) || defined(CONFIG_TARGET_FCFAM) |
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85
diff
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|
1173 |
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85
diff
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|
1174 #ifdef CONFIG_TARGET_FCFAM |
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85
diff
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|
1175 #define FLASH2_BASE_ADDR 0x01800000 |
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85
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|
1176 #elif defined(CONFIG_TARGET_PIRELLI) |
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85
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|
1177 #define FLASH2_BASE_ADDR 0x02000000 |
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diff
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|
1178 #endif |
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85
diff
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|
1179 |
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85
diff
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|
1180 int ffsdrv_is_new_spansion_flash(void) |
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diff
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|
1181 { |
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85
diff
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|
1182 uint16 cfi_hi, cfi_lo, cfi_ver; |
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diff
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|
1183 |
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85
diff
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|
1184 /* CFI query */ |
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85
diff
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|
1185 FLASH_WRITE_HALFWORD(FLASH2_BASE_ADDR + 0xAAA, 0x98); |
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85
diff
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|
1186 cfi_hi = FLASH_READ_HALFWORD(FLASH2_BASE_ADDR + 0x86); |
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Mychaela Falconia <falcon@freecalypso.org>
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85
diff
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|
1187 cfi_lo = FLASH_READ_HALFWORD(FLASH2_BASE_ADDR + 0x88); |
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85
diff
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|
1188 cfi_ver = (cfi_hi << 8) | (cfi_lo & 0xFF); |
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85
diff
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|
1189 |
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|
1190 /* return to read array mode */ |
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85
diff
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|
1191 FLASH_WRITE_HALFWORD(FLASH2_BASE_ADDR + 0xAAA, 0xF0); |
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|
1192 |
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1193 if (cfi_ver >= 0x3134) |
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85
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|
1194 return 1; |
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|
1195 else |
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|
1196 return 0; |
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|
1197 } |
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|
1198 #endif |
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|
1199 |
0
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|
1200 #else // (TARGET == 0) |
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1201 |
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1202 void ffsdrv_device_id_read(uint16 *manufact, uint16 *device) {} |
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|
1203 int ffsdrv_driver_copy_to_ram(int type) { return 0; } |
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1204 |
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|
1205 #endif // (TARGET == 1) |
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|
1206 |
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|
1207 |
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|
1208 /****************************************************************************** |
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1209 * Initialization |
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1210 ******************************************************************************/ |
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1211 |
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|
1212 const struct ffsdrv_s ffsdrv_amd = { |
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|
1213 ffsdrv_null_init, |
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diff
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|
1214 ffsdrv_amd_erase, |
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changeset
|
1215 ffsdrv_amd_write_halfword, |
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diff
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|
1216 ffsdrv_amd_write, |
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diff
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|
1217 ffsdrv_amd_write_end, |
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diff
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|
1218 ffsdrv_amd_erase_suspend, |
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changeset
|
1219 ffsdrv_amd_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1220 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1221 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1222 const struct ffsdrv_s ffsdrv_amd_sb = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1223 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1224 ffsdrv_ram_amd_sb_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1225 ffsdrv_ram_amd_sb_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1226 ffsdrv_generic_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1227 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1228 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1229 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1230 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1231 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1232 const struct ffsdrv_s ffsdrv_sst = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1233 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1234 ffsdrv_sst_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1235 ffsdrv_amd_write_halfword, // Use AMD driver function |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1236 ffsdrv_sst_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1237 ffsdrv_amd_write_end, // Use AMD driver function |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1238 ffsdrv_sst_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1239 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1240 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1241 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1242 const struct ffsdrv_s ffsdrv_sst_sb = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1243 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1244 ffsdrv_null_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1245 ffsdrv_null_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1246 ffsdrv_null_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1247 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1248 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1249 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1250 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1251 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1252 // We use the functions ffsdrv_ram_intel_sb_write_halfword and |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1253 // ffsdrv_ram_intel_erase due to the bug in the intel wireless flash |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1254 // device. See 28F640W30.pdf specification Errata 5. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1255 const struct ffsdrv_s ffsdrv_intel = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1256 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1257 ffsdrv_intel_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1258 ffsdrv_intel_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1259 ffsdrv_generic_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1260 ffsdrv_intel_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1261 ffsdrv_intel_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1262 ffsdrv_intel_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1263 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1264 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1265 const struct ffsdrv_s ffsdrv_intel_sb = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1266 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1267 ffsdrv_ram_intel_sb_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1268 ffsdrv_ram_intel_sb_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1269 ffsdrv_generic_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1270 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1271 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1272 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1273 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1274 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1275 const struct ffsdrv_s ffsdrv_null = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1276 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1277 ffsdrv_null_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1278 ffsdrv_null_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1279 ffsdrv_null_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1280 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1281 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1282 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1283 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1284 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1285 const struct ffsdrv_s ffsdrv_amd_pseudo_sb = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1286 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1287 ffsdrv_amd_pseudo_sb_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1288 ffsdrv_amd_pseudo_sb_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1289 ffsdrv_generic_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1290 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1291 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1292 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1293 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1294 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1295 const struct ffsdrv_s ffsdrv_ram = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1296 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1297 ffsdrv_ram_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1298 ffsdrv_ram_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1299 ffsdrv_ram_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1300 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1301 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1302 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1303 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1304 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1305 #if (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1306 const struct ffsdrv_s ffsdrv_test = { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1307 ffsdrv_null_init, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1308 ffsdrv_test_erase, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1309 ffsdrv_test_write_halfword, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1310 ffsdrv_test_write, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1311 ffsdrv_null_write_end, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1312 ffsdrv_null_erase_suspend, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1313 ffsdrv_null_erase_resume |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1314 }; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1315 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1316 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1317 // Note: This function is designed for little-endian memory addressing! |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1318 void ffsdrv_write_byte(void *dst, uint8 value) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1319 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1320 uint16 halfword; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1321 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1322 tw(tr(TR_FUNC, TrDrvWrite, "ffsdrv_write_byte(0x%05x, 0x%x)\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1323 (int) (addr2offset(dst)), value)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1324 ttw(str(TTrDrvWrite, "wb" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1325 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1326 if ((int) dst & 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1327 halfword = (value << 8) | *((uint8 *) dst - 1); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1328 else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1329 halfword = (*((uint8 *) dst + 1) << 8) | (value); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1330 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1331 ffsdrv.write_halfword((uint16 *) ((int) dst & ~1), halfword); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1332 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1333 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1334 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1335 extern uint16 ffs_flash_manufact; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1336 extern uint16 ffs_flash_device; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1337 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1338 effs_t ffsdrv_init(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1339 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1340 const struct ffsdrv_s *p; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1341 const struct flash_info_s *flash = &flash_info[0]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1342 int error; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1343 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1344 tw(tr(TR_BEGIN, TrDrvInit, "drv_init() {\n")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1345 ttw(str(TTrDrvOther, "ffsdrv_init() {" NL)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1346 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1347 dev.state = DEV_READ; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1348 dev.binfo = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1349 dev.base = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1350 dev.numblocks = 0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1351 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1352 // If ffs_flash_device is zero, detect device automatically by copying |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1353 // the detect function into RAM and execute it from there... |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1354 if (ffs_flash_manufact == 0 && ffs_flash_device == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1355 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1356 #if (TARGET == 1) |
557
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1357 char detect_code[0x80]; |
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1358 typedef (*pf_t)(uint16 *, uint16 *); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1359 pf_t myfp; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1360 uint16 device_id[3]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1361 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1362 ffsdrv_device_id_read_copy_to_ram((uint16 *) detect_code, |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1363 sizeof(detect_code)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1364 // Combine bit 0 of the thumb mode function pointer with the address |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1365 // of the code in RAM. Then call the detect function in RAM. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1366 myfp = (pf_t) (((int) &ffsdrv_device_id_read & 1) | (int) detect_code); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1367 (*myfp)(&dev.manufact, device_id); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1368 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1369 if ((dev.manufact == MANUFACT_AMD || dev.manufact == MANUFACT_FUJITSU) && |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1370 device_id[0] == 0x227E) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1371 // This is a multi-id device |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1372 dev.device = (device_id[1] << 8) | (device_id[2] & 0xFF); |
557
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1373 #if defined(CONFIG_TARGET_PIRELLI) || defined(CONFIG_TARGET_FCFAM) |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1374 if (device_id[1] == 0x2221 && device_id[2] == 0x2200) |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1375 dev.device += ffsdrv_is_new_spansion_flash(); |
7aad22344e77
flash autodetection made to work on FC and Pirelli targets
Mychaela Falconia <falcon@freecalypso.org>
parents:
85
diff
changeset
|
1376 #endif |
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1377 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1378 else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1379 dev.device = device_id[0]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1380 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1381 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1382 else { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1383 dev.manufact = ffs_flash_manufact; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1384 dev.device = ffs_flash_device; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1385 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1386 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1387 tw(tr(TR_FUNC, TrDrvInit, "TARGET = %d\n", TARGET)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1388 tw(tr(TR_FUNC, TrDrvInit, "Looking up device (0x%2x,0x%4x): ", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1389 dev.manufact, dev.device)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1390 while (flash->manufact) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1391 tw(tr(TR_NULL, TrDrvInit, "(0x%02x,0x%04x) ", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1392 flash->manufact, flash->device)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1393 if (dev.manufact == flash->manufact && dev.device == flash->device) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1394 tw(tr(TR_NULL, TrDrvInit, "FOUND ")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1395 break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1396 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1397 flash++; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1398 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1399 tw(tr(TR_NULL, TrDrvInit, "\n")); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1400 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1401 if (flash->manufact == 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1402 tw(tr(TR_END, TrDrvInit, "} (%d)\n", EFFS_NODEVICE)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1403 return EFFS_NODEVICE; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1404 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1405 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1406 dev.binfo = (struct block_info_s *) flash->binfo; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1407 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1408 if (flash->driver == FFS_DRIVER_RAM && flash->base == 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1409 if (ffs_ram_image_address <= 0) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1410 tw(tr(TR_END, TrDrvInit, "} (%d)\n", EFFS_DRIVER)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1411 return EFFS_DRIVER; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1412 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1413 dev.base = (char *) ffs_ram_image_address; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1414 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1415 else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1416 dev.base = (char *) flash->base; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1417 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1418 dev.numblocks = flash->numblocks; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1419 dev.driver = flash->driver; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1420 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1421 // We assume that ALL blocks are of equal size |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1422 dev.blocksize_ld = dev.binfo[0].size_ld; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1423 dev.blocksize = (1 << dev.blocksize_ld); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1424 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1425 dev.atomlog2 = FFS_ATOM_LOG2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1426 dev.atomsize = 1 << dev.atomlog2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1427 dev.atomnotmask = dev.atomsize - 1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1428 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1429 #if (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1430 if (dev.manufact == MANUFACT_TEST) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1431 dev.base = ffsdrv_test_create(); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1432 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1433 p = &ffsdrv_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1434 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1435 #else // (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1436 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1437 // Initialize hardware independent driver functions array |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1438 switch (dev.driver) { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1439 case FFS_DRIVER_AMD: p = &ffsdrv_amd; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1440 case FFS_DRIVER_AMD_SB: p = &ffsdrv_amd_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1441 case FFS_DRIVER_SST: p = &ffsdrv_sst; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1442 case FFS_DRIVER_SST_SB: p = &ffsdrv_sst_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1443 case FFS_DRIVER_INTEL: p = &ffsdrv_intel; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1444 case FFS_DRIVER_INTEL_SB: p = &ffsdrv_intel_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1445 case FFS_DRIVER_AMD_PSEUDO_SB: p = &ffsdrv_amd_pseudo_sb; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1446 case FFS_DRIVER_RAM: p = &ffsdrv_ram; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1447 default: p = &ffsdrv_null; break; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1448 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1449 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1450 #endif // (TARGET == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1451 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1452 // Bind the driver functions |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1453 ffsdrv.init = p->init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1454 ffsdrv.erase = p->erase; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1455 ffsdrv.write_halfword = p->write_halfword; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1456 ffsdrv.write = p->write; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1457 ffsdrv.write_end = p->write_end; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1458 ffsdrv.erase_suspend = p->erase_suspend; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1459 ffsdrv.erase_resume = p->erase_resume; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1460 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1461 // Copy single bank driver code to RAM (and possibly re-bind some of the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1462 // driver functions) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1463 error = ffsdrv_driver_copy_to_ram(dev.driver); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1464 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1465 if (error >= 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1466 error = ffsdrv.init(); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1467 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1468 tw(tr(TR_FUNC, TrDrvInit, "dev.binfo = 0x%x\n", (unsigned int) dev.binfo)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1469 tw(tr(TR_FUNC, TrDrvInit, "dev.base = 0x%x\n", (unsigned int) dev.base)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1470 tw(tr(TR_FUNC, TrDrvInit, "dev.numblocks = %d\n", dev.numblocks)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1471 tw(tr(TR_FUNC, TrDrvInit, "dev.blocksize = %d\n", dev.blocksize)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1472 tw(tr(TR_FUNC, TrDrvInit, "dev.atomlog2/atomsize/atomnotmask = %d/%d/%x\n", |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1473 dev.atomlog2, dev.atomsize, dev.atomnotmask)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1474 tw(tr(TR_END, TrDrvInit, "} %d\n", error)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1475 ttw(ttr(TTrDrvOther, "} %d" NL, error)); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1476 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1477 return error; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1478 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1479 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1480 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1481 /****************************************************************************** |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1482 * Interrupt Enable/Disable |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1483 ******************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1484 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1485 // IMPORTANT NOTE! Apparently, locating this ARM assembly code at the top of |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1486 // this file will make the compiler trash the A1 register between the calls |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1487 // of arm_int_disable and arm_int_enable() thus crashing the whole system. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1488 // If the code is placed AFTER the usage of the functions, the compiler |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1489 // saves the A1 register. Strange but true. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1490 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1491 // IMPORTANT NOTE! Apparently, another strange thing is that if the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1492 // functions are declared static, they don't work! |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1493 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1494 // Executing code from RAM is NOT trivial when we need to jump between ROM |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1495 // (flash) and RAM memory. The ARM only supports 26-bit relative branch |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1496 // offsets. This is the reason why we have a local copy of the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1497 // arm_int_disable/enable() functions in this file plus each of the |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1498 // single-bank drivers. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1499 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1500 #if (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1501 // Note that we use our own interrupt disable/enable function because |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1502 // Nucleus allegedly should have a bug in its implementation for this. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1503 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1504 uint32 int_disable(void) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1505 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1506 asm(" .state16"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1507 asm(" mov A1, #0xC0"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1508 asm(" ldr A2, tct_disable"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1509 asm(" bx A2 "); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1510 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1511 asm("tct_disable .field _TCT_Control_Interrupts+0,32"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1512 asm(" .global _TCT_Control_Interrupts"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1513 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1514 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1515 void int_enable(uint32 cpsr) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1516 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1517 asm(" .state16"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1518 asm(" ldr A2, tct_enable"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1519 asm(" bx A2 "); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1520 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1521 asm("tct_enable .field _TCT_Control_Interrupts+0,32"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1522 asm(" .global _TCT_Control_Interrupts"); |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1523 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1524 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1525 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1526 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1527 uint32 int_disable(void) { return 0; } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1528 void int_enable(uint32 tmp) {} |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1529 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1530 #endif // (TARGET == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1531 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1532 |