FreeCalypso > hg > fc-magnetite

comparison src/cs/drivers/drv_app/ffs/board/dev.c @ 85:204d6866901b

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FFS changes to support C139, Pirelli and future FreeCalypso targets
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 02 Oct 2016 08:10:40 +0000
parents 945cf7f506b2
children db0874a11f57
comparison
equal deleted inserted replaced
84:42d766231c46 85:204d6866901b
10 10
11 #include "ffs/ffs.h" 11 #include "ffs/ffs.h"
12 #include "ffs/board/drv.h" 12 #include "ffs/board/drv.h"
13 #include "config/board.cfg" 13 #include "config/board.cfg"
14 #include "config/rf.cfg" 14 #include "config/rf.cfg"
15 #include "config/fc-target.cfg"
15 16
16 /****************************************************************************** 17 /******************************************************************************
17 18
18 Flash memories supported: 19 Flash memories supported:
19 20
86 // 2. Base 2 logarithm of sector byte size, e.g. 64kB ~ 2^16. 87 // 2. Base 2 logarithm of sector byte size, e.g. 64kB ~ 2^16.
87 // 88 //
88 // Note that does NOT support a flash definition with different sized blocks 89 // Note that does NOT support a flash definition with different sized blocks
89 // so all blocks contained in the device definition MUST be the same size! 90 // so all blocks contained in the device definition MUST be the same size!
90 91
92 #if defined(CONFIG_TARGET_PIRELLI) || defined(CONFIG_TARGET_FCFAM)
93 // 256 KiB sectors
94 static const struct block_info_s flash_32x256[] =
95 {
96 { 0x000000, 18 },
97 { 0x040000, 18 },
98 { 0x080000, 18 },
99 { 0x0C0000, 18 },
100 { 0x100000, 18 },
101 { 0x140000, 18 },
102 { 0x180000, 18 },
103 { 0x1C0000, 18 },
104 { 0x200000, 18 },
105 { 0x240000, 18 },
106 { 0x280000, 18 },
107 { 0x2C0000, 18 },
108 { 0x300000, 18 },
109 { 0x340000, 18 },
110 { 0x380000, 18 },
111 { 0x3C0000, 18 },
112 { 0x400000, 18 },
113 { 0x440000, 18 },
114 { 0x480000, 18 },
115 { 0x4C0000, 18 },
116 { 0x500000, 18 },
117 { 0x540000, 18 },
118 { 0x580000, 18 },
119 { 0x5C0000, 18 },
120 { 0x600000, 18 },
121 { 0x640000, 18 },
122 { 0x680000, 18 },
123 { 0x6C0000, 18 },
124 { 0x700000, 18 },
125 { 0x740000, 18 },
126 { 0x780000, 18 },
127 { 0x7C0000, 18 }
128 };
129 #endif
91 130
92 // 128x64kb 131 // 128x64kb
93 static const struct block_info_s flash_128x64[] = 132 static const struct block_info_s flash_128x64[] =
94 { 133 {
95 { 0x00000, 16 }, 134 { 0x00000, 16 },
314 { &flash_8x8[0], 0, MANUFACT_RAM, 0x080D, 353 { &flash_8x8[0], 0, MANUFACT_RAM, 0x080D,
315 FFS_DRIVER_RAM, 8}, 354 FFS_DRIVER_RAM, 8},
316 355
317 /********** AMD Devices ***********************************************/ 356 /********** AMD Devices ***********************************************/
318 357
358 #ifdef CONFIG_TARGET_PIRELLI
359 // Spansion S71PL129NC0 used in Pirelli DP-L10
360 // ID made up (same as what Pirelli's fw uses), not using autodetect
361 // This is an aftermarket FFS config for the Pirelli target
362 { &flash_32x256[0], (char *) 0x02480000, MANUFACT_AMD, 0x2101,
363 FFS_DRIVER_AMD, 6 },
364 #endif
365
366 #ifdef CONFIG_TARGET_FCFAM
367 // We plan on using the same flash+pSRAM chip in our own
368 // FreeCalypso hardware designs, but on a different chip select.
369 // Let's use the first 2 MiB of the 2nd bank for the FFS.
370 { &flash_32x256[0], (char *) 0x01800000, MANUFACT_AMD, 0x2101,
371 FFS_DRIVER_AMD, 8 },
372 #endif
373
319 // AMD Am29DL640F. Ignoring the 8kB sectors 374 // AMD Am29DL640F. Ignoring the 8kB sectors
320 // Multi-id device: 0x227E, 0x2221, 0x2200. Converted to 0x2100 375 // Multi-id device: 0x227E, 0x2221, 0x2200. Converted to 0x2100
321 { &flash_16x64[0], (char *) 0x01800000, MANUFACT_AMD, 0x2100, 376 { &flash_16x64[0], (char *) 0x01800000, MANUFACT_AMD, 0x2100,
322 FFS_DRIVER_AMD, 15 }, 377 FFS_DRIVER_AMD, 15 },
323 378
419 // Intel 28F160C3-B, 16Mb. Using top-most 6x64kB sectors 474 // Intel 28F160C3-B, 16Mb. Using top-most 6x64kB sectors
420 { &flash_16x64[0], (char *) 0x1A0000, MANUFACT_INTEL, 0x88C3, 475 { &flash_16x64[0], (char *) 0x1A0000, MANUFACT_INTEL, 0x88C3,
421 FFS_DRIVER_INTEL_SB, 6 }, 476 FFS_DRIVER_INTEL_SB, 6 },
422 477
423 // Intel 28F320C3-T, 32Mb. Using top-most 8x8kB (parameter) sectors. 478 // Intel 28F320C3-T, 32Mb. Using top-most 8x8kB (parameter) sectors.
479 #ifdef CONFIG_TARGET_C139
480 // Changed for C139 aftermarket FFS config: 64x3 at 0x3C0000
481 { &flash_16x64[0], (char *) 0x3C0000, MANUFACT_INTEL, 0x88C4,
482 FFS_DRIVER_INTEL_SB, 3 },
483 #else
424 { &flash_8x8[0], (char *) 0x3F0000, MANUFACT_INTEL, 0x88C4, 484 { &flash_8x8[0], (char *) 0x3F0000, MANUFACT_INTEL, 0x88C4,
425 FFS_DRIVER_INTEL_SB, 8 }, 485 FFS_DRIVER_INTEL_SB, 8 },
486 #endif
426 487
427 // Intel 28F320C3-B, 32Mb. Using top-most 8x64kB sectors 488 // Intel 28F320C3-B, 32Mb. Using top-most 8x64kB sectors
428 { &flash_16x64[0], (char *) 0x380000, MANUFACT_INTEL, 0x88C5, 489 { &flash_16x64[0], (char *) 0x380000, MANUFACT_INTEL, 0x88C5,
429 FFS_DRIVER_INTEL_SB, 8 }, 490 FFS_DRIVER_INTEL_SB, 8 },
430 491