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comparison src/cs/services/dar/dar_diagnose.c @ 0:945cf7f506b2

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src/cs: chipsetsw import from tcs211-fcmodem binary blobs and LCD demo files have been excluded, all line endings are LF only
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 25 Sep 2016 22:50:11 +0000
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1 /****************************************************************************/
2 /* */
3 /* File Name: dar_diagnose.c */
4 /* */
5 /* Purpose: This function contains the DAR diagnose functions */
6 /* */
7 /* */
8 /* Version 0.1 */
9 /* */
10 /* Date Modification */
11 /* ------------------------------------ */
12 /* 18 October 2001 Create */
13 /* */
14 /* Author Stephanie Gerthoux */
15 /* */
16 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved*/
17 /****************************************************************************/
18
19 #include "rv/rv_defined_swe.h"
20 #ifdef RVM_DAR_SWE
21 #ifndef _WINDOWS
22 #include "timer/timer.h"
23 #endif
24
25 #include "rv/rv_general.h"
26 #include "rvm/rvm_gen.h"
27 #include "rvm/rvm_priorities.h"
28 #include "dar/dar_api.h"
29 #include "dar/dar_structs_i.h"
30 #include "dar/dar_env.h"
31 #include "rvf/rvf_target.h"
32 #include "dar/dar_const_i.h"
33 #include "dar/dar_macro_i.h"
34 #include "dar/dar_messages_i.h"
35 #include "dar/dar_error_hdlr_i.h"
36 //#include "rvf/rvf_i.h"
37
38 /**** Global variables ****/
39
40 /* Define a pointer to the Global Environment Control block */
41 extern T_DAR_ENV_CTRL_BLK *dar_gbl_var_p;
42
43
44
45 /********************************************************************************/
46 /* Function dar_search_group */
47 /* */
48 /* Description This function checks if the use_id group_nb exists: */
49 /* */
50 /********************************************************************************/
51 T_RV_RET dar_search_group(UINT16 group, UINT8 *index_p)
52 {
53 /* Declare local variables */
54 UINT8 i=0;
55
56 /* Check if the DAR entity is started */
57 if (dar_gbl_var_p != NULL )
58 {
59 /* Search in the dar_filter_array if the group exists */
60 for (i=0;i< DAR_MAX_GROUP_NB; i++)
61 {
62 if(dar_gbl_var_p->dar_filter_array[i].group_nb == group)
63 {
64 *index_p=i;
65 //DAR_SEND_TRACE_PARAM("dar filter_array index",*index_p,RV_TRACE_LEVEL_DEBUG_LOW);
66 return(RV_OK);
67 }
68 }
69 return(RV_NOT_SUPPORTED);
70 }
71 else
72 {
73 return(RV_NOT_READY);
74 }
75 }
76
77 /********************************************************************************/
78 /* Function dar_add_group */
79 /* */
80 /* Description This function research the index of the first free group */
81 /* */
82 /********************************************************************************/
83 T_RV_RET dar_add_group(UINT8 *index_p)
84 {
85 /* Declare local variables */
86 UINT8 i=0;
87
88 /* Check if the DAR entity is started */
89 if (dar_gbl_var_p == NULL )
90 {
91 dar_error_trace(DAR_ENTITY_NOT_START);
92 return(RV_NOT_READY);
93 }
94
95 /* Search in the dar_filter_array the first free group */
96 for (i=0;i< DAR_MAX_GROUP_NB; i++)
97 {
98 if(dar_gbl_var_p->dar_filter_array[i].group_nb == DAR_INITIALIZATION_VALUE)
99 {
100 *index_p=i;
101 return(RV_OK);
102 }
103 }
104 return(RV_NOT_SUPPORTED);
105 }
106
107
108 /********************************************************************************/
109 /* */
110 /* Function Name: dar_send_write_data */
111 /* */
112 /* Purpose: This function is called to send write data in the DAR mailbox */
113 /* */
114 /* Input Parameters: */
115 /* Pointer to the message to store */
116 /* Data Format, */
117 /* Data level, */
118 /* Data Use Id, */
119 /* */
120 /* Output Parameters: */
121 /* Validation of the function execution. */
122 /* */
123 /* Note: */
124 /* None */
125 /* */
126 /********************************************************************************/
127
128 T_RV_RET dar_send_write_data ( T_DAR_INFO *buffer_p,
129 T_DAR_FORMAT format,
130 T_DAR_LEVEL diagnose_info_level,
131 T_RVM_USE_ID dar_use_id)
132 {
133 /* Declare local variables */
134 T_RVF_MB_STATUS mb_status = RVF_GREEN;
135 T_DAR_WRITE_START *write_data_p = NULL;
136
137 /************************** dar_send_write_data **********************/
138
139 if (dar_gbl_var_p != NULL )
140 {
141 /* allocate the memory for the message to send */
142 mb_status = rvf_get_buf (dar_gbl_var_p->mb_dar,
143 sizeof (T_DAR_WRITE_START),
144 (T_RVF_BUFFER **) (&write_data_p));
145
146 /* If insufficient resources, then report a memory error and abort.*/
147 if (mb_status == RVF_YELLOW)
148 {
149 /* deallocate the memory */
150 rvf_free_buf((T_RVF_BUFFER *)write_data_p);
151 dar_error_trace(DAR_ENTITY_NO_MEMORY);
152 return (RV_NOT_SUPPORTED);
153 }
154 else
155 if (mb_status == RVF_RED)
156 {
157 dar_error_trace(DAR_ENTITY_NO_MEMORY);
158 return (RV_MEMORY_ERR);
159 }
160
161 /* fill the message id */
162 write_data_p->os_hdr.msg_id = DAR_WRITE_REQ;
163
164 /* fill the addr source id */
165 write_data_p->os_hdr.src_addr_id = dar_gbl_var_p->addrId;
166
167 /* fill the message parameters */
168 write_data_p->data_write.char_p = buffer_p ;
169 write_data_p->data_write.data_format = format;
170 write_data_p->data_write.level = diagnose_info_level;
171 write_data_p->data_write.use_id.group_nb = (dar_use_id>>16)& 0x7FFF;
172 write_data_p->data_write.use_id.mask = (dar_use_id)&0xFFFF;
173
174 /* send the messsage to the DAR entity */
175 rvf_send_msg (dar_gbl_var_p->addrId,
176 write_data_p);
177
178 return (RV_OK);
179 }
180 else
181 {
182 return(RV_NOT_READY);
183 }
184
185
186 } /* dar_send_write_data */
187
188 /********************************************************************************/
189 /* Function dar_reset */
190 /* */
191 /* Description This function is used to reset the system */
192 /* */
193 /* Input Parameters: */
194 /* None */
195 /* */
196 /* Output Parameters: */
197 /* Validation of the function execution. */
198 /* */
199 /* Note: */
200 /* None */
201 /* */
202 /********************************************************************************/
203 T_RV_RET dar_reset(void)
204 {
205 #ifndef _WINDOWS
206 /* Declare global variable*/
207 volatile UINT16 *register_p;
208 volatile UINT8 i;
209
210
211 /* enable the Watchdog timer */
212 TM_EnableWatchdog();
213
214 /* Reset the system with the Watchdog */
215 /* initialize the adress of the watchdog timer pointer */
216 register_p = (volatile UINT16 *)WATCHDOG_TIM_MODE;
217
218 /* Write the 0xF5 value to the Watchdog timer mode register to disable the Watchdog*/
219 /* Note the bit 15 must be unchanged ( bit 15 = 1 -> 0x8000)*/
220 *register_p =0x80F5;
221
222 /* Wait a couple of time to be sure that this register has a new value */
223 for (i=0;i<100;i++);
224
225 /* After having received 0xF5 in the Watchdog timer mode register, if the */
226 /* second write access is differennt from 0xA0, ARM core is reset */
227 /* The ARM HW core is reset + branch to adress 0x0000 ( SW reset) */
228 *register_p=0x80F5;
229
230 /* Wait until the ARM reset */
231 while(1);
232 #endif
233
234 return(RV_OK);
235 } /* dar_reset */
236
237
238 /********************************************************************************/
239 /* */
240 /* Function dar_read_mbox */
241 /* */
242 /* Description Called by the dar to read a buffer from its mailboxes. */
243 /* when the Operating System is out */
244 /* Input Parameters: */
245 /* None */
246 /* */
247 /* Output Parameters: */
248 /* NULL if the mailbox was empty, else the address of a buffer */
249 /* */
250 /********************************************************************************/
251
252 void * dar_read_mbox (UINT8 mbox)
253 {
254 // void * p_buf = NULL;
255 // T_RVF_INTERNAL_BUF * p_hdr;
256
257 /* Verify if DAR's global struct was set by RVM, then read the mailbox */
258 if (dar_gbl_var_p != NULL )
259 return rvf_read_addr_mbox (dar_gbl_var_p->addrId, mbox);
260
261 return NULL;
262
263 // Check if the DAR entity is started
264 /*if (dar_gbl_var_p != NULL )
265 {
266
267 if ( OSTaskQFirst[dar_gbl_var_p->addrId][mbox] )// if the chained list is not empty
268 {
269 p_hdr = OSTaskQFirst[dar_gbl_var_p->addrId][mbox];
270 OSTaskQFirst[dar_gbl_var_p->addrId][mbox] = p_hdr->p_next;
271
272 p_hdr->p_next = NULL;
273
274 #if RVF_ENABLE_BUF_LINKAGE_CHECK
275 RVF_SET_BUF_UNLINKED(p_hdr); // change buffer status
276 #endif
277
278 p_buf = (UINT8 *)p_hdr + sizeof(T_RVF_INTERNAL_BUF);
279 }
280 }
281 return (p_buf); */
282 } // dar_read_mbox
283
284 #else
285
286 /* ******************************************************* */
287 /* THE DAR ENTITY IS DISABLED */
288 /* ******************************************************* */
289 #ifndef _WINDOWS
290 #include "config/swconfig.cfg"
291 #include "config/sys.cfg"
292 #include "config/chipset.cfg"
293 #include "timer/timer.h"
294 #endif
295
296 #include "rv/rv_general.h"
297 #include "rvm/rvm_gen.h"
298 #include "rvm/rvm_priorities.h"
299 #include "rvf/rvf_target.h"
300 //#include "rvf/rvf_i.h"
301
302 /* Define the Watchdog timer register mode */
303 #define WATCHDOG_TIM_MODE (0xFFFFF804)
304
305
306 /********************************************************************************/
307 /* Function dar_reset */
308 /* */
309 /* Description This function is used to reset the system */
310 /* */
311 /* Input Parameters: */
312 /* None */
313 /* */
314 /* Output Parameters: */
315 /* Validation of the function execution. */
316 /* */
317 /* Note: */
318 /* None */
319 /* */
320 /********************************************************************************/
321 T_RV_RET dar_reset(void)
322 {
323 #ifndef _WINDOWS
324 /* Declare global variable*/
325 volatile UINT16 *register_p;
326 volatile UINT8 i;
327
328
329 /* enable the Watchdog timer */
330 TM_EnableWatchdog();
331
332 /* Reset the system with the Watchdog */
333 /* initialize the adress of the watchdog timer pointer */
334 register_p = (volatile UINT16 *)WATCHDOG_TIM_MODE;
335
336 /* Write the 0xF5 value to the Watchdog timer mode register to disable the Watchdog*/
337 /* Note the bit 15 must be unchanged ( bit 15 = 1 -> 0x8000)*/
338 *register_p =0x80F5;
339
340 /* Wait a couple of time to be sure that this register has a new value */
341 for (i=0;i<100;i++);
342
343 /* After having received 0xF5 in the Watchdog timer mode register, if the */
344 /* second write access is differennt from 0xA0, ARM core is reset */
345 /* The ARM HW core is reset + branch to adress 0x0000 ( SW reset) */
346 *register_p=0x80F5;
347
348 /* Wait until the ARM reset */
349 while(1);
350 #endif
351
352 return(RV_OK);
353 } /* dar_reset */
354
355 #endif /* #ifdef RVM_DAR_SWE */