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comparison src/cs/drivers/drv_app/ffs/board/intelsbdrv.c @ 46:559a8b3ef10b

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FFS code: first attempt at non-invasive gcc support
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 19 Jul 2018 00:35:33 +0000
parents b6a5e36de839
children 4484ab3f6ab3
comparison
equal deleted inserted replaced
45:e955d102e7c4 46:559a8b3ef10b
11 #include "ffs.cfg" 11 #include "ffs.cfg"
12 12
13 #include "ffs/ffs.h" 13 #include "ffs/ffs.h"
14 #include "ffs/board/drv.h" 14 #include "ffs/board/drv.h"
15 #include "ffs/board/ffstrace.h" 15 #include "ffs/board/ffstrace.h"
16 #include "nucleus.h"
16 17
17 18
18 #define INTEL_UNLOCK_SLOW 1 19 #define INTEL_UNLOCK_SLOW 1
19 20
20 21
26 // Status bits for Intel flash memory devices 27 // Status bits for Intel flash memory devices
27 #define INTEL_STATE_MACHINE_DONE (1<<7) 28 #define INTEL_STATE_MACHINE_DONE (1<<7)
28 #define FLASH_READ(addr) (*(volatile uint16 *) (addr)) 29 #define FLASH_READ(addr) (*(volatile uint16 *) (addr))
29 #define FLASH_WRITE(addr, data) (*(volatile uint16 *) (addr)) = data 30 #define FLASH_WRITE(addr, data) (*(volatile uint16 *) (addr)) = data
30 31
32 #ifdef __GNUC__
33 asm(".globl ffsdrv_ram_intel_begin");
34 asm("ffsdrv_ram_intel_begin:");
35 #else
31 asm(" .label _ffsdrv_ram_intel_begin"); 36 asm(" .label _ffsdrv_ram_intel_begin");
32 asm(" .def _ffsdrv_ram_intel_begin"); 37 asm(" .def _ffsdrv_ram_intel_begin");
38 #endif
33 39
34 uint32 intel_int_disable(void); 40 uint32 intel_int_disable(void);
35 void intel_int_enable(uint32 tmp); 41 void intel_int_enable(uint32 tmp);
36 42
37 /****************************************************************************** 43 /******************************************************************************
220 * Interrupt Enable/Disable 226 * Interrupt Enable/Disable
221 ******************************************************************************/ 227 ******************************************************************************/
222 228
223 uint32 intel_int_disable(void) 229 uint32 intel_int_disable(void)
224 { 230 {
231 #ifdef __GNUC__
232 return NU_Control_Interrupts(0xC0);
233 #else
225 asm(" .state16"); 234 asm(" .state16");
226 asm(" mov A1, #0xC0"); 235 asm(" mov A1, #0xC0");
227 asm(" ldr A2, tct_intel_disable"); 236 asm(" ldr A2, tct_intel_disable");
228 asm(" bx A2 "); 237 asm(" bx A2 ");
229 238
230 asm("tct_intel_disable .field _TCT_Control_Interrupts+0,32"); 239 asm("tct_intel_disable .field _TCT_Control_Interrupts+0,32");
231 asm(" .global _TCT_Control_Interrupts"); 240 asm(" .global _TCT_Control_Interrupts");
241 #endif
232 } 242 }
233 243
234 void intel_int_enable(uint32 cpsr) 244 void intel_int_enable(uint32 cpsr)
235 { 245 {
246 #ifdef __GNUC__
247 return NU_Control_Interrupts(cpsr);
248 #else
236 asm(" .state16"); 249 asm(" .state16");
237 asm(" ldr A2, tct_intel_enable"); 250 asm(" ldr A2, tct_intel_enable");
238 asm(" bx A2 "); 251 asm(" bx A2 ");
239 252
240 asm("tct_intel_enable .field _TCT_Control_Interrupts+0,32"); 253 asm("tct_intel_enable .field _TCT_Control_Interrupts+0,32");
241 asm(" .global _TCT_Control_Interrupts"); 254 asm(" .global _TCT_Control_Interrupts");
255 #endif
242 } 256 }
243 257
244 // Even though we have this end label, we cannot determine the number of 258 // Even though we have this end label, we cannot determine the number of
245 // constant/PC-relative data following the code! 259 // constant/PC-relative data following the code!
260 #ifdef __GNUC__
261 asm(".globl ffsdrv_ram_intel_end");
262 asm("ffsdrv_ram_intel_end:");
263 #else
246 asm(" .state32"); 264 asm(" .state32");
247 asm(" .label _ffsdrv_ram_intel_end"); 265 asm(" .label _ffsdrv_ram_intel_end");
248 asm(" .def _ffsdrv_ram_intel_end"); 266 asm(" .def _ffsdrv_ram_intel_end");
267 #endif