changeset 179:2a9935250c95

src/cs: sync with Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 04 Jan 2020 21:38:55 +0000
parents 42edfb87ae0f
children e69e6b9a28b5
files src/cs/drivers/drv_app/ffs/board/dev.c src/cs/drivers/drv_core/armio/armio.c src/cs/layer1/tpu_drivers/source0/tpudrv12.h src/cs/system/template/gsm_ds_amd8_compact.template
diffstat 4 files changed, 196 insertions(+), 10 deletions(-) [+]
line wrap: on
line diff
--- a/src/cs/drivers/drv_app/ffs/board/dev.c	Sat Jan 04 21:24:04 2020 +0000
+++ b/src/cs/drivers/drv_app/ffs/board/dev.c	Sat Jan 04 21:38:55 2020 +0000
@@ -126,10 +126,7 @@
   { 0x780000, 18 },
   { 0x7C0000, 18 }
 };
-#endif
 
-#if defined(CONFIG_TARGET_LEONARDO) || defined(CONFIG_TARGET_PIRELLI) || \
-	defined(CONFIG_TARGET_FCFAM)
 // 128x64kb
 static const struct block_info_s flash_128x64[] =
 {
@@ -547,7 +544,7 @@
     { &flash_16x64[0], (char *) 0x700000, MANUFACT_FUJITSU, 0x0201,
       FFS_DRIVER_AMD_SB, 15 },
 
-#ifdef CONFIG_TARGET_LEONARDO
+#if 0
     // Fujitsu MB84VF5F5F4J2 stacked device. Using the 2nd sub device
     // The 8x8 are located both in top and bottom, thus only 126
     // blocks are used.
--- a/src/cs/drivers/drv_core/armio/armio.c	Sat Jan 04 21:24:04 2020 +0000
+++ b/src/cs/drivers/drv_core/armio/armio.c	Sat Jan 04 21:38:55 2020 +0000
@@ -189,7 +189,7 @@
    * FreeCalypso change: we don't have BT, our new criterion is
    * whether or not a given board is wired for MCSI.
    */
-  #if defined(CONFIG_TARGET_FCMODEM) || defined(CONFIG_TARGET_PIRELLI)
+  #if defined(CONFIG_MCSI_MODEM) || defined(CONFIG_TARGET_PIRELLI)
     AI_DisableBit(5);
     AI_DisableBit(6);
     AI_DisableBit(7);
@@ -268,7 +268,7 @@
     // if we are in an MMI!=0 build - for ACI builds use the AT@SPKR command.
 #ifdef CONFIG_TARGET_GTM900
       *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F01;
-#elif (MMI != 0)
+#elif (MMI != 0) || defined(CONFIG_GPIO1_HIGH)
       *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F02;
 #else
       *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00;
@@ -283,7 +283,9 @@
       AI_ConfigBitAsOutput(0);
     #endif
     AI_ConfigBitAsOutput(1);
-    AI_ConfigBitAsOutput(2);
+    #ifndef CONFIG_TARGET_LEONARDO	/* GPIO 2 is an input on Leonardo! */
+      AI_ConfigBitAsOutput(2);
+    #endif
     #ifdef CONFIG_TARGET_GTAMODEM
       AI_ConfigBitAsOutput(3);
     #endif
@@ -295,7 +297,7 @@
       AI_ConfigBitAsOutput(6);
     #endif
     AI_ConfigBitAsOutput(7);
-    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
+    #if 1	/* FreeCalypso addition for all targets */
       AI_ConfigBitAsOutput(8);
     #endif
     AI_ConfigBitAsOutput(9);
@@ -304,7 +306,7 @@
       AI_ConfigBitAsOutput(11);
       AI_ConfigBitAsOutput(12);
     #endif
-    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCFAM)
+    #if 1	/* FreeCalypso addition for all targets */
       AI_ConfigBitAsOutput(13);
     #endif
     AI_ConfigBitAsOutput(14);
--- a/src/cs/layer1/tpu_drivers/source0/tpudrv12.h	Sat Jan 04 21:24:04 2020 +0000
+++ b/src/cs/layer1/tpu_drivers/source0/tpudrv12.h	Sat Jan 04 21:38:55 2020 +0000
@@ -234,7 +234,8 @@
 #define TEST_TX_ON    0
 #define TEST_RX_ON    0
 
-#if defined(CONFIG_TARGET_LEONARDO) || defined(CONFIG_TARGET_ESAMPLE)
+#if defined(CONFIG_TARGET_LEONARDO) || defined(CONFIG_TARGET_ESAMPLE) || \
+	defined(CONFIG_TARGET_TANGO)
 
   // 4-band config (E-sample, P2, Leonardo)
   #define FEM_7         BIT_2     // act2
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/system/template/gsm_ds_amd8_compact.template	Sat Jan 04 21:38:55 2020 +0000
@@ -0,0 +1,186 @@
+/*
+ * Integrated Protocol Stack Linker command file (all components)
+ *
+ * Target : ARM
+ *
+ * Copyright (c) Texas Instruments 2002, Condat 2002
+ *
+ */
+
+-c /* Autoinitialize variables at runtime */
+
+/*********************************/
+/* SPECIFY THE SYSTEM MEMORY MAP */
+/*********************************/
+
+MEMORY
+{
+  /* CS0: Flash 8 Mbytes ****************************************************/
+  /* Interrupt Vectors Table */
+  I_MEM   (RXI) : org = 0x00000000   len = 0x00000100
+
+  /* Boot Sector */
+  B_MEM   (RXI) : org = 0x00000100   len = 0x00001f00
+
+  /* Magic Word for Calypso Boot ROM */
+  MWC_MEM (RXI)  : org = 0x00002000   len = 0x00000004  fill = 0x0000001
+
+  /* Program Memory */
+  P_MEM1  (RXI) : org = 0x00004000   len = 0x00000700
+  P_MEM2  (RXI) : org = 0x00004700   len = 0x00000004
+  P_MEM3  (RXI) : org = 0x00004704   len = 0x00400000
+
+  /* FFS Area */
+  FFS_MEM (RX)  : org = 0x01800000   len = 0x00200000
+  /**************************************************************************/
+
+  /* CS1: External SRAM 1 Mbytes ********************************************/
+  /* Data Memory */
+
+  /*
+   * FreeCalypso: we try to support several different Leonardo board
+   * variants with different flash and XRAM sizes.  In this template
+   * we are going to define two XRAM regions of 1 MiB each.
+   */
+  D_MEM1  (RW)  : org = 0x01000000   len = 0x00100000
+  D_MEM2  (RW)  : org = 0x01100000   len = 0x00100000
+  /**************************************************************************/
+
+  /* CS6: Calypso Internal SRAM 512 kbytes **********************************/
+  /* Code & Variables Memory */
+  S_MEM   (RXW) : org = 0x00800000   len = 0x00080000
+  /**************************************************************************/
+}
+
+/***********************************************/
+/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
+/***********************************************/
+
+/*
+ * Since the bootloader directly calls the INT_Initialize() routine located
+ * in int.s, this int.s code must always be mapped at the same address
+ * (usually in the second flash sector). Its length is about 0x500 bytes.
+ * Then comes the code that need to be loaded into the internal RAM.
+ */
+
+SECTIONS
+{
+    .intvecs : {} > I_MEM      /* Interrupt Vectors Table */
+    .monitor : > B_MEM         /* Monitor Constants & Code */
+    {
+        $(CONST_BOOT_LIB)
+    }
+
+    .inttext : {} > P_MEM1     /* int.s Code */
+
+    .bss_dar : > D_MEM1        /* DAR SWE Variables */
+    {
+        $(BSS_DAR_LIB)
+    }
+
+    /*
+     * The .bss section should not be split to ensure it is initialized to 0
+     * each time the SW is reset. So the whole .bss is mapped either in D_MEM1
+     * or in D_MEM2.
+     */
+
+    .bss     : > D_MEM1 | D_MEM2        /* Global & Static Variables */
+    {
+        $(BSS_BOOT_LIB)
+    }
+
+    /*
+     * All .bss sections, which must be mapped in internal RAM must be
+     * grouped in order to initialized the corresponding memory to 0.
+     * This initialization is done in int.s file before calling the Nucleus
+     * routine.
+     */
+
+    GROUP
+    {
+      S_D_Mem /* Label of start address of .bss section in Int. RAM */
+      .DintMem
+      {
+
+        /*
+         * .bss sections of the application
+         */
+
+        $(BSS_LIBS)
+
+      }
+
+      API_HISR_stack : {}
+ 
+      E_D_Mem /* Label of end address of .bss section in Int. RAM */
+    } > S_MEM
+
+    /*
+     * .text and .const sections which must be mapped in internal RAM.
+     */
+
+    .ldfl    : {} > P_MEM2 /* Used to know the start load address */
+    GROUP load = P_MEM3, run = S_MEM
+    {
+      S_P_Mem  /* Label of start address of .text & .const sections in Int. RAM */
+      .PIntMem
+      {
+        /*
+         * .text and .const sections of the application.
+         *
+         * The .veneer sections correspond exactly to .text:v&n sections
+         * implementing the veneer functions. The .text:v$n -> .veneer
+         * translation is performed by PTOOL software when PTOOL_OPTIONS
+         * environement variable is set to veneer_section.
+         */
+
+        $(CONST_LIBS)
+
+      }
+      E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */
+    }
+
+    /*
+     * The rest of the code is mapped in flash, however the trampolines
+     * load address should be consistent with .text.
+     */
+    COMMENT2START      
+    `trampolines load = P_MEM3, run = S_MEM
+    COMMENT2END
+
+    .text    : {} >  P_MEM3  /* Code */
+
+    /*
+     * The rest of the constants is mapped in flash.
+     * The .cinit section should not be split.
+     */
+
+    .cinit   : {} >  P_MEM3  /* Initialization Tables */
+    .const   : {} >  P_MEM3  /* Constant Data */
+    KadaAPI  : {} >  P_MEM3  /* ROMized CLDC */
+
+    .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */
+
+    .stackandheap : > D_MEM1   /* System Stacks, etc... */
+    {
+      /* Leave 20 32bit words for register pushes. */
+      . = align(8);
+      . += 20 * 4;
+
+      /* Stack for abort and/or undefined modes. */
+      exception_stack = .;
+
+      /* Leave 38 32bit words for state saving on exceptions. */
+      _xdump_buffer = .;
+      . += 38 * 4;
+      . = align(8);
+
+      /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
+      stack_segment = .;
+      . += 0xB00;
+    }
+
+    .data    : {} > D_MEM1     /* Initialized Data */
+    .sysmem  : {} > D_MEM1     /* Dynamic Memory Allocation Area */
+
+}