annotate boards/sim-fpc-pasv/src/Makefile @ 25:c03a882cc49e

doc/Sniffer-FPGA-design: update for working status
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Aug 2023 06:37:58 +0000
parents fbbafa93b52b
children
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1 BOMS= tallied-bom.txt tallied-bom.csv comptab.txt
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2 NETS= sverp.unet bound.unet pcb-netlist.txt
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3
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4 all: ${BOMS} ${NETS} elements.pcb
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5
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6 sverp.unet: schem.v primitives
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7 ueda-sverp -o $@ schem.v
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8
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9 bound.unet: MCL sverp.unet
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10 unet-bind -c sverp.unet $@
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11
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12 pcb-netlist.txt: bound.unet
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13 unet2pcb bound.unet $@
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14
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15 tallied-bom.txt: MCL
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16 ueda-mkbom -cr > $@
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17
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18 tallied-bom.csv: MCL
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19 ueda-csvbom > $@
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20
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21 comptab.txt: MCL
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22 ueda-shortbom > $@
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23
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24 elements.pcb: MCL
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25 ueda-getfps -ch | ueda-runm4 > $@
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26
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27 clean:
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28 rm -f *.unet *.txt *.csv errs elements.pcb