FreeCalypso > hg > fc-sim-sniff

diff fpga/sniffer-basic/Makefile @ 9:10c779b8753e

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
FPGA Makefile: capture yosys stdout
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:00:16 +0000
parents 7cab8e0dd937
children d29dcfa78124
line wrap: on
line diff
--- a/fpga/sniffer-basic/Makefile	Mon Aug 21 00:55:33 2023 +0000
+++ b/fpga/sniffer-basic/Makefile	Mon Aug 21 01:00:16 2023 +0000
@@ -5,7 +5,7 @@
 all:	${PROJ}.bin
 
 ${PROJ}.json:	${VSRC}
-	yosys-wrap top $@ ${VSRC}
+	yosys-wrap top $@ ${VSRC} | tee synthesis.rpt
 
 ${PROJ}.asc:	${PROJ}.json ${PCF}
 	nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \