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view fpga/sniffer-basic/Makefile @ 8:7cab8e0dd937

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FPGA Makefile: yosys-wrap installed on Mother's system
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 00:55:33 +0000
parents 7db5fd6646df
children 10c779b8753e
line wrap: on
line source

VSRC=	clk_edge.v reset_detect.v sniff_rx.v sync_inputs.v top.v uart_tx.v
PCF=	icestick.pcf
PROJ=	fpga

all:	${PROJ}.bin

${PROJ}.json:	${VSRC}
	yosys-wrap top $@ ${VSRC}

${PROJ}.asc:	${PROJ}.json ${PCF}
	nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \
		--json ${PROJ}.json

${PROJ}.bin:	${PROJ}.asc
	icepack $< $@

clean:
	rm -f *.json *.asc *.bin