diff fpga/sniffer-pps/spenh_ctrl.v @ 31:ab37fcb71744

fpga/sniffer-pps: add actual F/D control
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Aug 2023 21:22:37 +0000
parents
children
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/fpga/sniffer-pps/spenh_ctrl.v	Tue Aug 29 21:22:37 2023 +0000
@@ -0,0 +1,29 @@
+/*
+ * This module implements speed enhancement control based on signals
+ * from the PPS catcher block.
+ */
+
+module spenh_ctrl (IntClk, SIM_RST_sync, Rx_strobe, Rx_char,
+		   pos_PPS_resp_PPS1, pos_PPS_resp_PCK,
+		   speed_enh_mode, speed_enh_mult);
+
+input IntClk;
+input SIM_RST_sync;
+input Rx_strobe;
+input [7:0] Rx_char;
+input pos_PPS_resp_PPS1, pos_PPS_resp_PCK;
+
+output reg speed_enh_mode;
+output reg [1:0] speed_enh_mult;
+
+always @(posedge IntClk)
+	if (!SIM_RST_sync)
+		speed_enh_mode <= 1'b0;
+	else if (Rx_strobe && pos_PPS_resp_PCK)
+		speed_enh_mode <= 1'b1;
+
+always @(posedge IntClk)
+	if (Rx_strobe && pos_PPS_resp_PPS1)
+		speed_enh_mult <= Rx_char[1:0];
+
+endmodule