FreeCalypso > hg > fc-small-hw

annotate duart28/src/Makefile @ 33:0073141010a2

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
duart28/src/Makefile: netlist MCL binding added
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 05 Jul 2020 00:10:45 +0000
parents 22aba3a61a4b
children ace9b7659f7f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
23
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
1 VSRCS= vsrc/FT2232D_block.v vsrc/FT2232D_chip.v vsrc/USB_block.v \
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
2 vsrc/application_block.v vsrc/board.v vsrc/eeprom_93Cx6_16bit.v \
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
3 vsrc/regulator_ic.v vsrc/regulator_with_caps.v vsrc/target_if.v \
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
4 vsrc/usb_conn.v
20
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 BOMS= tallied-bom.txt tallied-bom.csv comptab.txt
33
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
6 NETS= sverp.unet bound.unet pcb-netlist.txt
20
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7
23
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
8 all: ${BOMS} ${NETS} elements.pcb
20
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 tallied-bom.txt: MCL
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 ueda-mkbom -cr > $@
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 tallied-bom.csv: MCL
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 ueda-csvbom > $@
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 comptab.txt: MCL
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 ueda-shortbom > $@
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 elements.pcb: MCL
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 ueda-getfps -ch | ueda-runm4 > $@
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21
23
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
22 sverp.unet: ${VSRCS} primitives Makefile
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
23 ueda-sverp -o $@ ${VSRCS}
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
diff changeset
24
33
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
25 bound.unet: MCL sverp.unet
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
26 unet-bind -c sverp.unet $@
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
27
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
28 pcb-netlist.txt: bound.unet
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
29 unet2pcb bound.unet $@
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
diff changeset
30
20
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 clean:
54e5edfe2f04 duart28 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32 rm -f *.unet *.txt *.csv errs elements.pcb