FreeCalypso > hg > fc-small-hw

annotate fc-uja/design-spec @ 77:4c5675c79555

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lunalcd3.pcb: add orientation marker to SW1
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 18 Nov 2021 07:40:13 +0000
parents 0f9bdd60ce50
children
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0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
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1 FreeCalypso UART+JTAG Adapter
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Mychaela Falconia <falcon@freecalypso.org>
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2 Board design specification
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Mychaela Falconia <falcon@freecalypso.org>
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3
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Mychaela Falconia <falcon@freecalypso.org>
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4 1. Purpose and scope
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Mychaela Falconia <falcon@freecalypso.org>
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5
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Mychaela Falconia <falcon@freecalypso.org>
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6 The circuit board described in this specification will be an adapter for
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Mychaela Falconia <falcon@freecalypso.org>
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7 connecting a host PC or laptop (via USB) to the following 3 development
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Mychaela Falconia <falcon@freecalypso.org>
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8 interfaces on FreeCalypso GSM devices:
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9
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10 * A 3-wire UART interface intended for RVTMUX on Calypso's IrDA UART
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Mychaela Falconia <falcon@freecalypso.org>
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11 * Calypso JTAG
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Mychaela Falconia <falcon@freecalypso.org>
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12 * Iota nTESTRESET
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Mychaela Falconia <falcon@freecalypso.org>
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13
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Mychaela Falconia <falcon@freecalypso.org>
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14 The core function of interfacing from USB to a UART, JTAG and GPIO will be
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Mychaela Falconia <falcon@freecalypso.org>
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15 performed by an FT2232D chip, but the board described herein has two key
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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16 differences from a generic FT2232x board, key differences which necessitate the
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Mychaela Falconia <falcon@freecalypso.org>
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17 development of a custom board:
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18
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19 * Our board will have 3-state buffers on the JTAG lines and an open drain
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Mychaela Falconia <falcon@freecalypso.org>
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20 driver on the nTESTRESET line, wired in such a way that they cannot be
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21 accidentally turned on while the FT2232D is in its power-up default UART
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22 mode, prior to the software switch into the MPSSE+GPIO mode.
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23
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24 * The target connection interface will be presented not only on general-purpose
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Mychaela Falconia <falcon@freecalypso.org>
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25 headers, but also on a special FFC connector, to be used with our future
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Mychaela Falconia <falcon@freecalypso.org>
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26 FreeCalypso handset boards that will use the FFC-based development interface
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Mychaela Falconia <falcon@freecalypso.org>
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27 copied from Foxconn's Pirelli DP-L10 phone.
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28
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29 The gadget to be built is intended to serve the following two purposes, in this
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30 order of importance:
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31
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32 Application 1: the present adapter will be required to do initial bring-up,
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33 deep development and production-time programming and testing on our upcoming
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34 FreeCalypso handset boards. Calypso's MODEM UART will be wired to the handset's
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Mychaela Falconia <falcon@freecalypso.org>
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35 built-in USB-serial port also acting as the charging power source, but that
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36 interface is intended for end users - deep development, initial bring-up and
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37 production processes will need to be done through the IrDA UART wired to the
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38 FFC interface through the present adapter. JTAG is not expected to be needed,
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Mychaela Falconia <falcon@freecalypso.org>
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39 but is "thrown in for free" - however, the Iota nTESTRESET line will be very
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Mychaela Falconia <falcon@freecalypso.org>
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40 useful for commanding system switch-on that can be distinguished from both the
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Mychaela Falconia <falcon@freecalypso.org>
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41 end user power-on button and the charger plug event, as well as for easy
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Mychaela Falconia <falcon@freecalypso.org>
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42 recovery from any hung state.
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43
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44 Application 2: it costs us nothing extra to bring the target connection
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Mychaela Falconia <falcon@freecalypso.org>
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45 interface out on generic headers in addition to the FFC connector. If anyone
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46 needs to play with JTAG on our FCDEV3B or on a Motorola C1xx phone hacked up
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Mychaela Falconia <falcon@freecalypso.org>
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47 with little wires, the present adapter will be more robust compared to
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Mychaela Falconia <falcon@freecalypso.org>
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48 unbuffered COTS FT2232x breakout boards thanks to our 3-state buffers
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49 protecting the JTAG lines from FT2232's initial UART mode garbage.
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50
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51 However, the present FreeCalypso UART+JTAG adapter board is NOT intended to be
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Mychaela Falconia <falcon@freecalypso.org>
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52 used as a generic JTAG adapter for non-Calypso targets. The set of additional
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53 signals needed besides JTAG is quite different between the two: most traditional
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Mychaela Falconia <falcon@freecalypso.org>
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54 (non-GSM) ARM processors and DSPs have TRST and/or SRST signals, and sometimes
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55 also DBGRQ/DBGACK - whereas the Calypso+Iota chipset has no TRST, and the way
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56 Iota's nTESTRESET signal works is quite different. Companies like Tin Can Tools
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Mychaela Falconia <falcon@freecalypso.org>
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57 (Flyswatter2) already provide superb-quality and very cheap FT2232x-based JTAG
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Mychaela Falconia <falcon@freecalypso.org>
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58 adapters for "generic" applications, and there is no point in trying to compete
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59 with them - instead we need a Calypso-specific adapter that provides a UART,
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60 nTESTRESET control and JTAG in this order of priority.
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61
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62 2. Detailed design
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63
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64 2.1. FT2232D core block
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65
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66 The FTDI chip chosen for this adapter board is FT2232D. One of the FT2232x
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67 devices is needed because we need MPSSE for JTAG plus a second channel for the
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68 RVTMUX UART, leaving FT2232C/D/L and FT2232H as the two viable candidates. The
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69 FT2232H high speed device does not offer anything useful for our application,
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70 hence the more basic FT2232D has been chosen on the principle of "bez nadobnosti
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71 nosimyj nabryushnik vreden" (a Russian proverb) - introducing USB high speed
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72 capability (480 Mbps USB signaling) with FT2232H would increase the chances of
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73 USB signal integrity problems due to suboptimal PCB layout or suboptimal USB
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74 cable quality while providing absolutely no useful gain in our application,
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75 whereas FT2232D is inherently safer in this regard by not having that USB high
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76 speed capability in the first place. FT2232D is a direct drop-in for the
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77 earlier FT2232C and FT2232L chips; FT2232D is a currently active part available
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78 from Digi-Key whereas its predecessors are surplus-only parts.
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79
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80 FT2232C/D devices only support MPSSE on Channel A, hence our FreeCalypso
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81 UART+JTAG adapter will follow the general canon for such adapters in that JTAG
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82 and test reset will be on Channel A, whereas Channel B will be used for the
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Mychaela Falconia <falcon@freecalypso.org>
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83 RVTMUX UART.
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84
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85 There will be a 93C46 EEPROM connected to the FT2232D chip. This EEPROM is
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86 needed so that we can give our adapter a custom USB ID (out of the range of USB
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87 IDs allocated by FTDI to Falconia Partners LLC); this custom USB ID is needed
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88 for several reasons:
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89
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90 * We don't want the ftdi_sio driver in the Linux kernel to create two ttyUSBx
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91 devices for both FT2232D channels only to have the first of the pair disappear
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92 when a custom libftdi-based program is run to make use of JTAG and/or reset
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93 functions on Channel A - instead we would like to have this driver create
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94 only one ttyUSBx device for the UART on Channel B. There already exist
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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95 several other UART+JTAG adapters whose creators and users had the same need,
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96 and the ftdi_sio driver in Linux supports them. The existing adapters of
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Mychaela Falconia <falcon@freecalypso.org>
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97 this kind are identified by custom USB IDs, and once our own adapter advances
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98 past the vaporware phase, we'll be submitting a one-line patch to the Linux
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Mychaela Falconia <falcon@freecalypso.org>
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99 kernel driver to add our custom USB ID to the list.
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100
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101 * We will have a custom libftdi-based program for sending nTESTRESET to the
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Mychaela Falconia <falcon@freecalypso.org>
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102 FreeCalypso GSM device target through our adapter; this program will have an
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103 easier time locating our USB device among other potential FTDI-based devices
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104 if we use a custom USB ID.
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105
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106 * When the time comes to configure OpenOCD to do JTAG through our adapter,
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107 having a custom USB ID will similarly help prevent erroneous binding to other
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108 FTDI-based devices that may be present.
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109
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110 2.2. Buffering logic for JTAG
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111
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112 One significant design blemish of the otherwise quite versatile FT2232D is that
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113 "bit" modes like MPSSE cannot be configured in the EEPROM, instead they can only
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114 be entered dynamically on software command from the host. As the result, an
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
115 FT2232D channel that is meant to be used for, say, JTAG on a given board will
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 still operate in its default UART mode when USB power is first applied, and will
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 remain in this state indefinitely long, until the user runs a program on the
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 host that issues a software command to enter the "bit" mode - which may never
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 happen. If an FT2232D channel is wired for JTAG but the chip operates in its
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 default UART mode, the following problems will occur if the signals are wired
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 directly without additional buffering logic:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 * The ADBUS0 line which becomes TCK in JTAG mode is TxD in UART mode, and will
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 thus drive a high level on power-up - even though the quiescent state on TCK
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 should be low.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 * JTAG TDO line (output from the target) needs to be connected to ADBUS2 - this
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 signal becomes an input in MPSSE mode - but in the power-up default UART mode
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 ADBUS2 is an output. Thus this default output can end up fighting with the
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 target's TDO output, potentially damaging the target, the adapter or both.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 (The other two JTAG signals - TDI and TMS driven from ADBUS1 and ADBUS3 - are
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 less of a problem because in the power-up default UART mode these FT2232D pins
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 are inputs with weak internal pull-ups on them.)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 Our solution to this problem is to insert 3-state buffers (unidirectional in
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 the JTAG signal direction) into all 4 JTAG lines. We shall use 3-state buffers
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 with active-low enables, and the two enable lines (one for the TCK, TDI and TMS
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 outputs from the adapter, the other for the TDO input) will come from FT2232D
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 pins ADBUS5 and ADBUS6. In the MPSSE mode used for JTAG these pins become GPIOs
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 and will need to be configured as outputs driving low in order to enable JTAG,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 but in the power-up default UART mode they are inputs with internal pull-ups,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 and we will have additional external pull-ups for safety. The effects will be
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 as follows:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 * As long as the FT2232D channel is in UART mode, the 3-state buffers can never
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 be enabled. All JTAG outputs from the adapter will be tristated (i.e., the
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 same as if the adapter weren't there, presenting the target with its normal
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 sans-JTAG state), there will be no fighting on ADBUS2, and the UART will sense
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 all of its inputs as inactive high.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 * As the MPSSE mode is entered on software command, the initial pin direction
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 mask byte should be 0x01, keeping ADBUS0 as an output, but then an MPSSE GPIO
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 command should be given, enabling the other outputs along with sensible
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 initial values.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 * ADBUS6 should be driven low to enable the TDO receiving buffer (it will have
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 a weak pull-up on the buffer's input in order to not float when there is no
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 target connected) right after ADBUS2 is switched to being an input, but
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 ADBUS5 can be driven low or high at any time afterward to enable or disable
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 the JTAG outputs.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 2.3. Sideband signals alongside JTAG
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 2.3.1. Iota nTESTRESET driver
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 The test reset line in the Calypso+Iota solution (nTESTRESET) is handled by the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 VRPC block in the Iota ABB which is essentially a PMIC. It is always pulled up
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 inside the GSM device to a non-logic power rail, and this circuit works even
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 when the mobile is in the switched-off state with all of the main voltage
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 regulators for regular logic turned off. The raw nTESTRESET line is not meant
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 to ever be driven by any kind of active push-pull logic driver; instead it is
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 meant to be shorted to GND to trigger the reset, through either a pushbutton
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 switch or an OC/OD driver.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 Back when TI made their x-Sample and Leonardo development boards, they
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 apparently preferred to drive their JTAG+reset test interface (14-pin header in
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 TI's JTAG pinout) with whatever generic (non-Calypso-specific) JTAG adapter
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 they already had at the time, and as their 14-pin JTAG interface was defined,
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 pin 2 (reset) was defined to be TRST with an active push-pull driver in the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 JTAG host adapter (or "emulator" as they call it). These x-Sample and Leonardo
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 boards have a little on-board circuit between this connector pin 2 and the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 actual nTESTRESET; this circuit consists of two transistors and has the effect
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 of protecting the internal nTESTRESET line from whatever the external driver
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 may be doing: if the external adapter drives a logic low, the transistor circuit
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 pulls nTESTRESET low via what is effectively an OC driver, otherwise the JTAG
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 block presents a Hi-Z state to the nTESTRESET line. This circuit has been
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 copied from Leonardo schematics on our own FCDEV3B, but the current plan is to
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 not include it on the handset board, instead bringing out nTESTRESET in its
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 native form on the FFC interface like the Pirelli DP-L10 board appears to do.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 Our FreeCalypso UART+JTAG adapter will drive this nTESTRESET pin with an open
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 drain driver. This driving arrangement is compatible with both approaches:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 either direct nTESTRESET connection or the transistor circuit on FCDEV3B and on
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 TI's boards. It does, however, make our adapter specific to Calypso+Iota GSM
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 devices: more generic ARM processors and DSPs will often have more standard
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 TRST and/or SRST signals instead, possibly needing active push-pull drivers.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 To protect the reset line from FTDI's UART-default bogosity, the input to the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 non-inverting open drain driver will come from ADBUS7, which is an input in the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 FT2232D's power-up default UART mode. Like ADBUS5 and ADBUS6 controls for the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 3-state buffers for JTAG, this ADBUS7 line will have an additional external
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 pull-up for safety, thus the reset can never be triggered accidentally while
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 the FT2232D channel is in UART mode - the only way to trigger the test reset
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 will be to first put the channel into the MPSSE+GPIO mode, then make ADBUS7 an
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 output driving low.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 2.3.2. Calypso nEMU0 and nEMU1 pins
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 The Calypso chip has two JTAG-sideband pins called nEMU0 and nEMU1. They form
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 some kind of debug/development interface which is not needed in normal product
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 operation, and all Calypso-based GSM phone and modem product boards known to us
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 leave them unconnected - even those product boards on which the regular JTAG
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 pins are brought out (Pirelli DP-L10 and some Mot C1xx variants). TI's
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 Leonardo schematics leave them unconnected as well, but their more complete
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 x-Sample boards have them brought out to the 14-pin JTAG connector. Our
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 FCDEV3B has them brought out as well.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 The problem with these nEMU0 and nEMU1 pins is that they are undocumented: the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 docs we have only say that they are bidirectional signals with pull-ups, and
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 nothing else. We have on-board pull-ups on these two lines on our FCDEV3B
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 (copied from TI's E-Sample board) strengthening the Calypso chip's supposed
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 internal pull-ups, but we don't know what will happen if either or both pins
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 are driven low externally (at boot or any other time), nor do we know if the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 Calypso chip itself ever drives or pulses them low as outputs. Common sense
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 suggests that one of their likely functions is probably to hold the ARM7 core
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 in the debug halt state directly out of reset, and possibly disable the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 watchdog timer which is otherwise enabled and ticking at this time - but we
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 don't know any of the details.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 Because we don't know exactly how these nEMU0 and nEMU1 pins work, the only
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 sense in which we can support them is to provide a way to use our FreeCalypso
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 UART+JTAG adapter as a reverse engineering tool, experimentally playing with
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 these nEMU[1:0] pins on an FCDEV3B. We are going to make the following simple
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 provision to facilitate such experimentation: we are going to connect FT2232D
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 pins ACBUS2 and ACBUS3 to pins 13 and 14 on the 14-pin JTAG header, which are
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 the pins for nEMU0 and nEMU1. Unlike all other signals, this one will be a
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 direct connection without any buffering. ACBUS2 and ACBUS3 function as open
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 drain LED drivers in the power-up default UART mode, and these pins have been
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 chosen on the reasoning that they are expected to stay non-driving as long as
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 no one actually opens Channel A as a UART and tries to send something through
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 it. The following important additional considerations apply:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 * These nEMU0 and nEMU1 signals are NOT included in the FFC interface defined
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 by Foxconn/Pirelli which we are copying for our FreeCalypso handset boards.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 The positive implication is that the development interface for these FC
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 handset boards will not be adversely affected by the potentially dangerous
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 unbuffered connection to FT2232D pins; the negative implication is that if we
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 ever do learn how to use these nEMU[1:0] pins to do whatever they can do,
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 that ability won't be available on the handset boards. However, the latter
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 loss is deemed to be acceptable: the most plausible function of these
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 nEMU[1:0] pins is to enter JTAG debug state directly out of reset, and we
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 don't need this ability when we have the internal boot ROM enabled via nIBOOT:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 we can interrupt and divert the boot process serially, and then enter the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 debug state through the regular JTAG scan chain.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 * Anyone using the 14-pin JTAG header interface to connect to a target such as
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 FCDEV3B that does have nEMU0 and nEMU1 signals on pins 13 and 14 still has
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 the freedom to connect or not connect these signals as desired. With our
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 current FCDEV3B certain mechanical constraints practically impose the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 requirement of making a custom cable in any case: the spacing between headers
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 on the FCDEV3B is too tight for standard ribbon cables terminated with IDC
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 connectors (there is no room for the bulky sides of those IDC connectors),
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 hence one needs to crimp female terminals onto individual wires and insert
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 them into a crimp housing instead. In light of these considerations, you
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 should only connect pins 13 and 14 between our adapter and your target if you
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 are specifically interested in experimenting with driving or sensing Calypso's
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 nEMU0 and nEMU1 signals, otherwise leave them unconnected.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 * Our entire "support" for these nEMU[1:0] pins will consist of two PCB traces
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 connecting FT2232D's ACBUS2 and ACBUS3 pins to two pins on the 14-pin JTAG
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 header. This arrangement, which could be considered quite risky under
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 different circumstances, does absolutely nothing and cannot cause any harm if
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 those two header pins are NOT subsequently connected to an actual Calypso
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 target.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 2.4. FT2232D I/O pin summary
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 Channel A pins will be assigned and connected as follows:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 ADBUS0: JTAG TCK (fixed by FTDI)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 ADBUS1: JTAG TDI (fixed by FTDI)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 ADBUS2: JTAG TDO (fixed by FTDI)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 ADBUS3: JTAG TMS (fixed by FTDI)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 ADBUS4: unused and unconnected
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 ADBUS5: active-low output enable control for JTAG outputs
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 ADBUS6: active-low output enable control for TDO receiving buffer
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 ADBUS7: active-low nTESTRESET control
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 ACBUS0: unused and unconnected
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 ACBUS1: unused and unconnected
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292 ACBUS2: wired to JTAG header pin 13 (nEMU0)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 ACBUS3: wired to JTAG header pin 14 (nEMU1)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 The 3 pins that are unused and unconnected (ADBUS4, ACBUS0 and ACBUS1) can be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 configured as either inputs with internal pull-ups or outputs. For the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 remaining pins which do have assigned functions, the following software init
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 sequence should be adhered to:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 * As the MPSSE mode is entered on software command, the initial pin direction
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 mask byte should be 0x01. The critical points are to set ADBUS0 as an output
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 at this point so it never glitches through a non-driving state (it is TxD in
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303 the power-up default UART mode), make ADBUS2 an input as it will need to be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 once TDO is enabled, and set ADBUS5-7 as inputs. ADBUS5-7 need to be inputs
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 at this stage (the connected logic will sense the inactive high level from
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 pull-up resistors) because the initial output value for initialized-as-output
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 pins is not defined.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 * MPSSE Set Data Bits High Byte (0x82) command should be given to set ACBUS2
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 and ACBUS3 as inputs, leaving nEMU[0:1] pins undisturbed until and unless you
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 are playing with them.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 * MPSSE Set Data Bits Low Byte (0x80) command should be given to make ADBUS0
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 (TCK) an output driving 0, make ADBUS1 (TDI) an output driving 1, keep ADBUS2
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 as an input from the MPSSE mode entry step, make ADBUS3 (TMS) an output
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 driving 1, and make ADBUS6 (TDO receiving buffer control) an output driving 0.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 ADBUS5 (JTAG output buffer control) and ADBUS7 (nTESTRESET driver) should be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 configured as outputs at this point, but their driving values will depend on
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 the application.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 Channel B will be used as a data-leads-only UART with standard wiring requiring
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 no software intervention:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 BDBUS0: TxD (UART output)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 BDBUS1: RxD (UART input)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 the rest: unused and unconnected
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328 2.5. Logic voltage levels and buffering
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 Many FT2232x-based JTAG adapters have level-translating buffers between FT2232x
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 pins and the target interface in order to support targets with different logic
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 voltage levels, usually from 3.3 V down to 1.8 V, or sometimes an even wider
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 allowed range: for example, the Flyswatter2 adapter from Tin Can Tools supports
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 target logic voltage levels from 1.6 to 5.0 V.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 In our case such voltage level shifting is not really needed: Calypso is 2.8 V
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 native, but perfectly tolerant of 3.3 V inputs as well. The following
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 approaches have been considered for our FreeCalypso UART+JTAG adapter:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 Approach 1: put a 3.3 V regulator on our board, run FT2232D I/O pins at 3.3 V,
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 run the 3-state buffers for JTAG at 3.3 V as well, and connect the UART lines
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 to FT2232D Channel B pins directly, without buffering. This approach relies on
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 Calypso's inputs being tolerant of 3.3 V and Calypso's 2.8 V outputs producing
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 voltage levels suitable for 3.3 V inputs. In practice this approach has already
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 been used quite extensively in other contexts: we connect Calypso I/O to 3.3 V
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 logic when we connect FCDEV3B UARTs to generic off-the-shelf FT2232x adapter
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 boards, users of headset jack serial adapters for Motorola and Openmoko phones
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 do likewise, Openmoko connected Calypso's 2.8 V UART to their 3.3 V application
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 processor, and Foxconn/Pirelli appear to have done likewise with their built-in
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 USB-serial interface based on a CP2102 chip with 3.3 V I/O.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 Approach 2: put both 3.3 V and 2.8 V regulators on our board, run FT2232D I/O
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 pins at 3.3 V (the lowest I/O voltage officially supported by FT2232x chips),
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 have the inputs from the Calypso target go directly to 3.3 V logic like with
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 Approach 1, but run the 3-state buffers for JTAG outputs plus an always-enabled
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 buffer for the UART output at 2.8 V. This approach makes the adapter's outputs
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 2.8 V proper, but at the cost of an extra on-board regulator.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 Approach 3: similar to Approach 2, but omit the on-board 2.8 V regulator and
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 instead power the 2.8 V output buffers from the target voltage reference pin
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 provided both on TI's 14-pin JTAG interface (used on development boards, both
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 TI's and our own FCDEV3B) and on the FFC interface we are copying from
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 Foxconn/Pirelli. Compared to Approach 2, this approach eliminates the extra
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 on-board regulator, but would cause some power to be drawn from the target to
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 power the output buffers. This approach would also create difficulties if a
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366 user wishes to use the generic header interface (as opposed to the highly
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 specialized FFC interface), and there is no source from which the target
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 reference voltage pin can be supplied. A compromise approach could be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 implemented by putting a 3-pin jumper header on our board, selecting the power
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 to the output buffers between internal 3.3 V and the external target voltage
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 reference pin, but having that jumper set to the internal 3.3 V supply would
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372 effectively bring us back to Approach 1.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 Approach 4: do what the "big guys" do in terms of voltage level translation:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375 use special dual-supply translating buffers in both directions, supporting any
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376 target voltage level at least between 1.8 and 3.3 V or possibly wider. This
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 approach would be appropriate for a more general-purpose JTAG adapter that needs
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378 to work with, say, 1.8 V targets, but given that our adapter is specific to the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379 Calypso which has 2.8V-native, 3.3V-tolerant I/O, the extra complexity of
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380 full-blown voltage level translation is not really justifiable.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382 Approaches 3 and 4 are excessively complex and cumbersome, and cannot be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 justified in our Calypso-specific application. The practical choice is thus
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384 between approaches 1 and 2. My (Mother Mychaela's) initial leaning was toward
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385 Approach 1, but upon further reflection I swayed over to Approach 2. The cost
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 of the additional on-board 2.8 V regulator in terms of PCB real estate and
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387 layout complexity is not too great, and given that our adapter is very
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 specifically for the Calypso and no other targets, it makes more sense to put
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389 out Calypso's native voltage levels, rather than merely compatible ones.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 Approach 2 will be used on our FreeCalypso UART+JTAG adapter, with the following
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 additional nuances:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394 * A 74LVC125A output buffer (4 individual buffers in one package) powered from
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395 the 2.8 V regulator will be used for the 4 logic outputs from our adapter:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396 JTAG outputs TCK, TDI and TMS, and the single UART output. The output enables
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 for the JTAG outputs will come from ADBUS5, whereas the UART output will be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398 always enabled.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 * Another similar buffer, but powered from the 3.3 V regulator will be used for
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401 the two logic signals going the other way: JTAG TDO and the UART input. The
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402 buffer for TDO will be enabled by ADBUS6, the UART input will be always
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 enabled. There will be a pull-up resistor to local 2.8 V on the input
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404 (target interface) side of each buffer. The buffer for TDO is needed for
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405 3-state control, but an identical buffer will also be used for the UART input
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406 for the sake of symmetry, and to present the target with a pull-up to 2.8 V
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 rather than FT2232D's internal pull-up to 3.3 V.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409 * All pull-ups on the interface between FT2232D pins and the just-described
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410 buffers will be to 3.3 V.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412 * A dedicated 3.3 V regulator will be used, instead of trying to use the feeble
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 one built into the FT2232D, as the datasheet-stated limit of 5 mA seems like
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414 too little margin.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 * The only interface on which the target would ever see 3.3 V rather than 2.8 V
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417 will be the purely experimental provision for Calypso nEMU[1:0] described in
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418 section 2.3.2, to be used only by those who are specifically interested in
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419 that line of experimentation, and not in any other use cases. It makes no
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420 sense to attempt voltage level-translating buffering for these signals when
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 we don't even know if they are really inputs or outputs, and under what
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422 conditions.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424 The target voltage reference pins on the TI-style 14-pin JTAG header connector
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425 and on the Foxconn/Pirelli-style FFC connector will remain unused and
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426 unconnected. One could make an argument that not using the target-provided I/O
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 voltage reference is wrong, but the issue needs to be seen in context. TI's
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 14-pin JTAG interface was designed for use in a wide range of applications,
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 covering I/O voltages at least between 1.8 and 3.3 V, and TI's XDS JTAG adapters
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430 support this wide range of I/O voltages just like the ones made by community
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431 vendors like Amontec and Tin Can Tools. In the case of Foxconn and their
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432 Pirelli DP-L10 design, we can never know for certain, but it is highly plausible
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 that they weren't making a custom FT2232x-based JTAG adapter of their own like
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434 we are doing, and instead had a passive adapter that connected their FFC
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435 interface to some existing TI XDS JTAG adapter, likely via that very same 14-pin
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436 interface. In that case the existing TI XDS JTAG adapter they were using needed
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437 a target voltage reference pin, and so they included one in their custom FFC
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438 interface. But our circumstances are different: we are making a custom
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439 UART+JTAG adapter for reasons of our own, and because our custom adapter is
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440 very specific to the Calypso, having our own on-board 2.8 V regulator is more
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 robust than depending on an I/O buffer supply from the target.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443 2.6. Target connection interfaces
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 2.6.1. Generic header interface
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447 Our FreeCalypso UART+JTAG adapter will feature two header connectors: a 14-pin
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 header in TI's pinout for JTAG, nEMU[1:0] and nTESTRESET, and a separate 3-pin
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449 header for the UART. This header interface option will make it possible to use
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 our adapter with the FCDEV3B, with TI's D-Sample board (JTAG+company 14-pin
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 interface only) and even with hacked-up C1xx phones with little wires soldered
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 to JTAG test pads. As explained in section 2.3.2, always give explicit thought
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453 as to whether pins 13 and 14 (nEMU0 and nEMU1) should be connected or not in
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454 your application.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456 The UART on FT2232D Channel B will be completely independent of JTAG and other
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 Channel A functions, and can be used as a completely generic data-leads-only
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 asynchronous serial interface at 2.8 V.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
460 2.6.2. FFC interface
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
461
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
462 Our upcoming FreeCalypso handset boards will need to use an FFC interface for
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
463 development functions. At the very minimum this interface needs to connect the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
464 Calypso's IrDA UART carrying RVTMUX, and do it in such a way that this serial
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
465 interface can be connected without applying a "charger present" condition to
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
466 the VRPC block in the Iota ABB - hence the need for an interface outside of the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
467 handset's built-in USB-serial port. Furthermore, if we copy the FFC interface
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
468 from Foxconn's Pirelli DP-L10 design instead of inventing our own, we get not
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
469 only a UART channel, but also JTAG and nTESTRESET on the same interface. There
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
470 is very little need for JTAG in FreeCalypso, but it is certainly a nice-to-have.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
471 Having the ability to drive nTESTRESET from the development host will also come
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
472 very useful: once we implement proper handset on/off logic in the firmware,
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
473 meaning that different switch-on causes will be treated like they should be in
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
474 a real handset, switch-on from nTESTRESET will become the development and
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
475 production boot mode.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
476
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
477 Our FFC interface is effectively defined by the unpopulated FFC connector
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
478 footprint and its wiring found in Pirelli DP-L10 phones. It is a 12-pin FFC
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
479 interface with 0.5 mm pitch, the unpopulated connector footprint on Pirelli's
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
480 PCB has pin numbers marked on the silk screen, and the pins are assigned as
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
481 follows:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
482
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
483 Pin Function
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
484 ----------------
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
485 1 V-IO rail
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
486 2 UART Rx (input to the target)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
487 3 Iota nTESTRESET
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
488 4 JTAG TDI
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
489 5 JTAG TMS
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
490 6 JTAG TCK
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
491 7 UART Tx (output from the target)
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
492 8 JTAG TDO
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
493 9 unused
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
494 10 GND
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
495 11 unused
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
496 12 unused
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
497
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
498 At one time we had a plan to add Calypso nEMU[1:0] signals to this interface by
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
499 putting them on the last two unused pins, but this addition has been rejected
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
500 for the time being: because we have no documentation for what these nEMU[1:0]
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
501 pins do and all we can do with them are reverse engineering experiments, these
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
502 signals should be kept out of handset products and limited to development boards
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
503 like FCDEV3B for the time being.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
504
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
505 There is, however, one critical aspect of this FFC interface which cannot be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
506 recovered from the Pirelli DP-L10 artifacts and instead has to be defined anew:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
507 the question of top vs. bottom orientation. Our decision process in this regard
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
508 begins with the availability of FFC jumpers, i.e., the flat flexible piece that
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
509 goes between the two boards. The FFC jumper version with same-side contacts is
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
510 readily available from Digi-Key as very inexpensive single pieces, but the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
511 version with opposite-side contacts is only available with a prohibitely
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
512 expensive MOQ. Having settled on the FFC jumper with same-side contacts, we
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
513 are left with two options: have the contacts on both sides face upward, or have
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
514 them face downward. The decision between the two is completely arbitrary and
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
515 we have no way of knowing which way Foxconn had it back in their day, but we
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
516 have to decide one way or the other starting with the design of this adapter
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
517 board. The Mother's arbitrary decision is to have the contacts on both sides
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
518 of the FFC jumper face upward, meaning that:
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
519
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
520 * The FFC connector on the FreeCalypso UART+JTAG Adapter board will need to be
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
521 the top-side contacts version.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
522
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
523 * If we are going to populate an FFC connector on a decased Pirelli motherboard
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
524 in order to exercise our adapter against that pre-existing target, the top-
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
525 side contacts version will need to be used. We'll need to do the same if we
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
526 make our own handset board on which the FFC connector is on the side with the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
527 display and the main keypad buttons.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
528
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
529 * If we make our own handset board on which the FFC connector is on the bottom
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
530 side of the motherboard (the side opposite the display), which is the current
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
531 plan, the connector will need to be the bottom-side contacts version.
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
532
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
533 Because pin 1 is on the left on the existing target board with the connector on
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
534 the top side (Pirelli DP-L10) and we are using the same-side jumper version that
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
535 flips the left/right orientation, pin 1 will need to be on the right in the
0f9bdd60ce50 fc-small-hw separated from old freecalypso-schem repo
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
536 connector footprint definition on the adapter board.