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annotate duart28/src/Makefile @ 52:fb657e1107e3

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duart28c/src/MCL: update for Digi-Key parts actually on order
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 02 Aug 2020 20:51:27 +0000
parents ace9b7659f7f
children
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22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
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1 VSRCS= vsrc/FT2232D_block.v vsrc/FT2232D_chip.v vsrc/USB_block.v \
22aba3a61a4b duart28: vsrc passes sverp
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parents: 20
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2 vsrc/application_block.v vsrc/board.v vsrc/eeprom_93Cx6_16bit.v \
22aba3a61a4b duart28: vsrc passes sverp
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parents: 20
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3 vsrc/regulator_ic.v vsrc/regulator_with_caps.v vsrc/target_if.v \
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
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4 vsrc/usb_conn.v
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5 BOMS= tallied-bom.txt tallied-bom.csv comptab.txt
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0073141010a2 duart28/src/Makefile: netlist MCL binding added
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parents: 23
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6 NETS= sverp.unet bound.unet pcb-netlist.txt
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22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
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8 all: ${BOMS} ${NETS} elements.pcb
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9
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10 tallied-bom.txt: MCL
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11 ueda-mkbom -cr > $@
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12
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13 tallied-bom.csv: MCL
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14 ueda-csvbom > $@
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15
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16 comptab.txt: MCL
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17 ueda-shortbom > $@
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18
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19 elements.pcb: MCL
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20 ueda-getfps -ch | ueda-runm4 > $@
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22aba3a61a4b duart28: vsrc passes sverp
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parents: 20
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22 sverp.unet: ${VSRCS} primitives Makefile
22aba3a61a4b duart28: vsrc passes sverp
Mychaela Falconia <falcon@freecalypso.org>
parents: 20
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23 ueda-sverp -o $@ ${VSRCS}
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ace9b7659f7f duart28/src/Makefile: added dependency on U[56].slotmap
Mychaela Falconia <falcon@freecalypso.org>
parents: 33
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25 bound.unet: MCL sverp.unet U5.slotmap U6.slotmap
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parents: 23
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26 unet-bind -c sverp.unet $@
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parents: 23
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27
0073141010a2 duart28/src/Makefile: netlist MCL binding added
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parents: 23
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28 pcb-netlist.txt: bound.unet
0073141010a2 duart28/src/Makefile: netlist MCL binding added
Mychaela Falconia <falcon@freecalypso.org>
parents: 23
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29 unet2pcb bound.unet $@
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31 clean:
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32 rm -f *.unet *.txt *.csv errs elements.pcb