--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/duart28c/src/primitives	Wed Jul 29 07:08:28 2020 +0000
@@ -0,0 +1,27 @@
+/*
+ * This file defines the primitives to be instantiated from the structural
+ * Verilog source for the board: IC package types, basic components and
+ * subpackages to be mapped later in the MCL binding step.
+ */
+
+resistor	numpins 2;
+capacitor	numpins 2;
+inductor	numpins 2;
+
+/* IC packages */
+pkg_LQFP48	numpins 48;
+pkg_5pin	numpins 5;
+pkg_8pin	numpins 8;
+
+/* 74LVC541A single buffer and common part subpackages */
+buffer_ic_slot		mapped_pins (A, Y);
+buffer_ic_common	mapped_pins (Vcc, GND, nOE1, nOE2);
+
+/* crystal resonator */
+xtal_2pin_pkg	numpins 2;
+
+/* connectors */
+header_2pin		numpins 2;
+header_3pin		numpins 3;
+header_10pin		numpins 10;
+conn_miniUSB_plus4	numpins 9;