FreeCalypso > hg > fc-small-hw
view fc-uja/schem+bom/primitives @ 77:4c5675c79555
lunalcd3.pcb: add orientation marker to SW1
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 18 Nov 2021 07:40:13 +0000 |
parents | 0f9bdd60ce50 |
children |
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/* * This file defines the primitives to be instantiated from the structural * Verilog source for the board: IC package types, basic components and * subpackages to be mapped later in the MCL binding step. */ resistor numpins 2; capacitor numpins 2; inductor numpins 2; /* IC packages */ pkg_LQFP48 numpins 48; pkg_XSON6 numpins 6; pkg_5pin numpins 5; pkg_8pin numpins 8; /* 74LVC125A/74LVC2G125 single buffer and common part subpackages */ buffer_ic_slot mapped_pins (A, Y, nOE); buffer_ic_common mapped_pins (Vcc, GND); /* crystal resonator */ xtal_2pin_pkg numpins 2; /* connectors */ header_3pin numpins 3; header_14pin numpins 14; conn_12pin_plus2 numpins 14; conn_miniUSB_plus4 numpins 9;