log

age author description
2022-11-02 Mychaela Falconia sim-fpc-pasv/pcb: add Makefile for Gerber output default tip
2022-10-25 Mychaela Falconia sim-fpc-pasv: PCB layout done
2022-10-25 Mychaela Falconia sim-fpc-pasv: schem+BOM design complete
2022-10-25 Mychaela Falconia sim-fpc-pasv MCL: FPC connector footprint
2022-10-25 Mychaela Falconia sim-fpc-pasv: starting project with MCL
2021-12-04 Mychaela Falconia lunalcd3: add Makefile for Gerber output generation
2021-11-18 Mychaela Falconia lunalcd3.pcb: add orientation marker to U1
2021-11-18 Mychaela Falconia lunalcd3.pcb: add orientation marker to SW1
2021-11-18 Mychaela Falconia lunalcd3.pcb: layout changes around top bracket
2021-11-18 Mychaela Falconia lunalcd3.pcb: extend ground plane for top bracket addition
2021-11-18 Mychaela Falconia lunalcd3.pcb: add top bracket to LCD footprint
2021-11-18 Mychaela Falconia lunalcd3.pcb: reroute LCD power trace around right ear of bottom bracket
2021-11-18 Mychaela Falconia lunalcd3.pcb: manually add bottom strap to LCD footprint
2021-11-18 Mychaela Falconia lunalcd3 project started
2021-06-26 Mychaela Falconia lunalcd2/src/Makefile: generate BOM outputs
2021-06-26 Mychaela Falconia lunalcd2/src/MCL: resistor parts nailed down
2021-06-26 Mychaela Falconia lunalcd2/src/MCL: different part for two-post VBAT supply header
2021-06-25 Mychaela Falconia lunalcd2/pcb: add Makefile
2021-06-25 Mychaela Falconia lunalcd2.pcb: manual DRC fixes
2021-06-25 Mychaela Falconia lunalcd2.pcb complete except for DRC
2021-06-25 Mychaela Falconia lunalcd2.pcb almost complete
2021-06-25 Mychaela Falconia lunalcd2.pcb started
2021-06-25 Mychaela Falconia lunalcd2/src/Makefile: generate elements.pcb
2021-06-25 Mychaela Falconia lunalcd2/src/Makefile: generate pcb-netlist.txt