FreeCalypso > hg > fc-tourmaline
annotate src/cs/drivers/drv_app/fchg/bsim_etm_cmd.c @ 273:5caa86ee2cfa
enable L1_NEW_AEC in l1_confg.h (bold change)
The AEC function implemented in DSP ROM 3606 on the Calypso silicon
we work with is the one that corresponds to L1_NEW_AEC; the same holds
for DSP 34 and even for DSP 33 with more recent patch versions.
However, TI shipped their TCS211 reference fw with L1_NEW_AEC set to 0,
thus driving AEC the old way if anyone tried to enable it, either via
AT%Nxxxx or via the audio mode facility. As a result, the fw would
try to control features which no longer exist in the DSP (long vs short
echo and the old echo suppression level bits), while providing no way
to tune the 8 new parameter words added to the DSP's NDB page.
The only sensible solution is to bite the bullet and enable L1_NEW_AEC
in L1 config, with fallout propagating into RiViera Audio Service
T_AUDIO_AEC_CFG structure and into /aud/*.cfg binary file format.
The latter fallout will be addressed in further code changes.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 29 Jul 2021 18:32:40 +0000 |
parents | aec644728174 |
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rev | line source |
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1 /* |
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2 * In this module we are going to implement our handling of |
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3 * ETM_BSIM command packets sent from a development host. |
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4 */ |
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5 |
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6 #include "fchg/fchg_env.h" |
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7 #include "fchg/fchg_func_i.h" |
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8 #include "fchg/bsim_func_i.h" |
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9 #include "fchg/bsim_etm_cmd.h" |
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10 #include "rv/rv_general.h" |
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11 #include "rvf/rvf_api.h" |
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12 #include "rvm/rvm_use_id_list.h" |
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13 #include "etm/etm.h" |
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14 #include "etm/etm_api.h" |
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15 |
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16 static void bsim_cmd_query(T_ETM_PKT *resp) |
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17 { |
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18 etm_pkt_put8(resp, pwr_ctrl->state); |
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19 etm_pkt_put8(resp, |
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20 pwr_ctrl->batt.percent_thresh[pwr_ctrl->curr_disch_thresh].remain_capa); |
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21 etm_pkt_put8(resp, pwr_ctrl->bsim.start_enable); |
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22 resp->status = BSIM_STAT_OK; |
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23 } |
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24 |
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25 static void bsim_cmd_discharge(T_ETM_PKT *resp, UINT8 set_percent) |
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26 { |
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27 UINT16 i; |
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28 |
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29 switch (pwr_ctrl->state) { |
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30 case FCHG_STATE_NO_EXT_PWR: |
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31 case FCHG_STATE_PWR_PLUG_TIMER: |
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32 case FCHG_STATE_READY_TO_CHARGE: |
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33 case FCHG_STATE_READY_TO_RECHARGE: |
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34 case FCHG_STATE_RECHARGE_TIMER: |
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35 case FCHG_STATE_NO_CHARGING: |
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36 break; |
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37 default: |
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38 resp->status = BSIM_ERR_WRONG_STATE; |
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39 return; |
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40 } |
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41 for (i = 0; i < pwr_ctrl->nb_percent_thresh; i++) { |
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42 if (pwr_ctrl->batt.percent_thresh[i].remain_capa == |
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43 set_percent) |
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44 break; |
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45 } |
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46 if (i >= pwr_ctrl->nb_percent_thresh) { |
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47 resp->status = BSIM_ERR_INV_PERCENT; |
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48 return; |
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49 } |
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50 if (i <= pwr_ctrl->curr_disch_thresh) { |
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51 resp->status = BSIM_ERR_INV_DISCHARGE; |
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52 return; |
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53 } |
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54 pwr_ctrl->curr_disch_thresh = i; |
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55 if (pwr_ctrl->event_handler) |
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56 pwr_ctrl->event_handler(FCHG_EVENT_DISCHARGE); |
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57 resp->status = BSIM_STAT_OK; |
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58 } |
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59 |
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60 static void bsim_cmd_chg_start(T_ETM_PKT *resp) |
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61 { |
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62 switch (pwr_ctrl->state) { |
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63 case FCHG_STATE_READY_TO_CHARGE: |
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64 case FCHG_STATE_READY_TO_RECHARGE: |
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65 break; |
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66 default: |
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67 resp->status = BSIM_ERR_WRONG_STATE; |
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68 return; |
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69 } |
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70 rvf_send_trace("BSIM: simulated charging start", 30, NULL_PARAM, |
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71 RV_TRACE_LEVEL_DEBUG_MEDIUM, FCHG_USE_ID); |
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72 pwr_ctrl->state = FCHG_STATE_I2V_CAL_1; |
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73 resp->status = BSIM_STAT_OK; |
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74 } |
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75 |
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76 static void bsim_cmd_chg_ci2cv(T_ETM_PKT *resp) |
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77 { |
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78 if (pwr_ctrl->state != FCHG_STATE_CI_CHARGING) { |
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79 resp->status = BSIM_ERR_WRONG_STATE; |
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80 return; |
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81 } |
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82 rvf_send_trace("BSIM: simulated charging CI->CV", 31, NULL_PARAM, |
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83 RV_TRACE_LEVEL_DEBUG_MEDIUM, FCHG_USE_ID); |
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84 pwr_ctrl->state = FCHG_STATE_CV_CHARGING; |
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85 resp->status = BSIM_STAT_OK; |
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86 } |
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87 |
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88 static void bsim_cmd_chg_complete(T_ETM_PKT *resp) |
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89 { |
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90 if (pwr_ctrl->state != FCHG_STATE_CV_CHARGING) { |
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91 resp->status = BSIM_ERR_WRONG_STATE; |
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92 return; |
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93 } |
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94 rvf_send_trace("BSIM: simulated charging complete", 33, NULL_PARAM, |
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95 RV_TRACE_LEVEL_DEBUG_MEDIUM, FCHG_USE_ID); |
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96 pwr_init_discharge(); |
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97 pwr_ctrl->state = FCHG_STATE_READY_TO_RECHARGE; |
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98 if (pwr_ctrl->event_handler) |
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99 pwr_ctrl->event_handler(FCHG_EVENT_CHARGING_COMPLETE); |
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100 resp->status = BSIM_STAT_OK; |
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101 } |
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102 |
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103 static void bsim_cmd_set_ichg(T_ETM_PKT *resp, UINT16 ichg) |
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104 { |
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105 pwr_ctrl->ci_ichg = ichg; |
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106 pwr_ctrl->ichg_average = ichg; |
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107 resp->status = BSIM_STAT_OK; |
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108 } |
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109 |
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110 static void bsim_cmd_start_enable(T_ETM_PKT *resp, UINT8 setting) |
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111 { |
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112 pwr_ctrl->bsim.start_enable = setting; |
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113 resp->status = BSIM_STAT_OK; |
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114 } |
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115 |
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116 void bsim_process_etm(T_ETM_DATA_READY *msg) |
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117 { |
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118 T_ETM_PKT *resp; |
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119 uint8 fid; |
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120 |
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121 resp = (T_ETM_PKT *) etm_malloc(sizeof(T_ETM_PKT)); |
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122 if (!resp) { |
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123 rvf_send_trace( |
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124 "Unable to respond to ETM_BSIM: etm_malloc() failed", 50, |
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125 NULL_PARAM, RV_TRACE_LEVEL_ERROR, FCHG_USE_ID); |
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126 return; |
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127 } |
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128 /* init response packet */ |
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129 resp->mid = ETM_BSIM; |
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130 resp->size = 0; |
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131 resp->index = 0; |
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132 /* start processing command */ |
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133 fid = msg->data[0]; |
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134 etm_pkt_put8(resp, fid); |
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135 /* command dispatch */ |
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136 switch (fid) { |
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137 case BSIM_CMD_QUERY: |
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138 bsim_cmd_query(resp); |
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139 break; |
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140 case BSIM_CMD_DISCHARGE: |
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141 bsim_cmd_discharge(resp, etm_get8(msg->data + 1)); |
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142 break; |
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143 case BSIM_CMD_CHG_START: |
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144 bsim_cmd_chg_start(resp); |
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145 break; |
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146 case BSIM_CMD_CHG_CI2CV: |
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147 bsim_cmd_chg_ci2cv(resp); |
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148 break; |
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149 case BSIM_CMD_CHG_COMPLETE: |
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150 bsim_cmd_chg_complete(resp); |
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151 break; |
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152 case BSIM_CMD_SET_ICHG: |
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153 bsim_cmd_set_ichg(resp, etm_get16(msg->data + 1)); |
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154 break; |
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155 case BSIM_CMD_START_ENABLE: |
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156 bsim_cmd_start_enable(resp, etm_get8(msg->data + 1)); |
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157 break; |
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158 default: |
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159 resp->status = BSIM_ERR_BAD_CMD; |
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160 } |
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161 etm_pkt_send(resp); |
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162 etm_free(resp); |
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163 } |