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comparison cdg-hybrid/cdginc/p_psi.h @ 14:35f7a1dc9f7d

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cdg-hybrid: import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 16 Oct 2020 07:15:38 +0000
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13:83146a4ae927 14:35f7a1dc9f7d
1 /*
2 +--------------------------------------------------------------------------+
3 | PROJECT : PROTOCOL STACK |
4 | FILE : p_psi.h |
5 | SOURCE : "sap\psi.pdf" |
6 | LastModified : "2004-02-09" |
7 | IdAndVersion : "..01.001" |
8 | SrcFileTime : "Thu Nov 29 09:51:16 2007" |
9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 |
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
11 +--------------------------------------------------------------------------+
12 */
13
14 /* PRAGMAS
15 * PREFIX : NONE
16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
17 * ALWAYS_ENUM_IN_VAL_FILE: NO
18 * ENABLE_GROUP: NO
19 * CAPITALIZE_TYPENAME: NO
20 */
21
22
23 #ifndef P_PSI_H
24 #define P_PSI_H
25
26
27 #define CDG_ENTER__P_PSI_H
28
29 #define CDG_ENTER__FILENAME _P_PSI_H
30 #define CDG_ENTER__P_PSI_H__FILE_TYPE CDGINC
31 #define CDG_ENTER__P_PSI_H__LAST_MODIFIED _2004_02_09
32 #define CDG_ENTER__P_PSI_H__ID_AND_VERSION __01_001
33
34 #define CDG_ENTER__P_PSI_H__SRC_FILE_TIME _Thu_Nov_29_09_51_16_2007
35
36 #include "CDG_ENTER.h"
37
38 #undef CDG_ENTER__P_PSI_H
39
40 #undef CDG_ENTER__FILENAME
41
42
43 #include "p_psi.val"
44
45 #include "p_dio.h"
46
47 #ifndef __T_DIO_CAP_UN__
48 #define __T_DIO_CAP_UN__
49 /*
50 * Structured Element
51 * CCDGEN:WriteStruct_Count==2338
52 */
53 typedef union
54 {
55 T_DIO_CAP_SER DIO_CAP_SER; /*< 0: 36> serial device capabiliity structures (type defined in "p_dio.h") */
56 T_DIO_CAP_PKT DIO_CAP_PKT; /*< 0: 16> Structured Element (type defined in "p_dio.h") */
57 T_DIO_CAP_SER_MUX DIO_CAP_SER_MUX; /*< 0: 40> Structured Element (type defined in "p_dio.h") */
58 } T_DIO_CAP_UN;
59 #endif
60
61 #ifndef __T_DIO_DCB_UN__
62 #define __T_DIO_DCB_UN__
63 /*
64 * Structured Element
65 * CCDGEN:WriteStruct_Count==2339
66 */
67 typedef union
68 {
69 T_DIO_DCB_SER DIO_DCB_SER; /*< 0: 28> Structured Element (type defined in "p_dio.h") */
70 T_DIO_DCB_PKT DIO_DCB_PKT; /*< 0: 8> Structured Element (type defined in "p_dio.h") */
71 T_DIO_DCB_SER_MUX DIO_DCB_SER_MUX; /*< 0: 44> Structured Element (type defined in "p_dio.h") */
72 } T_DIO_DCB_UN;
73 #endif
74
75 #ifndef __T_peer__
76 #define __T_peer__
77 /*
78 * communication entity name
79 * CCDGEN:WriteStruct_Count==2340
80 */
81 typedef struct
82 {
83 U8 name[PSI_PEER_ENTITY_NAME_LENGTH]; /*< 0: 6> entity name */
84 U8 _align0; /*< 6: 1> alignment */
85 U8 _align1; /*< 7: 1> alignment */
86 } T_peer;
87 #endif
88
89
90 /*
91 * End of substructure section, begin of primitive definition section
92 */
93
94 #ifndef __T_PSI_CONN_IND__
95 #define __T_PSI_CONN_IND__
96 /*
97 *
98 * CCDGEN:WriteStruct_Count==2341
99 */
100 typedef struct
101 {
102 U32 devId; /*< 0: 4> device identifier */
103 T_DIO_CAP *ptr_DIO_CAP; /*< 4: 4> pointer to device capabiliity structures (type defined in "p_dio.h") */
104 U8 psi_data_mode; /*< 8: 1> TE will use the device to transmit AT commands or data or both */
105 U8 _align0; /*< 9: 1> alignment */
106 U8 _align1; /*< 10: 1> alignment */
107 U8 _align2; /*< 11: 1> alignment */
108 } T_PSI_CONN_IND;
109 #endif
110
111 #ifndef __T_PSI_CONN_IND_TEST__
112 #define __T_PSI_CONN_IND_TEST__
113 /*
114 *
115 * CCDGEN:WriteStruct_Count==2342
116 */
117 typedef struct
118 {
119 U32 devId; /*< 0: 4> device identifier */
120 T_ctrl_DIO_CAP_UN ctrl_DIO_CAP_UN; /*< 4: 4> (enum=32bit) controller for union */
121 T_DIO_CAP_UN DIO_CAP_UN; /*< 8: 40> Structured Element */
122 U8 psi_data_mode; /*< 48: 1> TE will use the device to transmit AT commands or data or both */
123 U8 _align0; /*< 49: 1> alignment */
124 U8 _align1; /*< 50: 1> alignment */
125 U8 _align2; /*< 51: 1> alignment */
126 } T_PSI_CONN_IND_TEST;
127 #endif
128
129 #ifndef __T_PSI_CONN_RES__
130 #define __T_PSI_CONN_RES__
131 /*
132 *
133 * CCDGEN:WriteStruct_Count==2343
134 */
135 typedef struct
136 {
137 U32 devId; /*< 0: 4> device identifier */
138 } T_PSI_CONN_RES;
139 #endif
140
141 #ifndef __T_PSI_CONN_REJ__
142 #define __T_PSI_CONN_REJ__
143 /*
144 *
145 * CCDGEN:WriteStruct_Count==2344
146 */
147 typedef struct
148 {
149 U32 devId; /*< 0: 4> device identifier */
150 } T_PSI_CONN_REJ;
151 #endif
152
153 #ifndef __T_PSI_DISCONN_IND__
154 #define __T_PSI_DISCONN_IND__
155 /*
156 *
157 * CCDGEN:WriteStruct_Count==2345
158 */
159 typedef struct
160 {
161 U32 devId; /*< 0: 4> device identifier */
162 U16 cause; /*< 4: 2> cause value */
163 U8 _align0; /*< 6: 1> alignment */
164 U8 _align1; /*< 7: 1> alignment */
165 } T_PSI_DISCONN_IND;
166 #endif
167
168 #ifndef __T_PSI_CLOSE_REQ__
169 #define __T_PSI_CLOSE_REQ__
170 /*
171 *
172 * CCDGEN:WriteStruct_Count==2346
173 */
174 typedef struct
175 {
176 U32 devId; /*< 0: 4> device identifier */
177 } T_PSI_CLOSE_REQ;
178 #endif
179
180 #ifndef __T_PSI_CLOSE_CNF__
181 #define __T_PSI_CLOSE_CNF__
182 /*
183 *
184 * CCDGEN:WriteStruct_Count==2347
185 */
186 typedef struct
187 {
188 U32 devId; /*< 0: 4> device identifier */
189 } T_PSI_CLOSE_CNF;
190 #endif
191
192 #ifndef __T_PSI_DTI_OPEN_REQ__
193 #define __T_PSI_DTI_OPEN_REQ__
194 /*
195 *
196 * CCDGEN:WriteStruct_Count==2348
197 */
198 typedef struct
199 {
200 U32 devId; /*< 0: 4> device identifier */
201 T_peer peer; /*< 4: 8> communication entity name */
202 U32 link_id; /*< 12: 4> link identifier */
203 U8 dti_direction; /*< 16: 1> link identifier */
204 U8 _align0; /*< 17: 1> alignment */
205 U8 _align1; /*< 18: 1> alignment */
206 U8 _align2; /*< 19: 1> alignment */
207 } T_PSI_DTI_OPEN_REQ;
208 #endif
209
210 #ifndef __T_PSI_DTI_CLOSE_REQ__
211 #define __T_PSI_DTI_CLOSE_REQ__
212 /*
213 *
214 * CCDGEN:WriteStruct_Count==2349
215 */
216 typedef struct
217 {
218 U32 devId; /*< 0: 4> device identifier */
219 U32 link_id; /*< 4: 4> link identifier */
220 } T_PSI_DTI_CLOSE_REQ;
221 #endif
222
223 #ifndef __T_PSI_DTI_OPEN_CNF__
224 #define __T_PSI_DTI_OPEN_CNF__
225 /*
226 *
227 * CCDGEN:WriteStruct_Count==2350
228 */
229 typedef struct
230 {
231 U32 devId; /*< 0: 4> device identifier */
232 U16 cause; /*< 4: 2> cause value */
233 U8 _align0; /*< 6: 1> alignment */
234 U8 _align1; /*< 7: 1> alignment */
235 U32 link_id; /*< 8: 4> link identifier */
236 } T_PSI_DTI_OPEN_CNF;
237 #endif
238
239 #ifndef __T_PSI_DTI_CLOSE_CNF__
240 #define __T_PSI_DTI_CLOSE_CNF__
241 /*
242 *
243 * CCDGEN:WriteStruct_Count==2351
244 */
245 typedef struct
246 {
247 U32 devId; /*< 0: 4> device identifier */
248 U32 link_id; /*< 4: 4> link identifier */
249 } T_PSI_DTI_CLOSE_CNF;
250 #endif
251
252 #ifndef __T_PSI_DTI_CLOSE_IND__
253 #define __T_PSI_DTI_CLOSE_IND__
254 /*
255 *
256 * CCDGEN:WriteStruct_Count==2352
257 */
258 typedef struct
259 {
260 U32 devId; /*< 0: 4> device identifier */
261 U32 link_id; /*< 4: 4> link identifier */
262 } T_PSI_DTI_CLOSE_IND;
263 #endif
264
265 #ifndef __T_PSI_SETCONF_CNF__
266 #define __T_PSI_SETCONF_CNF__
267 /*
268 *
269 * CCDGEN:WriteStruct_Count==2353
270 */
271 typedef struct
272 {
273 U32 devId; /*< 0: 4> device identifier */
274 U16 cause; /*< 4: 2> cause value */
275 U8 _align0; /*< 6: 1> alignment */
276 U8 _align1; /*< 7: 1> alignment */
277 } T_PSI_SETCONF_CNF;
278 #endif
279
280 #ifndef __T_PSI_SETCONF_REQ__
281 #define __T_PSI_SETCONF_REQ__
282 /*
283 *
284 * CCDGEN:WriteStruct_Count==2354
285 */
286 typedef struct
287 {
288 U32 devId; /*< 0: 4> device identifier */
289 T_DIO_DCB *ptr_DIO_DCB; /*< 4: 4> pointer to all elements of driver configuration parameter (type defined in "p_dio.h") */
290 } T_PSI_SETCONF_REQ;
291 #endif
292
293 #ifndef __T_PSI_SETCONF_REQ_TEST__
294 #define __T_PSI_SETCONF_REQ_TEST__
295 /*
296 *
297 * CCDGEN:WriteStruct_Count==2355
298 */
299 typedef struct
300 {
301 U32 devId; /*< 0: 4> device identifier */
302 T_ctrl_DIO_DCB_UN ctrl_DIO_DCB_UN; /*< 4: 4> (enum=32bit) controller for union */
303 T_DIO_DCB_UN DIO_DCB_UN; /*< 8: 44> Structured Element */
304 } T_PSI_SETCONF_REQ_TEST;
305 #endif
306
307 #ifndef __T_PSI_LINE_STATE_REQ__
308 #define __T_PSI_LINE_STATE_REQ__
309 /*
310 *
311 * CCDGEN:WriteStruct_Count==2356
312 */
313 typedef struct
314 {
315 U32 devId; /*< 0: 4> device identifier */
316 U16 line_state; /*< 4: 2> line state information */
317 U8 _align0; /*< 6: 1> alignment */
318 U8 _align1; /*< 7: 1> alignment */
319 } T_PSI_LINE_STATE_REQ;
320 #endif
321
322 #ifndef __T_PSI_LINE_STATE_CNF__
323 #define __T_PSI_LINE_STATE_CNF__
324 /*
325 *
326 * CCDGEN:WriteStruct_Count==2357
327 */
328 typedef struct
329 {
330 U32 devId; /*< 0: 4> device identifier */
331 } T_PSI_LINE_STATE_CNF;
332 #endif
333
334 #ifndef __T_PSI_LINE_STATE_IND__
335 #define __T_PSI_LINE_STATE_IND__
336 /*
337 *
338 * CCDGEN:WriteStruct_Count==2358
339 */
340 typedef struct
341 {
342 U32 devId; /*< 0: 4> device identifier */
343 U16 line_state; /*< 4: 2> line state information */
344 U8 _align0; /*< 6: 1> alignment */
345 U8 _align1; /*< 7: 1> alignment */
346 } T_PSI_LINE_STATE_IND;
347 #endif
348
349 #ifndef __T_PSI_SIG_CLEAR_IND__
350 #define __T_PSI_SIG_CLEAR_IND__
351 /*
352 *
353 * CCDGEN:WriteStruct_Count==2359
354 */
355 typedef struct
356 {
357 U8 dummy; /*< 0: 1> no parameters */
358 } T_PSI_SIG_CLEAR_IND;
359 #endif
360
361 #ifndef __T_PSI_SIG_FLUSH_IND__
362 #define __T_PSI_SIG_FLUSH_IND__
363 /*
364 *
365 * CCDGEN:WriteStruct_Count==2360
366 */
367 typedef struct
368 {
369 U8 dummy; /*< 0: 1> no parameters */
370 } T_PSI_SIG_FLUSH_IND;
371 #endif
372
373 #ifndef __T_PSI_SIG_READ_IND__
374 #define __T_PSI_SIG_READ_IND__
375 /*
376 *
377 * CCDGEN:WriteStruct_Count==2361
378 */
379 typedef struct
380 {
381 U8 dummy; /*< 0: 1> no parameters */
382 } T_PSI_SIG_READ_IND;
383 #endif
384
385 #ifndef __T_PSI_SIG_WRITE_IND__
386 #define __T_PSI_SIG_WRITE_IND__
387 /*
388 *
389 * CCDGEN:WriteStruct_Count==2362
390 */
391 typedef struct
392 {
393 U8 dummy; /*< 0: 1> no parameters */
394 } T_PSI_SIG_WRITE_IND;
395 #endif
396
397 #ifndef __T_PSI_SIG_CONNECT_IND__
398 #define __T_PSI_SIG_CONNECT_IND__
399 /*
400 *
401 * CCDGEN:WriteStruct_Count==2363
402 */
403 typedef struct
404 {
405 U8 dummy; /*< 0: 1> no parameters */
406 } T_PSI_SIG_CONNECT_IND;
407 #endif
408
409 #ifndef __T_PSI_SIG_DISCONNECT_IND__
410 #define __T_PSI_SIG_DISCONNECT_IND__
411 /*
412 *
413 * CCDGEN:WriteStruct_Count==2364
414 */
415 typedef struct
416 {
417 U8 dummy; /*< 0: 1> no parameters */
418 } T_PSI_SIG_DISCONNECT_IND;
419 #endif
420
421 #ifndef __T_PSI_DIOSIM_INIT_REQ__
422 #define __T_PSI_DIOSIM_INIT_REQ__
423 /*
424 *
425 * CCDGEN:WriteStruct_Count==2365
426 */
427 typedef struct
428 {
429 U16 drv_handle; /*< 0: 2> driver handle */
430 U8 _align0; /*< 2: 1> alignment */
431 U8 _align1; /*< 3: 1> alignment */
432 } T_PSI_DIOSIM_INIT_REQ;
433 #endif
434
435 #ifndef __T_PSI_DIOSIM_INIT_CNF__
436 #define __T_PSI_DIOSIM_INIT_CNF__
437 /*
438 *
439 * CCDGEN:WriteStruct_Count==2366
440 */
441 typedef struct
442 {
443 U16 retValue; /*< 0: 2> return value */
444 U8 _align0; /*< 2: 1> alignment */
445 U8 _align1; /*< 3: 1> alignment */
446 } T_PSI_DIOSIM_INIT_CNF;
447 #endif
448
449 #ifndef __T_PSI_DIOSIM_GET_CAP_REQ__
450 #define __T_PSI_DIOSIM_GET_CAP_REQ__
451 /*
452 *
453 * CCDGEN:WriteStruct_Count==2367
454 */
455 typedef struct
456 {
457 U32 devId; /*< 0: 4> device identifier */
458 } T_PSI_DIOSIM_GET_CAP_REQ;
459 #endif
460
461 #ifndef __T_PSI_DIOSIM_GET_CAP_SER_CNF__
462 #define __T_PSI_DIOSIM_GET_CAP_SER_CNF__
463 /*
464 *
465 * CCDGEN:WriteStruct_Count==2368
466 */
467 typedef struct
468 {
469 U16 retValue; /*< 0: 2> return value */
470 U8 _align0; /*< 2: 1> alignment */
471 U8 _align1; /*< 3: 1> alignment */
472 T_DIO_CAP_SER DIO_CAP_SER; /*< 4: 36> serial device capabiliity structures (type defined in "p_dio.h") */
473 } T_PSI_DIOSIM_GET_CAP_SER_CNF;
474 #endif
475
476 #ifndef __T_PSI_DIOSIM_GET_CAP_PKT_CNF__
477 #define __T_PSI_DIOSIM_GET_CAP_PKT_CNF__
478 /*
479 *
480 * CCDGEN:WriteStruct_Count==2369
481 */
482 typedef struct
483 {
484 U16 retValue; /*< 0: 2> return value */
485 U8 _align0; /*< 2: 1> alignment */
486 U8 _align1; /*< 3: 1> alignment */
487 T_DIO_CAP_PKT DIO_CAP_PKT; /*< 4: 16> Structured Element (type defined in "p_dio.h") */
488 } T_PSI_DIOSIM_GET_CAP_PKT_CNF;
489 #endif
490
491 #ifndef __T_PSI_DIOSIM_SET_CONF_SER_REQ__
492 #define __T_PSI_DIOSIM_SET_CONF_SER_REQ__
493 /*
494 *
495 * CCDGEN:WriteStruct_Count==2370
496 */
497 typedef struct
498 {
499 U32 devId; /*< 0: 4> device identifier */
500 T_DIO_DCB_SER DIO_DCB_SER; /*< 4: 28> Structured Element (type defined in "p_dio.h") */
501 } T_PSI_DIOSIM_SET_CONF_SER_REQ;
502 #endif
503
504 #ifndef __T_PSI_DIOSIM_SET_CONF_PKT_REQ__
505 #define __T_PSI_DIOSIM_SET_CONF_PKT_REQ__
506 /*
507 *
508 * CCDGEN:WriteStruct_Count==2371
509 */
510 typedef struct
511 {
512 U32 devId; /*< 0: 4> device identifier */
513 T_DIO_DCB_PKT DIO_DCB_PKT; /*< 4: 8> Structured Element (type defined in "p_dio.h") */
514 } T_PSI_DIOSIM_SET_CONF_PKT_REQ;
515 #endif
516
517 #ifndef __T_PSI_DIOSIM_SET_CONF_CNF__
518 #define __T_PSI_DIOSIM_SET_CONF_CNF__
519 /*
520 *
521 * CCDGEN:WriteStruct_Count==2372
522 */
523 typedef struct
524 {
525 U16 retValue; /*< 0: 2> return value */
526 U8 _align0; /*< 2: 1> alignment */
527 U8 _align1; /*< 3: 1> alignment */
528 } T_PSI_DIOSIM_SET_CONF_CNF;
529 #endif
530
531 #ifndef __T_PSI_DIOSIM_GET_CONF_SER_REQ__
532 #define __T_PSI_DIOSIM_GET_CONF_SER_REQ__
533 /*
534 *
535 * CCDGEN:WriteStruct_Count==2373
536 */
537 typedef struct
538 {
539 U32 devId; /*< 0: 4> device identifier */
540 T_DIO_DCB_SER DIO_DCB_SER; /*< 4: 28> Structured Element (type defined in "p_dio.h") */
541 } T_PSI_DIOSIM_GET_CONF_SER_REQ;
542 #endif
543
544 #ifndef __T_PSI_DIOSIM_GET_CONF_CNF__
545 #define __T_PSI_DIOSIM_GET_CONF_CNF__
546 /*
547 *
548 * CCDGEN:WriteStruct_Count==2374
549 */
550 typedef struct
551 {
552 U16 retValue; /*< 0: 2> return value */
553 U8 _align0; /*< 2: 1> alignment */
554 U8 _align1; /*< 3: 1> alignment */
555 } T_PSI_DIOSIM_GET_CONF_CNF;
556 #endif
557
558 #ifndef __T_PSI_DIOSIM_CLOSE_DEV_REQ__
559 #define __T_PSI_DIOSIM_CLOSE_DEV_REQ__
560 /*
561 *
562 * CCDGEN:WriteStruct_Count==2375
563 */
564 typedef struct
565 {
566 U32 devId; /*< 0: 4> device identifier */
567 } T_PSI_DIOSIM_CLOSE_DEV_REQ;
568 #endif
569
570 #ifndef __T_PSI_DIOSIM_CLOSE_DEV_CNF__
571 #define __T_PSI_DIOSIM_CLOSE_DEV_CNF__
572 /*
573 *
574 * CCDGEN:WriteStruct_Count==2376
575 */
576 typedef struct
577 {
578 U16 retValue; /*< 0: 2> return value */
579 U8 _align0; /*< 2: 1> alignment */
580 U8 _align1; /*< 3: 1> alignment */
581 } T_PSI_DIOSIM_CLOSE_DEV_CNF;
582 #endif
583
584 #ifndef __T_PSI_DIOSIM_FLUSH_REQ__
585 #define __T_PSI_DIOSIM_FLUSH_REQ__
586 /*
587 *
588 * CCDGEN:WriteStruct_Count==2377
589 */
590 typedef struct
591 {
592 U32 devId; /*< 0: 4> device identifier */
593 } T_PSI_DIOSIM_FLUSH_REQ;
594 #endif
595
596 #ifndef __T_PSI_DIOSIM_FLUSH_CNF__
597 #define __T_PSI_DIOSIM_FLUSH_CNF__
598 /*
599 *
600 * CCDGEN:WriteStruct_Count==2378
601 */
602 typedef struct
603 {
604 U16 retValue; /*< 0: 2> return value */
605 U8 _align0; /*< 2: 1> alignment */
606 U8 _align1; /*< 3: 1> alignment */
607 } T_PSI_DIOSIM_FLUSH_CNF;
608 #endif
609
610 #ifndef __T_PSI_DIOSIM_CLEAR_REQ__
611 #define __T_PSI_DIOSIM_CLEAR_REQ__
612 /*
613 *
614 * CCDGEN:WriteStruct_Count==2379
615 */
616 typedef struct
617 {
618 U32 devId; /*< 0: 4> device identifier */
619 } T_PSI_DIOSIM_CLEAR_REQ;
620 #endif
621
622 #ifndef __T_PSI_DIOSIM_CLEAR_CNF__
623 #define __T_PSI_DIOSIM_CLEAR_CNF__
624 /*
625 *
626 * CCDGEN:WriteStruct_Count==2380
627 */
628 typedef struct
629 {
630 U16 retValue; /*< 0: 2> return value */
631 U8 _align0; /*< 2: 1> alignment */
632 U8 _align1; /*< 3: 1> alignment */
633 } T_PSI_DIOSIM_CLEAR_CNF;
634 #endif
635
636 #ifndef __T_PSI_DIOSIM_GET_TXB_REQ__
637 #define __T_PSI_DIOSIM_GET_TXB_REQ__
638 /*
639 *
640 * CCDGEN:WriteStruct_Count==2381
641 */
642 typedef struct
643 {
644 U32 devId; /*< 0: 4> device identifier */
645 } T_PSI_DIOSIM_GET_TXB_REQ;
646 #endif
647
648 #ifndef __T_PSI_DIOSIM_GET_TXB_CNF__
649 #define __T_PSI_DIOSIM_GET_TXB_CNF__
650 /*
651 *
652 * CCDGEN:WriteStruct_Count==2382
653 */
654 typedef struct
655 {
656 U16 retValue; /*< 0: 2> return value */
657 U8 _align0; /*< 2: 1> alignment */
658 U8 _align1; /*< 3: 1> alignment */
659 } T_PSI_DIOSIM_GET_TXB_CNF;
660 #endif
661
662 #ifndef __T_PSI_DIOSIM_SET_RXB_REQ__
663 #define __T_PSI_DIOSIM_SET_RXB_REQ__
664 /*
665 *
666 * CCDGEN:WriteStruct_Count==2383
667 */
668 typedef struct
669 {
670 U32 devId; /*< 0: 4> device identifier */
671 } T_PSI_DIOSIM_SET_RXB_REQ;
672 #endif
673
674 #ifndef __T_PSI_DIOSIM_SET_RXB_CNF__
675 #define __T_PSI_DIOSIM_SET_RXB_CNF__
676 /*
677 *
678 * CCDGEN:WriteStruct_Count==2384
679 */
680 typedef struct
681 {
682 U16 retValue; /*< 0: 2> return value */
683 U8 _align0; /*< 2: 1> alignment */
684 U8 _align1; /*< 3: 1> alignment */
685 } T_PSI_DIOSIM_SET_RXB_CNF;
686 #endif
687
688 #ifndef __T_PSI_DIOSIM_READ_REQ__
689 #define __T_PSI_DIOSIM_READ_REQ__
690 /*
691 *
692 * CCDGEN:WriteStruct_Count==2385
693 */
694 typedef struct
695 {
696 U32 devId; /*< 0: 4> device identifier */
697 } T_PSI_DIOSIM_READ_REQ;
698 #endif
699
700 #ifndef __T_PSI_DIOSIM_READ_SER_CNF__
701 #define __T_PSI_DIOSIM_READ_SER_CNF__
702 /*
703 *
704 * CCDGEN:WriteStruct_Count==2386
705 */
706 typedef struct
707 {
708 U16 retValue; /*< 0: 2> return value */
709 U16 control_type; /*< 2: 2> data types */
710 U16 length; /*< 4: 2> len of dio_ctrl */
711 U8 _align0; /*< 6: 1> alignment */
712 U8 _align1; /*< 7: 1> alignment */
713 U32 state; /*< 8: 4> line states */
714 } T_PSI_DIOSIM_READ_SER_CNF;
715 #endif
716
717 #ifndef __T_PSI_DIOSIM_READ_PKT_CNF__
718 #define __T_PSI_DIOSIM_READ_PKT_CNF__
719 /*
720 *
721 * CCDGEN:WriteStruct_Count==2387
722 */
723 typedef struct
724 {
725 U16 retValue; /*< 0: 2> return value */
726 U8 _align0; /*< 2: 1> alignment */
727 U8 _align1; /*< 3: 1> alignment */
728 } T_PSI_DIOSIM_READ_PKT_CNF;
729 #endif
730
731 #ifndef __T_PSI_DIOSIM_WRITE_SER_REQ__
732 #define __T_PSI_DIOSIM_WRITE_SER_REQ__
733 /*
734 *
735 * CCDGEN:WriteStruct_Count==2388
736 */
737 typedef struct
738 {
739 U32 devId; /*< 0: 4> device identifier */
740 T_DIO_CTRL_LINES DIO_CTRL_LINES; /*< 4: 8> Structured Element (type defined in "p_dio.h") */
741 } T_PSI_DIOSIM_WRITE_SER_REQ;
742 #endif
743
744 #ifndef __T_PSI_DIOSIM_WRITE_PKT_REQ__
745 #define __T_PSI_DIOSIM_WRITE_PKT_REQ__
746 /*
747 *
748 * CCDGEN:WriteStruct_Count==2389
749 */
750 typedef struct
751 {
752 U32 devId; /*< 0: 4> device identifier */
753 } T_PSI_DIOSIM_WRITE_PKT_REQ;
754 #endif
755
756 #ifndef __T_PSI_DIOSIM_WRITE_CNF__
757 #define __T_PSI_DIOSIM_WRITE_CNF__
758 /*
759 *
760 * CCDGEN:WriteStruct_Count==2390
761 */
762 typedef struct
763 {
764 U16 retValue; /*< 0: 2> return value */
765 U8 _align0; /*< 2: 1> alignment */
766 U8 _align1; /*< 3: 1> alignment */
767 } T_PSI_DIOSIM_WRITE_CNF;
768 #endif
769
770 #ifndef __T_PSI_DIOSIM_EXIT_REQ__
771 #define __T_PSI_DIOSIM_EXIT_REQ__
772 /*
773 *
774 * CCDGEN:WriteStruct_Count==2391
775 */
776 typedef struct
777 {
778 U8 dummy; /*< 0: 1> no parameters */
779 } T_PSI_DIOSIM_EXIT_REQ;
780 #endif
781
782 #ifndef __T_PSI_DIOSIM_SIGN_IND__
783 #define __T_PSI_DIOSIM_SIGN_IND__
784 /*
785 *
786 * CCDGEN:WriteStruct_Count==2392
787 */
788 typedef struct
789 {
790 U32 devId; /*< 0: 4> device identifier */
791 U16 signal_type; /*< 4: 2> signal information */
792 U8 _align0; /*< 6: 1> alignment */
793 U8 _align1; /*< 7: 1> alignment */
794 } T_PSI_DIOSIM_SIGN_IND;
795 #endif
796
797
798 #include "CDG_LEAVE.h"
799
800
801 #endif