FreeCalypso > hg > fc-tourmaline
diff cdg-hybrid/cdginc/p_psi.h @ 14:35f7a1dc9f7d
cdg-hybrid: import from Magnetite
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Fri, 16 Oct 2020 07:15:38 +0000 |
| parents | |
| children |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/cdg-hybrid/cdginc/p_psi.h Fri Oct 16 07:15:38 2020 +0000 @@ -0,0 +1,801 @@ +/* ++--------------------------------------------------------------------------+ +| PROJECT : PROTOCOL STACK | +| FILE : p_psi.h | +| SOURCE : "sap\psi.pdf" | +| LastModified : "2004-02-09" | +| IdAndVersion : "..01.001" | +| SrcFileTime : "Thu Nov 29 09:51:16 2007" | +| Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | +| !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | ++--------------------------------------------------------------------------+ +*/ + +/* PRAGMAS + * PREFIX : NONE + * COMPATIBILITY_DEFINES : NO (require PREFIX) + * ALWAYS_ENUM_IN_VAL_FILE: NO + * ENABLE_GROUP: NO + * CAPITALIZE_TYPENAME: NO + */ + + +#ifndef P_PSI_H +#define P_PSI_H + + +#define CDG_ENTER__P_PSI_H + +#define CDG_ENTER__FILENAME _P_PSI_H +#define CDG_ENTER__P_PSI_H__FILE_TYPE CDGINC +#define CDG_ENTER__P_PSI_H__LAST_MODIFIED _2004_02_09 +#define CDG_ENTER__P_PSI_H__ID_AND_VERSION __01_001 + +#define CDG_ENTER__P_PSI_H__SRC_FILE_TIME _Thu_Nov_29_09_51_16_2007 + +#include "CDG_ENTER.h" + +#undef CDG_ENTER__P_PSI_H + +#undef CDG_ENTER__FILENAME + + +#include "p_psi.val" + +#include "p_dio.h" + +#ifndef __T_DIO_CAP_UN__ +#define __T_DIO_CAP_UN__ +/* + * Structured Element + * CCDGEN:WriteStruct_Count==2338 + */ +typedef union +{ + T_DIO_CAP_SER DIO_CAP_SER; /*< 0: 36> serial device capabiliity structures (type defined in "p_dio.h") */ + T_DIO_CAP_PKT DIO_CAP_PKT; /*< 0: 16> Structured Element (type defined in "p_dio.h") */ + T_DIO_CAP_SER_MUX DIO_CAP_SER_MUX; /*< 0: 40> Structured Element (type defined in "p_dio.h") */ +} T_DIO_CAP_UN; +#endif + +#ifndef __T_DIO_DCB_UN__ +#define __T_DIO_DCB_UN__ +/* + * Structured Element + * CCDGEN:WriteStruct_Count==2339 + */ +typedef union +{ + T_DIO_DCB_SER DIO_DCB_SER; /*< 0: 28> Structured Element (type defined in "p_dio.h") */ + T_DIO_DCB_PKT DIO_DCB_PKT; /*< 0: 8> Structured Element (type defined in "p_dio.h") */ + T_DIO_DCB_SER_MUX DIO_DCB_SER_MUX; /*< 0: 44> Structured Element (type defined in "p_dio.h") */ +} T_DIO_DCB_UN; +#endif + +#ifndef __T_peer__ +#define __T_peer__ +/* + * communication entity name + * CCDGEN:WriteStruct_Count==2340 + */ +typedef struct +{ + U8 name[PSI_PEER_ENTITY_NAME_LENGTH]; /*< 0: 6> entity name */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ +} T_peer; +#endif + + +/* + * End of substructure section, begin of primitive definition section + */ + +#ifndef __T_PSI_CONN_IND__ +#define __T_PSI_CONN_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2341 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_DIO_CAP *ptr_DIO_CAP; /*< 4: 4> pointer to device capabiliity structures (type defined in "p_dio.h") */ + U8 psi_data_mode; /*< 8: 1> TE will use the device to transmit AT commands or data or both */ + U8 _align0; /*< 9: 1> alignment */ + U8 _align1; /*< 10: 1> alignment */ + U8 _align2; /*< 11: 1> alignment */ +} T_PSI_CONN_IND; +#endif + +#ifndef __T_PSI_CONN_IND_TEST__ +#define __T_PSI_CONN_IND_TEST__ +/* + * + * CCDGEN:WriteStruct_Count==2342 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_ctrl_DIO_CAP_UN ctrl_DIO_CAP_UN; /*< 4: 4> (enum=32bit) controller for union */ + T_DIO_CAP_UN DIO_CAP_UN; /*< 8: 40> Structured Element */ + U8 psi_data_mode; /*< 48: 1> TE will use the device to transmit AT commands or data or both */ + U8 _align0; /*< 49: 1> alignment */ + U8 _align1; /*< 50: 1> alignment */ + U8 _align2; /*< 51: 1> alignment */ +} T_PSI_CONN_IND_TEST; +#endif + +#ifndef __T_PSI_CONN_RES__ +#define __T_PSI_CONN_RES__ +/* + * + * CCDGEN:WriteStruct_Count==2343 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_CONN_RES; +#endif + +#ifndef __T_PSI_CONN_REJ__ +#define __T_PSI_CONN_REJ__ +/* + * + * CCDGEN:WriteStruct_Count==2344 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_CONN_REJ; +#endif + +#ifndef __T_PSI_DISCONN_IND__ +#define __T_PSI_DISCONN_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2345 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U16 cause; /*< 4: 2> cause value */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ +} T_PSI_DISCONN_IND; +#endif + +#ifndef __T_PSI_CLOSE_REQ__ +#define __T_PSI_CLOSE_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2346 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_CLOSE_REQ; +#endif + +#ifndef __T_PSI_CLOSE_CNF__ +#define __T_PSI_CLOSE_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2347 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_CLOSE_CNF; +#endif + +#ifndef __T_PSI_DTI_OPEN_REQ__ +#define __T_PSI_DTI_OPEN_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2348 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_peer peer; /*< 4: 8> communication entity name */ + U32 link_id; /*< 12: 4> link identifier */ + U8 dti_direction; /*< 16: 1> link identifier */ + U8 _align0; /*< 17: 1> alignment */ + U8 _align1; /*< 18: 1> alignment */ + U8 _align2; /*< 19: 1> alignment */ +} T_PSI_DTI_OPEN_REQ; +#endif + +#ifndef __T_PSI_DTI_CLOSE_REQ__ +#define __T_PSI_DTI_CLOSE_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2349 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U32 link_id; /*< 4: 4> link identifier */ +} T_PSI_DTI_CLOSE_REQ; +#endif + +#ifndef __T_PSI_DTI_OPEN_CNF__ +#define __T_PSI_DTI_OPEN_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2350 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U16 cause; /*< 4: 2> cause value */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ + U32 link_id; /*< 8: 4> link identifier */ +} T_PSI_DTI_OPEN_CNF; +#endif + +#ifndef __T_PSI_DTI_CLOSE_CNF__ +#define __T_PSI_DTI_CLOSE_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2351 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U32 link_id; /*< 4: 4> link identifier */ +} T_PSI_DTI_CLOSE_CNF; +#endif + +#ifndef __T_PSI_DTI_CLOSE_IND__ +#define __T_PSI_DTI_CLOSE_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2352 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U32 link_id; /*< 4: 4> link identifier */ +} T_PSI_DTI_CLOSE_IND; +#endif + +#ifndef __T_PSI_SETCONF_CNF__ +#define __T_PSI_SETCONF_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2353 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U16 cause; /*< 4: 2> cause value */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ +} T_PSI_SETCONF_CNF; +#endif + +#ifndef __T_PSI_SETCONF_REQ__ +#define __T_PSI_SETCONF_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2354 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_DIO_DCB *ptr_DIO_DCB; /*< 4: 4> pointer to all elements of driver configuration parameter (type defined in "p_dio.h") */ +} T_PSI_SETCONF_REQ; +#endif + +#ifndef __T_PSI_SETCONF_REQ_TEST__ +#define __T_PSI_SETCONF_REQ_TEST__ +/* + * + * CCDGEN:WriteStruct_Count==2355 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_ctrl_DIO_DCB_UN ctrl_DIO_DCB_UN; /*< 4: 4> (enum=32bit) controller for union */ + T_DIO_DCB_UN DIO_DCB_UN; /*< 8: 44> Structured Element */ +} T_PSI_SETCONF_REQ_TEST; +#endif + +#ifndef __T_PSI_LINE_STATE_REQ__ +#define __T_PSI_LINE_STATE_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2356 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U16 line_state; /*< 4: 2> line state information */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ +} T_PSI_LINE_STATE_REQ; +#endif + +#ifndef __T_PSI_LINE_STATE_CNF__ +#define __T_PSI_LINE_STATE_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2357 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_LINE_STATE_CNF; +#endif + +#ifndef __T_PSI_LINE_STATE_IND__ +#define __T_PSI_LINE_STATE_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2358 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U16 line_state; /*< 4: 2> line state information */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ +} T_PSI_LINE_STATE_IND; +#endif + +#ifndef __T_PSI_SIG_CLEAR_IND__ +#define __T_PSI_SIG_CLEAR_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2359 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_SIG_CLEAR_IND; +#endif + +#ifndef __T_PSI_SIG_FLUSH_IND__ +#define __T_PSI_SIG_FLUSH_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2360 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_SIG_FLUSH_IND; +#endif + +#ifndef __T_PSI_SIG_READ_IND__ +#define __T_PSI_SIG_READ_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2361 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_SIG_READ_IND; +#endif + +#ifndef __T_PSI_SIG_WRITE_IND__ +#define __T_PSI_SIG_WRITE_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2362 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_SIG_WRITE_IND; +#endif + +#ifndef __T_PSI_SIG_CONNECT_IND__ +#define __T_PSI_SIG_CONNECT_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2363 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_SIG_CONNECT_IND; +#endif + +#ifndef __T_PSI_SIG_DISCONNECT_IND__ +#define __T_PSI_SIG_DISCONNECT_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2364 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_SIG_DISCONNECT_IND; +#endif + +#ifndef __T_PSI_DIOSIM_INIT_REQ__ +#define __T_PSI_DIOSIM_INIT_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2365 + */ +typedef struct +{ + U16 drv_handle; /*< 0: 2> driver handle */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_INIT_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_INIT_CNF__ +#define __T_PSI_DIOSIM_INIT_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2366 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_INIT_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_GET_CAP_REQ__ +#define __T_PSI_DIOSIM_GET_CAP_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2367 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_GET_CAP_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_GET_CAP_SER_CNF__ +#define __T_PSI_DIOSIM_GET_CAP_SER_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2368 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ + T_DIO_CAP_SER DIO_CAP_SER; /*< 4: 36> serial device capabiliity structures (type defined in "p_dio.h") */ +} T_PSI_DIOSIM_GET_CAP_SER_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_GET_CAP_PKT_CNF__ +#define __T_PSI_DIOSIM_GET_CAP_PKT_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2369 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ + T_DIO_CAP_PKT DIO_CAP_PKT; /*< 4: 16> Structured Element (type defined in "p_dio.h") */ +} T_PSI_DIOSIM_GET_CAP_PKT_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_SET_CONF_SER_REQ__ +#define __T_PSI_DIOSIM_SET_CONF_SER_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2370 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_DIO_DCB_SER DIO_DCB_SER; /*< 4: 28> Structured Element (type defined in "p_dio.h") */ +} T_PSI_DIOSIM_SET_CONF_SER_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_SET_CONF_PKT_REQ__ +#define __T_PSI_DIOSIM_SET_CONF_PKT_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2371 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_DIO_DCB_PKT DIO_DCB_PKT; /*< 4: 8> Structured Element (type defined in "p_dio.h") */ +} T_PSI_DIOSIM_SET_CONF_PKT_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_SET_CONF_CNF__ +#define __T_PSI_DIOSIM_SET_CONF_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2372 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_SET_CONF_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_GET_CONF_SER_REQ__ +#define __T_PSI_DIOSIM_GET_CONF_SER_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2373 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_DIO_DCB_SER DIO_DCB_SER; /*< 4: 28> Structured Element (type defined in "p_dio.h") */ +} T_PSI_DIOSIM_GET_CONF_SER_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_GET_CONF_CNF__ +#define __T_PSI_DIOSIM_GET_CONF_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2374 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_GET_CONF_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_CLOSE_DEV_REQ__ +#define __T_PSI_DIOSIM_CLOSE_DEV_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2375 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_CLOSE_DEV_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_CLOSE_DEV_CNF__ +#define __T_PSI_DIOSIM_CLOSE_DEV_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2376 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_CLOSE_DEV_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_FLUSH_REQ__ +#define __T_PSI_DIOSIM_FLUSH_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2377 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_FLUSH_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_FLUSH_CNF__ +#define __T_PSI_DIOSIM_FLUSH_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2378 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_FLUSH_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_CLEAR_REQ__ +#define __T_PSI_DIOSIM_CLEAR_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2379 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_CLEAR_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_CLEAR_CNF__ +#define __T_PSI_DIOSIM_CLEAR_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2380 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_CLEAR_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_GET_TXB_REQ__ +#define __T_PSI_DIOSIM_GET_TXB_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2381 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_GET_TXB_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_GET_TXB_CNF__ +#define __T_PSI_DIOSIM_GET_TXB_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2382 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_GET_TXB_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_SET_RXB_REQ__ +#define __T_PSI_DIOSIM_SET_RXB_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2383 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_SET_RXB_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_SET_RXB_CNF__ +#define __T_PSI_DIOSIM_SET_RXB_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2384 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_SET_RXB_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_READ_REQ__ +#define __T_PSI_DIOSIM_READ_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2385 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_READ_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_READ_SER_CNF__ +#define __T_PSI_DIOSIM_READ_SER_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2386 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U16 control_type; /*< 2: 2> data types */ + U16 length; /*< 4: 2> len of dio_ctrl */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ + U32 state; /*< 8: 4> line states */ +} T_PSI_DIOSIM_READ_SER_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_READ_PKT_CNF__ +#define __T_PSI_DIOSIM_READ_PKT_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2387 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_READ_PKT_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_WRITE_SER_REQ__ +#define __T_PSI_DIOSIM_WRITE_SER_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2388 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + T_DIO_CTRL_LINES DIO_CTRL_LINES; /*< 4: 8> Structured Element (type defined in "p_dio.h") */ +} T_PSI_DIOSIM_WRITE_SER_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_WRITE_PKT_REQ__ +#define __T_PSI_DIOSIM_WRITE_PKT_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2389 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ +} T_PSI_DIOSIM_WRITE_PKT_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_WRITE_CNF__ +#define __T_PSI_DIOSIM_WRITE_CNF__ +/* + * + * CCDGEN:WriteStruct_Count==2390 + */ +typedef struct +{ + U16 retValue; /*< 0: 2> return value */ + U8 _align0; /*< 2: 1> alignment */ + U8 _align1; /*< 3: 1> alignment */ +} T_PSI_DIOSIM_WRITE_CNF; +#endif + +#ifndef __T_PSI_DIOSIM_EXIT_REQ__ +#define __T_PSI_DIOSIM_EXIT_REQ__ +/* + * + * CCDGEN:WriteStruct_Count==2391 + */ +typedef struct +{ + U8 dummy; /*< 0: 1> no parameters */ +} T_PSI_DIOSIM_EXIT_REQ; +#endif + +#ifndef __T_PSI_DIOSIM_SIGN_IND__ +#define __T_PSI_DIOSIM_SIGN_IND__ +/* + * + * CCDGEN:WriteStruct_Count==2392 + */ +typedef struct +{ + U32 devId; /*< 0: 4> device identifier */ + U16 signal_type; /*< 4: 2> signal information */ + U8 _align0; /*< 6: 1> alignment */ + U8 _align1; /*< 7: 1> alignment */ +} T_PSI_DIOSIM_SIGN_IND; +#endif + + +#include "CDG_LEAVE.h" + + +#endif