FreeCalypso > hg > fc-usbser-tools
annotate doc/FTDI-EEPROM-format @ 69:065f68a94b6b
doc/FTDI-EEPROM-format: beginning of article
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 14 Sep 2023 23:56:25 +0000 |
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children | 09da7db45dce |
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doc/FTDI-EEPROM-format: beginning of article
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1 FTDI configuration EEPROM format |
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2 ================================ |
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3 |
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4 Unfortunately FTDI never documented the format of their EEPROM configuration |
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5 structure - apparently they consider it a proprietary trade secret just like |
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6 the wire protocol spoken over USB between their chips and their closed-source |
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7 proprietary drivers. All FOSS community support for these chips is based on |
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8 reverse engineering, and that includes the EEPROM format. |
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9 |
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10 We (FreeCalypso) have not done any significant FTDI RE of our own - instead we |
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11 are taking the knowledge that already exists in the FOSS community (including |
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12 RE-based knowledge of FTDI EEPROM format) and using it to produce better tools. |
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13 |
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14 The present document summarizes the bits of knowledge we have collected |
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15 regarding FTDI's EEPROM configuration structure - this knowledge base is what |
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16 our generator and decoder tools are built on, as well as shipped EEPROM |
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17 programming in all physical hw products made by FreeCalypso. |
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18 |
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19 Word-based vs byte-based views |
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20 ============================== |
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21 |
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22 Before FTDI started integrating the EEPROM inside their FT232R and FT-X chips, |
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23 their original design used external serial EEPROMs of 93C46, 93C56 or 93C66 |
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24 type. These EEPROMs are physically structured as an array of 16-bit words - or |
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25 more precisely, some EEPROM parts support both word and byte organization modes, |
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26 selected by pin strapping, but FTDI chips require word-structured EEPROMs. |
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27 |
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28 Given this physical organization, we tend to view the EEPROM structure as an |
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29 array of 16-bit words. For some parts of the configuration structure, such as |
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30 16-bit ID words and UCS-2 strings, this word-based view is ideal - however, |
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31 there are also times when the EEPROM structure needs to be viewed in terms of |
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32 bytes: |
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33 |
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34 * Some configuration parameters are given as bytes rather than words; |
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35 |
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36 * Pointers from the fixed structure at the beginning of the EEPROM to string |
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37 descriptors in the "user" area use byte-based addressing. |
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38 |
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39 The correspondence order between bytes and words is little-endian. |
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40 |
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41 Fixed header structure |
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42 ====================== |
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43 |
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44 The first 10 words (20 or 0x14 bytes) of the EEPROM follow the same basic |
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45 structure across all known-to-us FTDI chips: |
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46 |
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47 Word 0 (bytes 0x00 and 0x01): this word is best viewed as two separate bytes, |
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48 and these bytes encode FTDI-specific functions detailed later in this document. |
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49 |
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50 Word 1 (bytes 0x02 and 0x03): USB vendor ID, called idVendor in the USB spec. |
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51 |
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52 Word 2 (bytes 0x04 and 0x05): USB product ID, called idProduct in the USB spec. |
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53 |
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54 Word 3 (bytes 0x06 and 0x07): originally allocated for the bcdDevice word in |
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55 the USB device descriptor, see Table 9-8 in the USB 2.0 specification. On older |
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56 FTDI chips such as FT2232D, the chip takes the value programmed in this EEPROM |
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57 word and actually reports this value in its device descriptor - thus if the |
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58 EEPROM is misprogrammed, all standard host software will be misled; see our |
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59 FTDI-chip-ID article. OTOH, FT232R ignores this word and always reports its |
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60 bcdDevice as 0x0600; in terms of FT232R EEPROM images captured in the wild, |
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61 some have zero in this word while others have 0x0600. FT2232H behaves like |
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62 FT232R (ignores this EEPROM word), but I haven't seen any EEPROM images with |
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63 this word zeroed out - it appears that FTDI's official tools still insert the |
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64 correct bcdDevice value. |
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65 |
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66 Word 4 (bytes 0x08 and 0x09): this word is best viewed as two separate bytes. |
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67 Both bytes go into the USB configuration descriptor: byte 0x08 is bmAttributes |
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68 and byte 0x09 is bMaxPower. See USB 2.0 specification Table 9-10 for the |
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69 detailed format. |
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70 |
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71 Word 5 (bytes 0x0A and 0x0B): this word is best viewed as two separate bytes, |
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72 and these bytes encode FTDI-specific functions detailed later in this document. |
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73 |
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74 Word 6 (bytes 0x0C and 0x0D): originally allocated for the bcdUSB word in the |
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75 USB device descriptor, indicating the version of the USB spec which the device |
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76 claims to support. Starting with FT2232H this word has been repurposed for |
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77 other functions, as detailed in the chip-specific sections below. |
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78 |
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79 Word 7 (bytes 0x0E and 0x0F): pointer to the manufacturer ID string; format |
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80 explained later in the string descriptors section. |
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81 |
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82 Word 8 (bytes 0x10 and 0x11): pointer to the product ID string. |
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83 |
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84 Word 9 (bytes 0x12 and 0x13): pointer to the serial number string if one is |
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85 present, otherwise 0. |
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86 |
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87 FTDI-specific bytes in the fixed header |
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88 ======================================= |
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89 |
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90 Bytes 00, 01, 0A and 0B in the structure covered above are FTDI-specific (don't |
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91 correspond to any fields in any of the standard USB descriptors), and many of |
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92 the functions controlled by these bytes differ significantly from one FTDI chip |
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93 type to the next. |
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94 |
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95 FT2232x bytes 00 and 01 |
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96 ----------------------- |
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97 |
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98 On FT2232x chips bytes 00 and 01 configure channels A and B, respectively. |
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99 The 3 least significant bits of each byte encode the channel mode as follows: |
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100 |
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101 0 = UART |
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102 1 = 245-style FIFO |
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103 2 = fast opto-isolated serial |
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104 4 = CPU-style FIFO |
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105 |
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106 Bit 3 (mask 0x08) appears to have no function in the chip itself, but is used |
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107 by FTDI's Losedows drivers: for each of the two channels, FTDI's VCP driver is |
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108 selected if the bit is set and D2XX driver is selected if the bit is cleared. |
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109 |
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110 On FT2232C/D only (not on FT2232H), bit 4 (mask 0x10) enables high current drive |
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111 on the respective A/B channel. |
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112 |
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113 On FT2232H only, byte 01 bit 7 (mask 0x80) turns on a feature that is misnamed |
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114 "Suspend on DBus 7 Low" in FTDI's official programming tool. It is misnamed |
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115 because the actual pin in question is BCBUS7, not "DBUS7". When this function |
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116 is enabled via this bit, BCBUS7 becomes PWRSAV# input, which is sufficiently |
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117 documented in the FT2232H datasheet. |
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118 |
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119 ftee-gen2232c and ftee-gen2232h default for both bytes is 0x08. |
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120 |
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121 FT232R byte 00 |
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122 -------------- |
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123 |
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124 This byte is conceptually similar to its counterpart on FT2232x, but not exactly |
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125 the same, and NOT compatible. FT232R byte 00 bit assignments are as follows: |
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126 |
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127 bit 0: 0 for FT232R, 1 for FT245R |
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128 bit 1: use external oscillator if set |
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129 bit 2: high current drive if set |
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130 bit 3: same VCP/D2XX nonsense as on other chips, but with reversed sense: |
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131 0 means VCP, 1 means D2XX on this chip |
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132 |
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133 ftee-gen232r default for this byte is 0x00. |
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134 |
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135 FT232R byte 01 |
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136 -------------- |
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137 |
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138 This byte is unique to FT232R: it sets the maximum packet size the chip |
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139 advertises for its Data In endpoint, via wMaxPacketSize in the endpoint |
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140 descriptor. The standard value is 64 (0x40), and there does not seem to be |
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141 any need to change it. |
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142 |
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143 Byte 0A on all FTDI chips |
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144 ------------------------- |
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145 |
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146 This byte has the same bit assignments across all FTDI chips we work with, |
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147 although newer chips don't support some of the older bits: |
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148 |
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149 bit 0: isochronous endpoint control on FT232BM and FT2232C/D |
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150 bit 1: isochronous endpoint control on FT232BM and FT2232C/D |
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151 Bit 2: enable suspend mode pull-down on I/O pins (all chips) |
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152 bit 3: 1 means serial number string present, 0 means serial # string absent |
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153 bit 4: set bcdUSB in device descriptor to EEPROM value (only up to FT2232C/D) |
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154 bit 5: isochronous endpoint control on FT2232C/D |
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155 bit 6: isochronous endpoint control on FT2232C/D |
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156 |
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157 See chip-specific sections below for the details on isochronous endpoint |
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158 control bits. |
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159 |
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160 ftee-gen* default for this byte is 0x00. |
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161 |
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162 Byte 0B: FT2232x |
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163 ---------------- |
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164 |
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165 This byte appears to be unused on FT2232C/D and on FT2232H. |
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166 |
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167 Byte 0B: FT232R |
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168 --------------- |
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169 |
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170 This byte controls UART signal inversion. Bits 0 through 7 (lsb through msb) |
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171 correspond to DBUS0 through DBUS7: if a given bit is set, the corresponding |
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172 DBUS/UART signal is inverted. |
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173 |
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174 FT232BM specifics |
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175 ================= |
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176 |
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177 We don't have much support for this chip as it predates FreeCalypso involvement |
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178 in the business of FTDI chip tinkering - however, we know the following bits: |
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179 |
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180 * The fixed part of the EEPROM config structure is just the 10 words described |
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181 above, and the strings area begins at byte offset 0x14. |
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182 |
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183 * Isochronous endpoint control via byte 0A appears to be the same as for |
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184 Channel A of FT2232C/D, described below. |
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185 |
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186 FT2232C/D specifics |
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187 =================== |
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188 |
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189 Words 0 through 9 (bytes up to 0x13) are as explained above. The only |
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190 additional FT2232C/D-specific word is 10: |
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191 |
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192 Byte 0x14 (low half of word 10) holds the EEPROM type: set to 0x46 for 93C46, |
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193 0x56 for 93C56 or 0x66 for 93C66. It is not clear if the chip actually uses |
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194 this byte for anything: it seems to me that FTDI's EEPROM read engine has to |
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195 determine the required number of address bits (presumably by asking to read |
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196 address 0 and looking for the position of the dummy 0 bit from the EEPROM) |
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197 before it can proceed with incrementing addresses. (The address bit order |
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198 in the serial EEPROM interface is big-endian, hence one needs to know the |
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199 correct number of address bits in order to increment linearly.) |
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200 |
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201 Byte 0x15 (high half of word 10) appears to be unused. |
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202 |
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203 The strings area of the EEPROM begins with word 11 or byte offset 0x16. |
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204 |
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205 Isochronous endpoint control |
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206 ---------------------------- |
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207 |
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208 The 4 data endpoints on this chip (In and Out for each channel) are of type |
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209 Bulk by default, but each of these 4 endpoints is independently selectable |
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210 between bulk and isochronous via these 4 bits in byte 0A: |
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211 |
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212 bit 0: make Channel A data In endpoint isochronous |
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213 bit 1: make Channel A data Out endpoint isochronous |
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214 bit 5: make Channel B data In endpoint isochronous |
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215 bit 6: make Channel B data Out endpoint isochronous |
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216 |
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217 FT2232H specifics |
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218 ================= |
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219 |
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220 On both FT2232H and FT4232H (which we don't support yet) EEPROM word 6 |
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221 (originally allocated for bcdUSB override) is repurposed for I/O electrical |
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222 interface configuration. The 16-bit word is divided into four 4-bit groups, |
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223 mapped to pins as follows: |
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224 |
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225 Group # FT2232H pins FT4232H pins |
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226 -------------------------------------------- |
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227 0 ADBUSx ADBUSx |
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228 1 ACBUSx BDBUSx |
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229 2 BDBUSx CDBUSx |
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230 3 BCBUSx DDBUSx |
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231 |
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232 Within each group the 4 bits are assigned as follows: |
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233 |
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234 Bits Function |
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235 ---------------- |
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236 1:0 drive strength: |
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237 00 = 4 mA |
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238 01 = 8 mA |
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239 10 = 12 mA |
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240 11 = 16 mA |
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241 2 set to 1 for slow slew rate |
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242 3 set to 1 for Schmitt trigger |
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243 |
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244 Other EEPROM quirks on FT2232H: |
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245 |
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246 * Words 10 and 11, used on FT232R (chronologically between FT2232C and FT2232H) |
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247 for CBUS configuration, appear to be reserved and unused on FT2232H. |
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248 |
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249 * Word 12 on FT2232H is same as word 10 on FT2232C/D: EEPROM type code, even |
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250 though it still isn't clear what the chip does with it, if anything. |
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251 |
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252 * The strings area of the EEPROM begins with word 13 or byte offset 0x1A. |