FreeCalypso > hg > freecalypso-docs
annotate DUART28-with-FCDEV3B @ 87:78d4d362c086
FC-handset-spec section 2.4.1: update for PWT melodies and BUZM
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 15 Apr 2022 04:55:26 +0000 |
parents | ac33ec9a07d9 |
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rev | line source |
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DUART28-with-FCDEV3B article written
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1 This article describes how to connect FreeCalypso DUART28 adapter to an FCDEV3B |
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2 target board, both the main connection of dual UART and optional boot control |
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3 connections. |
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4 |
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5 Main connection: dual UART |
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6 ========================== |
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7 |
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8 The main connection of two UARTs is made with a 10-wire ribbon cable. You |
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9 should have received the correct cable from Falconia Partners LLC together with |
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10 your FCDEV3B+DUART28 board kit - it is a rainbow-colored 10-wire ribbon cable |
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DUART28-with-FCDEV3B: the end going to DUART28 can be either blue or grey
Mychaela Falconia <falcon@freecalypso.org>
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11 with two different end terminations: one end is terminated with a blue or grey |
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12 IDC connector, the other end is terminated with a black connector into which |
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13 individual wires are inserted from the top. The blue or grey connector goes to |
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14 the DUART28, the black connector goes to the FCDEV3B. |
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15 |
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DUART28-with-FCDEV3B: the end going to DUART28 can be either blue or grey
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16 The blue or grey connector going to the DUART28 board is keyed such that it can |
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17 be inserted in only one orientation, hence that one is expected to be always |
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18 correct. The black connector goes to the middle of the three headers on |
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19 FCDEV3B (J301), and in this case you are responsible for ensuring the correct |
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20 orientation. If you are using the official DUART28 to FCDEV3B cable from |
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21 Falconia Partners LLC, then the side with brown and red wires needs to be |
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22 facing toward JTAG and power input connectors. |
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23 |
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24 Optional boot control provision |
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25 =============================== |
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26 |
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27 If you wish to connect the optional boot control signals, connect two |
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28 individual jumper wires as follows: |
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29 |
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30 * For PWON control, connect DUART28 CTL1 to the top pin of 2-pin header JP1 on |
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31 FCDEV3B, namely the pin that is closer to the adjacent PWON button. (The |
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32 other pin on JP1 is ground.) |
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33 |
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34 * For RESET control, connect DUART28 CTL2 to JTAG connector J310 pin 2 on |
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35 FCDEV3B, which is the XDS_RESET signal. Naturally one cannot connect both |
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36 DUART28 CTL2 and JTAG at the same time. |
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37 |
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38 * Ground connection between the two boards will normally be provided by the |
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39 main dual UART cable. |
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40 |
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41 If you are going to connect these boot control signals, you MUST reprogram the |
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42 EEPROM on your DUART28 board to the DUART28C configuration and apply the |
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43 necessary DUART28C support patch to your Linux kernel ftdi_sio driver - |
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44 otherwise your hardware setup will be inoperable, with FCDEV3B getting held |
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45 down in reset whenever the second serial port is opened for regular serial |
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46 communication. |