FreeCalypso > hg > freecalypso-docs
diff DUART28-with-FCDEV3B @ 36:db344818b323
DUART28-with-FCDEV3B article written
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 13 Oct 2020 06:42:23 +0000 |
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children | ac33ec9a07d9 |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/DUART28-with-FCDEV3B Tue Oct 13 06:42:23 2020 +0000 @@ -0,0 +1,46 @@ +This article describes how to connect FreeCalypso DUART28 adapter to an FCDEV3B +target board, both the main connection of dual UART and optional boot control +connections. + +Main connection: dual UART +========================== + +The main connection of two UARTs is made with a 10-wire ribbon cable. You +should have received the correct cable from Falconia Partners LLC together with +your FCDEV3B+DUART28 board kit - it is a rainbow-colored 10-wire ribbon cable +with two different end terminations: one end is terminated with a blue IDC +connector, the other end is terminated with a black connector into which +individual wires are inserted from the top. The blue connector goes to the +DUART28, the black connector goes to the FCDEV3B. + +The blue connector going to the DUART28 board is keyed such that it can be +inserted in only one orientation, hence that one is expected to be always +correct. The black connector goes to the middle of the three headers on +FCDEV3B (J301), and in this case you are responsible for ensuring the correct +orientation. If you are using the official DUART28 to FCDEV3B cable from +Falconia Partners LLC, then the side with brown and red wires needs to be +facing toward JTAG and power input connectors. + +Optional boot control provision +=============================== + +If you wish to connect the optional boot control signals, connect two +individual jumper wires as follows: + +* For PWON control, connect DUART28 CTL1 to the top pin of 2-pin header JP1 on + FCDEV3B, namely the pin that is closer to the adjacent PWON button. (The + other pin on JP1 is ground.) + +* For RESET control, connect DUART28 CTL2 to JTAG connector J310 pin 2 on + FCDEV3B, which is the XDS_RESET signal. Naturally one cannot connect both + DUART28 CTL2 and JTAG at the same time. + +* Ground connection between the two boards will normally be provided by the + main dual UART cable. + +If you are going to connect these boot control signals, you MUST reprogram the +EEPROM on your DUART28 board to the DUART28C configuration and apply the +necessary DUART28C support patch to your Linux kernel ftdi_sio driver - +otherwise your hardware setup will be inoperable, with FCDEV3B getting held +down in reset whenever the second serial port is opened for regular serial +communication.