FreeCalypso > hg > freecalypso-docs

comparison DUART28-with-FCDEV3B @ 36:db344818b323

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
DUART28-with-FCDEV3B article written
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 13 Oct 2020 06:42:23 +0000
parents
children ac33ec9a07d9
comparison
equal deleted inserted replaced
35:14b8e532c966 36:db344818b323
1 This article describes how to connect FreeCalypso DUART28 adapter to an FCDEV3B
2 target board, both the main connection of dual UART and optional boot control
3 connections.
4
5 Main connection: dual UART
6 ==========================
7
8 The main connection of two UARTs is made with a 10-wire ribbon cable. You
9 should have received the correct cable from Falconia Partners LLC together with
10 your FCDEV3B+DUART28 board kit - it is a rainbow-colored 10-wire ribbon cable
11 with two different end terminations: one end is terminated with a blue IDC
12 connector, the other end is terminated with a black connector into which
13 individual wires are inserted from the top. The blue connector goes to the
14 DUART28, the black connector goes to the FCDEV3B.
15
16 The blue connector going to the DUART28 board is keyed such that it can be
17 inserted in only one orientation, hence that one is expected to be always
18 correct. The black connector goes to the middle of the three headers on
19 FCDEV3B (J301), and in this case you are responsible for ensuring the correct
20 orientation. If you are using the official DUART28 to FCDEV3B cable from
21 Falconia Partners LLC, then the side with brown and red wires needs to be
22 facing toward JTAG and power input connectors.
23
24 Optional boot control provision
25 ===============================
26
27 If you wish to connect the optional boot control signals, connect two
28 individual jumper wires as follows:
29
30 * For PWON control, connect DUART28 CTL1 to the top pin of 2-pin header JP1 on
31 FCDEV3B, namely the pin that is closer to the adjacent PWON button. (The
32 other pin on JP1 is ground.)
33
34 * For RESET control, connect DUART28 CTL2 to JTAG connector J310 pin 2 on
35 FCDEV3B, which is the XDS_RESET signal. Naturally one cannot connect both
36 DUART28 CTL2 and JTAG at the same time.
37
38 * Ground connection between the two boards will normally be provided by the
39 main dual UART cable.
40
41 If you are going to connect these boot control signals, you MUST reprogram the
42 EEPROM on your DUART28 board to the DUART28C configuration and apply the
43 necessary DUART28C support patch to your Linux kernel ftdi_sio driver -
44 otherwise your hardware setup will be inoperable, with FCDEV3B getting held
45 down in reset whenever the second serial port is opened for regular serial
46 communication.