freecalypso-reveng: bootrom.disasm annotate

annotate bootrom.disasm @ 18:123cb5021b64

boot ROM re: appears to be complete!

author	Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date	Thu, 25 Apr 2013 05:47:59 +0000
parents	d2206cb5f8b4
children	2d9c927cc24b

rev	line source
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 RESET entry and exception vectors:
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 0: ea000524 b 0x1498
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3 4: ea200004 b 0x80001c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 8: ea200004 b 0x800020
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 c: ea200004 b 0x800024
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 10: ea200004 b 0x800028
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 14: ea200004 b 0x80002c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 18: ea200004 b 0x800030
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9 1c: ea200004 b 0x800034
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	11 ; The following routine (starting at 0x20) is used to transfer control
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	12 ; to nCS0 application images that are designed to work with no internal
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	13 ; boot ROM "in the way", i.e., images identified by a 1 in the 0x2000 word.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	14 ; The present routine is copied to the internal RAM and executed there.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	15 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	16 ; The routine itself takes one argument in R0 and uses it to set the
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	17 ; nIBOOT override bits in the FFFF:FB10 register. If R0==1, bits <9:8>
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	18 ; of this register are set to 11, putting nCS0 at address 0. If R0==0,
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	19 ; the bits are set to 01, putting the internal ROM at 0. Otherwise,
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	20 ; the bits are set to 00, restoring the nIBOOT pin configuration.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	21 ; (In actual operation the argument passed to this function is the word
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	22 ; from 0x2000, so it's equal to 1.) Then the routine causes the
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	23 ; watchdog timer to go off, resetting the ARM.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	24
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	25 20: e24dd004 sub sp, sp, #4 ; 0x4
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	26 24: e59f20b8 ldr r2, =0xFFFFFB10 ; via 0xe4
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27 28: e1d2c0b0 ldrh r12, [r2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28 2c: e20c10ff and r1, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29 30: e20ccb3f and r12, r12, #64512 ; 0xfc00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 34: e181c00c orr r12, r1, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31 38: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 3c: e1a0c82c mov r12, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 40: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34 44: 0a000005 beq 0x60
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 48: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36 4c: 1a000006 bne 0x6c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 50: e38ccc01 orr r12, r12, #256 ; 0x100
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 54: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 58: e1a0c82c mov r12, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 5c: ea000002 b 0x6c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 60: e38ccc03 orr r12, r12, #768 ; 0x300
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 64: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 68: e1a0c82c mov r12, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44 6c: e1c2c0b0 strh r12, [r2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45 70: e3a0cfc3 mov r12, #780 ; 0x30c
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	46 74: e59f006c ldr r0, =0x80F5 ; via 0xe8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 78: e10200bc strh r0, [r2, -r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	48 7c: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49 80: e1cdc0b0 strh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50 84: ea000002 b 0x94
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 88: e1ddc0b0 ldrh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 8c: e28cc001 add r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	53 90: e1cdc0b0 strh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	54 94: e1dd10b0 ldrh r1, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	55 98: e3a0c902 mov r12, #32768 ; 0x8000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	56 9c: e24ccead sub r12, r12, #2768 ; 0xad0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57 a0: e151000c cmp r1, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58 a4: bafffff7 blt 0x88
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	59 a8: e3a0cfc3 mov r12, #780 ; 0x30c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	60 ac: e10200bc strh r0, [r2, -r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	61 b0: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	62 b4: e1cdc0b0 strh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	63 b8: ea000002 b 0xc8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	64 bc: e1ddc0b0 ldrh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	65 c0: e28cc001 add r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	66 c4: e1cdc0b0 strh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	67 c8: e1ddc0b0 ldrh r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	68 cc: e3a00902 mov r0, #32768 ; 0x8000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	69 d0: e2400ead sub r0, r0, #2768 ; 0xad0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	70 d4: e15c0000 cmp r12, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	71 d8: bafffff7 blt 0xbc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	72 dc: e28dd004 add sp, sp, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	73 e0: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	74
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	75 ; literal pool for the above routine
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	76 e4: fffffb10
8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	77 e8: 000080f5
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	78 ; end of the code copied to the internal RAM for booting type 1 images
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	79
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	80 ; The routine at 0xec effects the jump to the serially loaded code
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	81 ; upon the final '<b' command.
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	82
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	83 ec: e92d4010 stmdb sp!, {r4, lr}
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	84 f0: e59fcd0c ldr r12, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	85 f4: e59c4014 ldr r4, [r12, #20]
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	86 f8: e59f0d08 ldr r0, =0x1FCC ; via 0xe08
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	87 fc: e5dcc008 ldrb r12, [r12, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	88 100: e790c10c ldr r12, [r0, r12, lsl #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	89 104: e28c0005 add r0, r12, #5 ; 0x5
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	90 ; wait for all UART Tx to go out
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	91 108: e5d0c000 ldrb r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	92 10c: e31c0040 tst r12, #64 ; 0x40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	93 110: 0afffffc beq 0x108
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	94 ; jump!
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	95 114: eb000513 bl 0x1568 ; IND_CALL
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	96 118: eafffffe b 0x118
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	97
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	98 ; This routine handles the '<i' command - it initializes the vars
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	99 ; starting at 800518. It is called with R0=0x800518.
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	100
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	101 11c: e3a0c004 mov r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	102 120: e5c0c000 strb r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	103 124: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	104 128: e1c0c0be strh r12, [r0, #14]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	105 12c: e1c0c1b0 strh r12, [r0, #16]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	106 130: e580c014 str r12, [r0, #20]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	107 134: e5c0c018 strb r12, [r0, #24]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	108 138: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	109
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	110 ; This routine at 0x13c apparently generates the serial response messages
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	111 ; back to the host, using the buffer at 80010C as its scratchpad.
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	112 ; The argument in R0 encodes what type of message to generate:
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	113
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	114 13c: e92d4000 stmdb sp!, {lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	115 140: e1a0c000 mov r12, r0
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	116 144: e59f0cc0 ldr r0, =0x80010C ; via 0xe0c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117 148: e3a0103e mov r1, #62 ; 0x3e
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	118 14c: e5c01000 strb r1, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 150: e35c0009 cmp r12, #9 ; 0x9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	120 154: 88bd8000 ldmhiia sp!, {pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	121 158: e28f1000 add r1, pc, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122 15c: e791f10c ldr pc, [r1, r12, lsl #2]
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	123 ; switch table, absolute addresses
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	124 160: 000002ac
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	125 164: 00000280
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	126 168: 00000264
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	127 16c: 00000248
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	128 170: 00000224
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	129 174: 00000200
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	130 178: 000001dc
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	131 17c: 000001c0
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	132 180: 000001a4
3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	133 184: 00000188
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	134 case 9:
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	135 188: e3a0c042 mov r12, #66 ; 0x42 'B'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	136 18c: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	137 190: e3a01002 mov r1, #2 ; 0x2
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	138 194: e59fcc74 ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	139 198: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	140 19c: eb000458 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	141 1a0: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	142 case 8:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	143 1a4: e3a0c062 mov r12, #98 ; 0x62 'b'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	144 1a8: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	145 1ac: e3a01002 mov r1, #2 ; 0x2
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	146 1b0: e59fcc58 ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	147 1b4: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	148 1b8: eb000451 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	149 1bc: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	150 case 7:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	151 1c0: e3a0c061 mov r12, #97 ; 0x61 'a'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	152 1c4: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	153 1c8: e3a01002 mov r1, #2 ; 0x2
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	154 1cc: e59fcc3c ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	155 1d0: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	156 1d4: eb00044a bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	157 1d8: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	158 case 6:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	159 1dc: e3a0c043 mov r12, #67 ; 0x43 'C'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	160 1e0: e5c0c001 strb r12, [r0, #1]
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	161 1e4: e59fcc18 ldr r12, =0x800518 ; via 0xe04
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	162 1e8: e5dc1010 ldrb r1, [r12, #16] ; byte from 800528
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	163 1ec: e5c01002 strb r1, [r0, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	164 1f0: e5dc2008 ldrb r2, [r12, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	165 1f4: e3a01003 mov r1, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	166 1f8: eb000441 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	167 1fc: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	168 case 5:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	169 200: e3a0c063 mov r12, #99 ; 0x63 'c'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	170 204: e5c0c001 strb r12, [r0, #1]
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	171 208: e59fcbf4 ldr r12, =0x800518 ; via 0xe04
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	172 20c: e5dc1010 ldrb r1, [r12, #16] ; byte from 800528
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	173 210: e5c01002 strb r1, [r0, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	174 214: e5dc2008 ldrb r2, [r12, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	175 218: e3a01003 mov r1, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	176 21c: eb000438 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	177 220: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	178 case 4:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	179 224: e3a0c057 mov r12, #87 ; 0x57 'W'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	180 228: e5c0c001 strb r12, [r0, #1]
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	181 22c: e59fcbd0 ldr r12, =0x800518 ; via 0xe04
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	182 230: e5dc1019 ldrb r1, [r12, #25] ; read 800531
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	183 234: e5c01002 strb r1, [r0, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	184 238: e5dc2008 ldrb r2, [r12, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	185 23c: e3a01003 mov r1, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	186 240: eb00042f bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	187 244: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	188 case 3:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	189 248: e3a0c077 mov r12, #119 ; 0x77 'w'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	190 24c: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	191 250: e3a01002 mov r1, #2 ; 0x2
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	192 254: e59fcbb4 ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	193 258: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	194 25c: eb000428 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	195 260: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	196 case 2:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	197 264: e3a0c050 mov r12, #80 ; 0x50 'P'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	198 268: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	199 26c: e3a01002 mov r1, #2 ; 0x2
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	200 270: e59fcb98 ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	201 274: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	202 278: eb000421 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	203 27c: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	204 case 1:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	205 280: e3a0c070 mov r12, #112 ; 0x70 'p'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	206 284: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	207 288: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	208 28c: e5c0c002 strb r12, [r0, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	209 290: e3a0c004 mov r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	210 294: e5c0c003 strb r12, [r0, #3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	211 298: e3a01004 mov r1, #4 ; 0x4
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	212 29c: e59fcb6c ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	213 2a0: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	214 2a4: eb000416 bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	215 2a8: e8bd8000 ldmia sp!, {pc}
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	216 case 0:
2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	217 2ac: e3a0c069 mov r12, #105 ; 0x69 'i'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	218 2b0: e5c0c001 strb r12, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	219 2b4: e3a01002 mov r1, #2 ; 0x2
15 2e3cecd6716c boot ROM re: unraveling the response message routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 14 diff changeset	220 2b8: e59fcb50 ldr r12, =0x800520 ; via 0xe10
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	221 2bc: e5dc2000 ldrb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	222 2c0: eb00040f bl 0x1304
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	223 2c4: e8bd8000 ldmia sp!, {pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	224
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	225 ; Routine at 0x2c8 - called from 0x1090. It receives and interprets
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	226 ; the 2nd byte that comes after the '<'. It appears that this function
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	227 ; only decodes the several known commands, but doesn't actually execute
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	228 ; them. If a byte was received during the allowed time (set by the 800104
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	229 ; variable), this function returns 1 and sets the *R0 byte to the decoding
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	230 ; result. If no byte was received, this function returns 0; ditto if a
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	231 ; timeout occurred while waiting for additional bytes.
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	232 ;
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	233 ; Arguments:
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	234 ; R0 points to a byte of RAM, an additional output
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	235 ;
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	236 ; *R0 return byte values:
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	237 ; 00 = got nothing (timeout) or an invalid/non-understood command
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	238 ; 01 = got 'i'
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	239 ; 02 = got 'p', 9 additional bytes received, a bunch of vars filled
e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	240 ; 03 = got 'w', the rest of the command read into the buffer at
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	241 ; 80010C, the flag at 800530 set
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	242 ; 04 = got 'c', 1 additional byte received, extended to a half-word
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	243 ; and written to 800526
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	244 ; 05 = got 'a'
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	245 ; 06 = got 'b', 4 bytes written to 80052C
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	246
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	247 2c8: e92d4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	248 2cc: e24dd004 sub sp, sp, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	249 2d0: e1a0b000 mov r11, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	250 2d4: e3a05000 mov r5, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	251 2d8: e5cb5000 strb r5, [r11]
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	252 2dc: e59f7b30 ldr r7, =0x800104 ; via 0xe14
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	253 2e0: e59f4b1c ldr r4, =0x800518 ; via 0xe04
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	254 2e4: e5d40008 ldrb r0, [r4, #8] ; read 800520
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	255 2e8: e5971000 ldr r1, [r7] ; read 800104
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	256 2ec: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	257 2f0: eb00044c bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	258 2f4: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	259 2f8: 0a0000fc beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	260 2fc: e5ddc002 ldrb r12, [sp, #2]
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	261 300: e25cc061 subs r12, r12, #97 ; 0x61 'a'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	262 304: 0a000104 beq 0x71c
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	263 308: e25cc001 subs r12, r12, #1 ; 0x1 'b'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	264 30c: 0a0000ee beq 0x6cc
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	265 310: e25cc001 subs r12, r12, #1 ; 0x1 'c'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	266 314: 0a0000e1 beq 0x6a0
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	267 318: e25cc006 subs r12, r12, #6 ; 0x6 'i'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	268 31c: 0a0000dc beq 0x694
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	269 320: e25cc007 subs r12, r12, #7 ; 0x7 'p'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	270 324: 0a0000b8 beq 0x60c
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	271 328: e25cc007 subs r12, r12, #7 ; 0x7 'w'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	272 32c: 1a0000fc bne 0x724
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	273 ; got 'w'
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	274 ; R4=0x800518, byte at 800530 used for something, init to 0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	275 330: e5c45018 strb r5, [r4, #24]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	276 334: e3a0a000 mov r10, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	277 338: e3a06000 mov r6, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	278 33c: ea000015 b 0x398
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	279 ; more blocks
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	280 340: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	281 344: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	282 348: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	283 34c: eb000435 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	284 350: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	285 354: 0a0000e5 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	286 358: e5ddc002 ldrb r12, [sp, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	287 35c: e35c003c cmp r12, #60 ; 0x3c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	288 360: 0a000001 beq 0x36c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	289 364: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	290 368: e5c4c018 strb r12, [r4, #24]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	291 36c: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	292 370: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	293 374: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	294 378: eb00042a bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	295 37c: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	296 380: 0a0000da beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	297 384: e5ddc002 ldrb r12, [sp, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	298 388: e35c0077 cmp r12, #119 ; 0x77
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	299 38c: 0a000001 beq 0x398
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	300 390: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	301 394: e5c4c018 strb r12, [r4, #24]
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	302 ; the entry to the 'w' handling block branches here
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	303 398: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	304 39c: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	305 3a0: e1a0200d mov r2, sp
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	306 3a4: eb00041f bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	307 3a8: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	308 3ac: 0a0000cf beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	309 3b0: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	310 3b4: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	311 3b8: e28d2001 add r2, sp, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	312 3bc: eb000419 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	313 3c0: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	314 3c4: 0a0000c9 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	315 3c8: e5dd0000 ldrb r0, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	316 3cc: e5ddc001 ldrb r12, [sp, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	317 3d0: e150000c cmp r0, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	318 3d4: 1a000000 bne 0x3dc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	319 3d8: e3a0a001 mov r10, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	320 3dc: e5dd0000 ldrb r0, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	321 3e0: e5ddc001 ldrb r12, [sp, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	322 3e4: e150000c cmp r0, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	323 3e8: ca00007c bgt 0x5e0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	324 3ec: e5ddc001 ldrb r12, [sp, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	325 3f0: e35c0000 cmp r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	326 3f4: 0a000079 beq 0x5e0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	327 3f8: e5ddc000 ldrb r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	328 3fc: e35c0000 cmp r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	329 400: 0a000076 beq 0x5e0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	330 404: e3a08002 mov r8, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	331 408: e3a05000 mov r5, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	332 40c: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	333 410: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	334 414: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	335 418: eb000402 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	336 41c: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	337 420: 0a0000b2 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	338 424: e5ddc002 ldrb r12, [sp, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	339 428: e18cc405 orr r12, r12, r5, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	340 42c: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	341 430: e1a0582c mov r5, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	342 434: e2588001 subs r8, r8, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	343 438: 1afffff3 bne 0x40c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	344 43c: e3a09004 mov r9, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	345 440: e3a08000 mov r8, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	346 444: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	347 448: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	348 44c: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	349 450: eb0003f4 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	350 454: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	351 458: 0a0000a4 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	352 45c: e5ddc002 ldrb r12, [sp, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	353 460: e18c8408 orr r8, r12, r8, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	354 464: e2599001 subs r9, r9, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	355 468: 1afffff5 bne 0x444
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	356 46c: e59fc9a4 ldr r12, =0x800750 ; via 0xe18
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	357 470: e158000c cmp r8, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	358 474: 3a00004e bcc 0x5b4
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	359 478: e59f099c ldr r0, =0x7F8AF ; via 0xe1c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	360 47c: e080c00c add r12, r0, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	361 480: e158000c cmp r8, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	362 484: 8a00004a bhi 0x5b4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	363 488: e085c006 add r12, r5, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	364 48c: e35c0ffe cmp r12, #1016 ; 0x3f8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	365 490: aa000037 bge 0x574
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	366 494: e59fc970 ldr r12, =0x80010C ; via 0xe0c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	367 498: e5dd0000 ldrb r0, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	368 49c: e7c6000c strb r0, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	369 4a0: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	370 4a4: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	371 4a8: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	372 4ac: e5dd0001 ldrb r0, [sp, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	373 4b0: e7c6000c strb r0, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	374 4b4: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	375 4b8: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	376 4bc: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	377 4c0: e1a00425 mov r0, r5, lsr #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	378 4c4: e7c6000c strb r0, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	379 4c8: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	380 4cc: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	381 4d0: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	382 4d4: e7c6500c strb r5, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	383 4d8: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	384 4dc: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	385 4e0: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	386 4e4: e1a00c28 mov r0, r8, lsr #24
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	387 4e8: e7c6000c strb r0, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	388 4ec: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	389 4f0: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	390 4f4: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	391 4f8: e1a00828 mov r0, r8, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	392 4fc: e7c6000c strb r0, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	393 500: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	394 504: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	395 508: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	396 50c: e1a00428 mov r0, r8, lsr #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	397 510: e7c6000c strb r0, [r6, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	398 514: e2860001 add r0, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	399 518: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	400 51c: e1a06820 mov r6, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	401 520: e086900c add r9, r6, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	402 524: e5c98000 strb r8, [r9]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	403 528: e286c001 add r12, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	404 52c: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	405 530: e1a0682c mov r6, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	406 534: e3550000 cmp r5, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	407 538: 0a000018 beq 0x5a0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	408 53c: e085c006 add r12, r5, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	409 540: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	410 544: e1a0682c mov r6, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	411 548: e2899001 add r9, r9, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	412 54c: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	413 550: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	414 554: e1a02009 mov r2, r9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	415 558: eb0003b2 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	416 55c: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	417 560: 0a000062 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	418 564: e2899001 add r9, r9, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	419 568: e2555001 subs r5, r5, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	420 56c: 1afffff6 bne 0x54c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	421 570: ea00000a b 0x5a0
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	422 ; length exceeded: read and discard
e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	423 ; the increment of R5 looks like a bug!
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	424 574: e285c001 add r12, r5, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	425 578: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	426 57c: e1a0582c mov r5, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	427 580: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	428 584: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	429 588: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	430 58c: eb0003a5 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	431 590: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	432 594: 0a000055 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	433 598: e2555001 subs r5, r5, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	434 59c: 1afffff7 bne 0x580
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	435 5a0: e35a0000 cmp r10, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	436 5a4: 0affff65 beq 0x340
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	437 5a8: e3a0c003 mov r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	438 5ac: e5cbc000 strb r12, [r11]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	439 5b0: ea00005b b 0x724
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	440 ; error path (<w load address outside of the permissible IRAM range)
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	441 5b4: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	442 5b8: e5c4c018 strb r12, [r4, #24]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	443 5bc: e3a0c003 mov r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	444 5c0: e5cbc000 strb r12, [r11]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	445 5c4: e5d40008 ldrb r0, [r4, #8]
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	446 5c8: e59f1850 ldr r1, =0xFFFFF ; via 0xe20
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	447 5cc: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	448 5d0: eb000394 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	449 5d4: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	450 5d8: 0afffff9 beq 0x5c4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	451 5dc: ea000050 b 0x724
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	452 ; another error path (bad block number voodoo)
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	453 5e0: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	454 5e4: e5c4c018 strb r12, [r4, #24]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	455 5e8: e3a0c003 mov r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	456 5ec: e5cbc000 strb r12, [r11]
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	457 ; flush serial input (wait for long silence), then return
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	458 5f0: e5d40008 ldrb r0, [r4, #8]
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	459 5f4: e59f1824 ldr r1, =0xFFFFF ; via 0xe20
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	460 5f8: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	461 5fc: eb000389 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	462 600: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	463 604: 0afffff9 beq 0x5f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	464 608: ea000045 b 0x724
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	465 ; got 'p'
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	466 ; R4=0x800518
e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	467 60c: e59f67f8 ldr r6, =0x80010C ; via 0xe0c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	468 610: e3a08009 mov r8, #9 ; 0x9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	469 614: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	470 618: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	471 61c: e1a02006 mov r2, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	472 620: eb000380 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	473 624: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	474 628: 0a000030 beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	475 62c: e2866001 add r6, r6, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	476 630: e2588001 subs r8, r8, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	477 634: 1afffff6 bne 0x614
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	478 638: e59fc7cc ldr r12, =0x80010C ; via 0xe0c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	479 63c: e5dc0000 ldrb r0, [r12]
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	480 640: e5c40000 strb r0, [r4] ; into 800518
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	481 644: e5dc0001 ldrb r0, [r12, #1]
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	482 648: e5c40009 strb r0, [r4, #9] ; into 800521
e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	483 64c: e1c450ba strh r5, [r4, #10] ; 16-bit 0 into 800522
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	484 650: e5dc1003 ldrb r1, [r12, #3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	485 654: e5dc0002 ldrb r0, [r12, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	486 658: e1810400 orr r0, r1, r0, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	487 65c: e1c400ba strh r0, [r4, #10]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	488 660: e5dc0004 ldrb r0, [r12, #4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	489 664: e5c4000d strb r0, [r4, #13]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	490 668: e5dc0006 ldrb r0, [r12, #6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	491 66c: e5dc1005 ldrb r1, [r12, #5]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	492 670: e1801401 orr r1, r0, r1, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	493 674: e5dc0007 ldrb r0, [r12, #7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	494 678: e1800401 orr r0, r0, r1, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	495 67c: e5dcc008 ldrb r12, [r12, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	496 680: e18cc400 orr r12, r12, r0, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	497 684: e584c004 str r12, [r4, #4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	498 688: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	499 68c: e5cbc000 strb r12, [r11]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	500 690: ea000023 b 0x724
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	501 ; got 'i'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	502 694: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	503 698: e5cbc000 strb r12, [r11]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	504 69c: ea000020 b 0x724
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	505 ; got 'c'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	506 6a0: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	507 6a4: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	508 6a8: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	509 6ac: eb00035d bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	510 6b0: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	511 6b4: 0a00000d beq 0x6f0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	512 6b8: e5ddc002 ldrb r12, [sp, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	513 6bc: e1c4c0be strh r12, [r4, #14]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	514 6c0: e3a0c004 mov r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	515 6c4: e5cbc000 strb r12, [r11]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	516 6c8: ea000015 b 0x724
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	517 ; got 'b'
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	518 ; R4=0x800518
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	519 6cc: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	520 6d0: e584c014 str r12, [r4, #20]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	521 6d4: e3a05004 mov r5, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	522 6d8: e5d40008 ldrb r0, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	523 6dc: e5971000 ldr r1, [r7]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	524 6e0: e28d2002 add r2, sp, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	525 6e4: eb00034f bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	526 6e8: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	527 6ec: 1a000001 bne 0x6f8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	528 6f0: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	529 6f4: ea00000b b 0x728
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	530 6f8: e5dd0002 ldrb r0, [sp, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	531 6fc: e594c014 ldr r12, [r4, #20]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	532 700: e180c40c orr r12, r0, r12, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	533 704: e584c014 str r12, [r4, #20]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	534 708: e2555001 subs r5, r5, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	535 70c: 1afffff1 bne 0x6d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	536 710: e3a0c006 mov r12, #6 ; 0x6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	537 714: e5cbc000 strb r12, [r11]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	538 718: ea000001 b 0x724
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	539 ; got 'a'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	540 71c: e3a0c005 mov r12, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	541 720: e5cbc000 strb r12, [r11]
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	542 ; common return for 'got something', including invalid (non-understood) commands
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	543 724: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	544 728: e28dd004 add sp, sp, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	545 72c: e8bd8ff0 ldmia sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	546
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	547 ; The routine at 0x730 is called from the 0x8b4 routine and handles
d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	548 ; '<w' commands.
d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	549
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	550 730: e92d43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	551 734: e59f46c8 ldr r4, =0x800518 ; via 0xe04
d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	552 738: e5d4c018 ldrb r12, [r4, #24] ; 800530
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	553 73c: e35c0001 cmp r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	554 740: 0a00004a beq 0x870
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	555 744: e59f56c0 ldr r5, =0x80010C ; via 0xe0c
d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	556 748: e59f66c8 ldr r6, =0x800750 ; via 0xe18
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	557 74c: e3a07000 mov r7, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	558 750: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	559 754: e080c005 add r12, r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	560 758: e28cc001 add r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	561 75c: e7d02005 ldrb r2, [r0, r5]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	562 760: e5dc1000 ldrb r1, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	563 764: e1520001 cmp r2, r1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	564 768: 1a000000 bne 0x770
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	565 76c: e3a07001 mov r7, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	566 770: e5dc2002 ldrb r2, [r12, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	567 774: e5dc1001 ldrb r1, [r12, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	568 778: e0821401 add r1, r2, r1, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	569 77c: e1a01801 mov r1, r1, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	570 780: e1a01821 mov r1, r1, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	571 784: e5dc3004 ldrb r3, [r12, #4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	572 788: e5dc2003 ldrb r2, [r12, #3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	573 78c: e0832402 add r2, r3, r2, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	574 790: e5dc3005 ldrb r3, [r12, #5]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	575 794: e0832402 add r2, r3, r2, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	576 798: e5dcc006 ldrb r12, [r12, #6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	577 79c: e08c2402 add r2, r12, r2, lsl #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	578 7a0: e202c0ff and r12, r2, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	579 7a4: e081300c add r3, r1, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	580 7a8: e1a0c422 mov r12, r2, lsr #8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	581 7ac: e20cc0ff and r12, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	582 7b0: e08c3003 add r3, r12, r3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	583 7b4: e1a0c822 mov r12, r2, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	584 7b8: e20cc0ff and r12, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	585 7bc: e08cc003 add r12, r12, r3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	586 7c0: e08ccc22 add r12, r12, r2, lsr #24
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	587 7c4: e28cc005 add r12, r12, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	588 7c8: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	589 7cc: e1a0882c mov r8, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	590 7d0: e3a03000 mov r3, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	591 7d4: e1520006 cmp r2, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	592 7d8: 3a000003 bcc 0x7ec
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	593 7dc: e59fc638 ldr r12, =0x7F8AF ; via 0xe1c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	594 7e0: e08cc006 add r12, r12, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	595 7e4: e152000c cmp r2, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	596 7e8: 9a000001 bls 0x7f4
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	597 ; error: bad load address
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	598 7ec: e383c001 orr r12, r3, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	599 7f0: e20c30ff and r3, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	600 7f4: e3530000 cmp r3, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	601 7f8: 1a00001d bne 0x874
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	602 ; address OK
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	603 7fc: e3a09000 mov r9, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	604 800: e3510000 cmp r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	605 804: 0a00000b beq 0x838
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	606 808: e089c000 add r12, r9, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	607 80c: e085c00c add r12, r5, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	608 810: e5dcc008 ldrb r12, [r12, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	609 814: e4c2c001 strb r12, [r2], #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	610 818: e08cc008 add r12, r12, r8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	611 81c: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	612 820: e1a0882c mov r8, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	613 824: e289c001 add r12, r9, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	614 828: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	615 82c: e1a0982c mov r9, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	616 830: e2511001 subs r1, r1, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	617 834: 1afffff3 bne 0x808
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	618 838: e3a0c0ff mov r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	619 83c: e1ccc008 bic r12, r12, r8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	620 840: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	621 844: e1a0882c mov r8, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	622 848: e1d4c1b0 ldrh r12, [r4, #16]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	623 84c: e088c00c add r12, r8, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	624 850: e1c4c1b0 strh r12, [r4, #16]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	625 854: e080c009 add r12, r0, r9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	626 858: e28cc008 add r12, r12, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	627 85c: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	628 860: e1a0082c mov r0, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	629 864: e3570000 cmp r7, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	630 868: 0affffb9 beq 0x754
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	631 86c: ea000000 b 0x874
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	632 ; 800530 flag was set to 01
d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	633 ; return error 02
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	634 870: e3a03002 mov r3, #2 ; 0x2
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	635 ; common exit path: good or bad?
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	636 874: e5c43019 strb r3, [r4, #25]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	637 878: e3530000 cmp r3, #0 ; 0x0
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	638 87c: 0a000008 beq 0x8a4 ; good return
d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	639 ; nope, bad: send >W
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	640 880: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	641 884: ebfffe2c bl 0x13c
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	642 ; reset baud rate to 19200
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	643 888: e5d41008 ldrb r1, [r4, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	644 88c: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	645 890: eb0002d0 bl 0x13d8
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	646 ; var init
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	647 894: e1a00004 mov r0, r4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	648 898: ebfffe1f bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	649 89c: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	650 8a0: e8bd83f0 ldmia sp!, {r4, r5, r6, r7, r8, r9, pc}
17 d2206cb5f8b4 boot ROM re: got through the <w handler Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 16 diff changeset	651 ; good return: send >w to host
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	652 8a4: e3a00003 mov r0, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	653 8a8: ebfffe23 bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	654 8ac: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	655 8b0: e8bd83f0 ldmia sp!, {r4, r5, r6, r7, r8, r9, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	656
13 e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	657 ; The routine at 0x8b4 handles the command received by the 0x2c8 routine.
e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	658 ; The argument in R0 is the code produced by the latter.
e0ce45f043c0 boot ROM re: continuing plowing through the serial protocol code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 12 diff changeset	659
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	660 8b4: e92d4070 stmdb sp!, {r4, r5, r6, lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	661 8b8: e24dd008 sub sp, sp, #8 ; 0x8
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	662 8bc: e59f4560 ldr r4, =0x800108 ; via 0xe24
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	663 8c0: e5d4c000 ldrb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	664 8c4: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	665 8c8: 0a000102 beq 0xcd8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	666 8cc: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	667 8d0: 0a00008a beq 0xb00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	668 8d4: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	669 8d8: 0a000047 beq 0x9fc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	670 8dc: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	671 8e0: 1a000145 bne 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	672 ; state 04
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	673 ; like in state 03, '<p' is ignored in this state
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	674 8e4: e250c001 subs r12, r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	675 8e8: 0a00003c beq 0x9e0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	676 8ec: e25cc002 subs r12, r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	677 8f0: 0a00002f beq 0x9b4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	678 8f4: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	679 8f8: 0a000022 beq 0x988
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	680 8fc: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	681 900: 0a000017 beq 0x964
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	682 904: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	683 908: 1a00013b bne 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	684 ; '<b' in state 04
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	685 90c: e59f54f0 ldr r5, =0x800518 ; via 0xe04
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	686 910: e59f0500 ldr r0, =0x800750 ; via 0xe18
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	687 914: e595c014 ldr r12, [r5, #20]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	688 918: e15c0000 cmp r12, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	689 91c: 3a000006 bcc 0x93c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	690 920: e59f14f4 ldr r1, =0x7F8AF ; via 0xe1c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	691 924: e0810000 add r0, r1, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	692 928: e15c0000 cmp r12, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	693 92c: 8a000002 bhi 0x93c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	694 ; all clear - respond with '<b'
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	695 930: e3a00008 mov r0, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	696 934: ebfffe00 bl 0x13c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	697 ; and leap!
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	698 938: ebfffdeb bl 0xec
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	699 ; address bad
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	700 ; respond with >B
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	701 93c: e3a00009 mov r0, #9 ; 0x9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	702 940: ebfffdfd bl 0x13c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	703 ; baud rate reset to 19200
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	704 944: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	705 948: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	706 94c: eb0002a1 bl 0x13d8
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	707 ; var reset
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	708 950: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	709 954: ebfffdf0 bl 0x11c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	710 ; state back to 01
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	711 958: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	712 95c: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	713 960: ea000125 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	714 ; '<a' in state 04
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	715 ; same handling as in states 02 and 03:
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	716 ; var reset, baud rate back to 19200, state back to 01, no response msg
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	717 964: e59f5498 ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	718 968: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	719 96c: ebfffdea bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	720 970: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	721 974: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	722 978: eb000296 bl 0x13d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	723 97c: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	724 980: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	725 984: ea00011c b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	726 ; '<c' in state 04
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	727 ; >C error, reset everything like other errors
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	728 988: e3a00006 mov r0, #6 ; 0x6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	729 98c: ebfffdea bl 0x13c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	730 990: e59f546c ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	731 994: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	732 998: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	733 99c: eb00028d bl 0x13d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	734 9a0: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	735 9a4: ebfffddc bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	736 9a8: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	737 9ac: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	738 9b0: ea000111 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	739 ; '<w' in state 04
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	740 ; respond with >W error
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	741 9b4: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	742 9b8: ebfffddf bl 0x13c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	743 ; baud rate reset to 19200
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	744 9bc: e59f5440 ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	745 9c0: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	746 9c4: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	747 9c8: eb000282 bl 0x13d8
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	748 ; var init
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	749 9cc: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	750 9d0: ebfffdd1 bl 0x11c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	751 ; state back to 01
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	752 9d4: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	753 9d8: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	754 9dc: ea000106 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	755 ; '<i' in state 04
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	756 ; same handling as in states 02 and 03: vars reset, but UART left alone
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	757 ; and the state remains 04.
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	758 9e0: e59f041c ldr r0, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	759 9e4: ebfffdcc bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	760 9e8: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	761 9ec: ebfffdd2 bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	762 9f0: e3a0c004 mov r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	763 9f4: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	764 9f8: ea0000ff b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	765 ; state 03
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	766 ; '<p' is ignored in this state
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	767 9fc: e250c001 subs r12, r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	768 a00: 0a000037 beq 0xae4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	769 a04: e25cc002 subs r12, r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	770 a08: 0a000031 beq 0xad4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	771 a0c: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	772 a10: 0a000017 beq 0xa74
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	773 a14: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	774 a18: 0a00000c beq 0xa50
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	775 a1c: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	776 a20: 1a0000f5 bne 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	777 ; got '<b' in state 03
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	778 ; send >B, same error handling as in state 02
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	779 a24: e3a00009 mov r0, #9 ; 0x9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	780 a28: ebfffdc3 bl 0x13c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	781 a2c: e59f53d0 ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	782 a30: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	783 a34: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	784 a38: eb000266 bl 0x13d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	785 a3c: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	786 a40: ebfffdb5 bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	787 a44: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	788 a48: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	789 a4c: ea0000ea b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	790 ; got '<a' in state 03
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	791 ; var reset, baud rate back to 19200, state back to 01, no response msg
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	792 a50: e59f53ac ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	793 a54: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	794 a58: ebfffdaf bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	795 a5c: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	796 a60: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	797 a64: eb00025b bl 0x13d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	798 a68: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	799 a6c: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	800 a70: ea0000e1 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	801 ; got '<c' in state 03
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	802 a74: e59fc388 ldr r12, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	803 a78: e3a010ff mov r1, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	804 a7c: e1dc01b0 ldrh r0, [r12, #16]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	805 a80: e1c10000 bic r0, r1, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	806 a84: e1dcc0be ldrh r12, [r12, #14]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	807 a88: e20cc0ff and r12, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	808 a8c: e150000c cmp r0, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	809 a90: 1a000004 bne 0xaa8
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	810 ; checksum match - respond with >c and advance to state 04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	811 a94: e3a00005 mov r0, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	812 a98: ebfffda7 bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	813 a9c: e3a0c004 mov r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	814 aa0: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	815 aa4: ea0000d4 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	816 ; checksum mismatch: respond with >C, reset vars, reset the baud rate to 19200,
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	817 ; reset the state to 01
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	818 aa8: e3a00006 mov r0, #6 ; 0x6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	819 aac: ebfffda2 bl 0x13c
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	820 ab0: e59f534c ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	821 ab4: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	822 ab8: ebfffd97 bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	823 abc: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	824 ac0: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	825 ac4: eb000243 bl 0x13d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	826 ac8: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	827 acc: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	828 ad0: ea0000c9 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	829 ; got '<w' in state 03
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	830 ad4: ebffff15 bl 0x730
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	831 ad8: e3500000 cmp r0, #0 ; 0x0
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	832 ; same outcome as in state 02
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	833 adc: 0a000038 beq 0xbc4 ; good
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	834 ae0: ea00003a b 0xbd0 ; bad
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	835 ; got '<i' in state 03
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	836 ; same as in state 02: the init routine is called (most notably the chksum
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	837 ; accum is reset), the baud rate var is reset to 04, but the UART is not
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	838 ; reprogrammed, and the state remains 03.
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	839 ae4: e59f0318 ldr r0, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	840 ae8: ebfffd8b bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	841 aec: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	842 af0: ebfffd91 bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	843 af4: e3a0c003 mov r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	844 af8: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	845 afc: ea0000be b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	846 ; state 02
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	847 b00: e250c001 subs r12, r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	848 b04: 0a00006c beq 0xcbc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	849 b08: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	850 b0c: 0a000032 beq 0xbdc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	851 b10: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	852 b14: 0a000024 beq 0xbac
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	853 b18: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	854 b1c: 0a000017 beq 0xb80
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	855 b20: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	856 b24: 0a00000c beq 0xb5c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	857 b28: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	858 b2c: 1a0000b2 bne 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	859 ; '<b' in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	860 ; respond with >B error
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	861 b30: e3a00009 mov r0, #9 ; 0x9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	862 b34: ebfffd80 bl 0x13c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	863 b38: e59f52c4 ldr r5, =0x800518 ; via 0xe04
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	864 ; reset the baud rate to 19200
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	865 b3c: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	866 b40: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	867 b44: eb000223 bl 0x13d8
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	868 ; var init
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	869 b48: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	870 b4c: ebfffd72 bl 0x11c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	871 ; state back to 01
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	872 b50: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	873 b54: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	874 b58: ea0000a7 b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	875 ; '<a' in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	876 ; reset back to state 01 at 19200 baud with var init
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	877 ; no response msg
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	878 b5c: e59f52a0 ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	879 b60: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	880 b64: ebfffd6c bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	881 b68: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	882 b6c: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	883 b70: eb000218 bl 0x13d8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	884 b74: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	885 b78: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	886 b7c: ea00009e b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	887 ; '<c' in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	888 ; respond with >C error
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	889 b80: e3a00006 mov r0, #6 ; 0x6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	890 b84: ebfffd6c bl 0x13c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	891 b88: e59f5274 ldr r5, =0x800518 ; via 0xe04
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	892 ; reset baud rate to 19200
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	893 b8c: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	894 b90: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	895 b94: eb00020f bl 0x13d8
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	896 ; var init
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	897 b98: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	898 b9c: ebfffd5e bl 0x11c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	899 ; state back to 01
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	900 ba0: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	901 ba4: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	902 ba8: ea000093 b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	903 ; '<w' in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	904 bac: e59f0274 ldr r0, =0x800528 ; via 0xe28
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	905 bb0: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	906 bb4: e1c0c0b0 strh r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	907 bb8: ebfffedc bl 0x730
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	908 bbc: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	909 bc0: 1a000002 bne 0xbd0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	910 bc4: e3a0c003 mov r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	911 bc8: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	912 bcc: ea00008a b 0xdfc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	913 bd0: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	914 bd4: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	915 bd8: ea000087 b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	916 ; '<p' in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	917 bdc: e59f6220 ldr r6, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	918 be0: e5d6c000 ldrb r12, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	919 be4: e35c0000 cmp r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	920 be8: 0a000011 beq 0xc34
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	921 bec: e35c0001 cmp r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	922 bf0: 0a00000f beq 0xc34
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	923 bf4: e35c0002 cmp r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	924 bf8: 0a00000d beq 0xc34
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	925 bfc: e35c0003 cmp r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	926 c00: 0a00000b beq 0xc34
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	927 c04: e35c0004 cmp r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	928 c08: 0a000009 beq 0xc34
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	929 ; bad baud rate
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	930 ; respond with >P
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	931 c0c: e3a00002 mov r0, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	932 c10: ebfffd49 bl 0x13c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	933 ; reset the baud rate to 19200
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	934 c14: e5d61008 ldrb r1, [r6, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	935 c18: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	936 c1c: eb0001ed bl 0x13d8
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	937 ; equiv of <i
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	938 c20: e1a00006 mov r0, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	939 c24: ebfffd3c bl 0x11c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	940 ; state machine back to 01
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	941 c28: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	942 c2c: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	943 c30: ea000071 b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	944 ; '<p' in state 02, baud rate code is good
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	945 ; same handling as on the initial '<p' that got us here
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	946 c34: e5d6500d ldrb r5, [r6, #13]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	947 c38: e1d6c0ba ldrh r12, [r6, #10]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	948 c3c: e20c001f and r0, r12, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	949 c40: e20000ff and r0, r0, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	950 c44: e1a012ac mov r1, r12, lsr #5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	951 c48: e201101f and r1, r1, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	952 c4c: e20110ff and r1, r1, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	953 c50: e1a0c52c mov r12, r12, lsr #10
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	954 c54: e20cc01f and r12, r12, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	955 c58: e20c20ff and r2, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	956 c5c: e205c00f and r12, r5, #15 ; 0xf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	957 c60: e20c30ff and r3, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	958 c64: e1a0c225 mov r12, r5, lsr #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	959 c68: e5cdc000 strb r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	960 c6c: eb00006e bl 0xe2c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	961 c70: e5d6c009 ldrb r12, [r6, #9]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	962 c74: e5d6000c ldrb r0, [r6, #12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	963 c78: e20c1003 and r1, r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	964 c7c: e20110ff and r1, r1, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	965 c80: e1a0c12c mov r12, r12, lsr #2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	966 c84: e20cc01f and r12, r12, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	967 c88: e20c20ff and r2, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	968 c8c: eb000098 bl 0xef4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	969 c90: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	970 c94: ebfffd28 bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	971 c98: e5d60000 ldrb r0, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	972 c9c: e5d61008 ldrb r1, [r6, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	973 ca0: eb0001cc bl 0x13d8
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	974 ca4: e59fc168 ldr r12, =0x800104 ; via 0xe14
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	975 ca8: e5960004 ldr r0, [r6, #4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	976 cac: e58c0000 str r0, [r12]
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	977 ; new state is 02 - no change
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	978 cb0: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	979 cb4: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	980 cb8: ea00004f b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	981 ; '<i' in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	982 ; same action as initially, but stay in state 02
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	983 ; the 800518 variable is reset to 04 by 0x11c, but the UART is not reprogrammed
383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	984 cbc: e59f0140 ldr r0, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	985 cc0: ebfffd15 bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	986 cc4: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	987 cc8: ebfffd1b bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	988 ccc: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	989 cd0: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	990 cd4: ea000048 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	991 ; state 01 dispatch
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	992 cd8: e250c001 subs r12, r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	993 cdc: 0a000040 beq 0xde4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	994 ce0: e25cc001 subs r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	995 ce4: 0a00000b beq 0xd18
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	996 ce8: e24cc001 sub r12, r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	997 cec: e35c0003 cmp r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	998 cf0: 8a000041 bhi 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	999 ; everything other than '<i' and '<p'
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1000 cf4: e59f5108 ldr r5, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1001 cf8: e1a00005 mov r0, r5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1002 cfc: ebfffd06 bl 0x11c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1003 ; set UART to 19200 baud
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1004 d00: e5d51008 ldrb r1, [r5, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1005 d04: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1006 d08: eb0001b2 bl 0x13d8
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1007 ; reset state variable to 1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1008 d0c: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1009 d10: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1010 d14: ea000038 b 0xdfc
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	1011 ; '<p' handler (state 01)
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1012 d18: e59f60e4 ldr r6, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1013 d1c: e5d6c000 ldrb r12, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1014 d20: e35c0000 cmp r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1015 d24: 0a00000c beq 0xd5c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1016 d28: e35c0001 cmp r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1017 d2c: 0a00000a beq 0xd5c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1018 d30: e35c0002 cmp r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1019 d34: 0a000008 beq 0xd5c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1020 d38: e35c0003 cmp r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1021 d3c: 0a000006 beq 0xd5c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1022 d40: e35c0004 cmp r12, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1023 d44: 0a000004 beq 0xd5c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1024 ; bad baud rate requested - respond with >P and throw FSM back to state 1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1025 d48: e3a00002 mov r0, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1026 d4c: ebfffcfa bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1027 d50: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1028 d54: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1029 d58: ea000027 b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1030 ; <p baud rate code is good
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1031 d5c: e5d6500d ldrb r5, [r6, #13]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1032 d60: e1d6c0ba ldrh r12, [r6, #10]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1033 d64: e20c001f and r0, r12, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1034 d68: e20000ff and r0, r0, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1035 d6c: e1a012ac mov r1, r12, lsr #5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1036 d70: e201101f and r1, r1, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1037 d74: e20110ff and r1, r1, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1038 d78: e1a0c52c mov r12, r12, lsr #10
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1039 d7c: e20cc01f and r12, r12, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1040 d80: e20c20ff and r2, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1041 d84: e205c00f and r12, r5, #15 ; 0xf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1042 d88: e20c30ff and r3, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1043 d8c: e1a0c225 mov r12, r5, lsr #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1044 d90: e5cdc000 strb r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1045 d94: eb000024 bl 0xe2c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1046 d98: e5d6c009 ldrb r12, [r6, #9]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1047 d9c: e5d6000c ldrb r0, [r6, #12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1048 da0: e20c1003 and r1, r12, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1049 da4: e20110ff and r1, r1, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1050 da8: e1a0c12c mov r12, r12, lsr #2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1051 dac: e20cc01f and r12, r12, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1052 db0: e20c20ff and r2, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1053 db4: eb00004e bl 0xef4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1054 db8: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1055 dbc: ebfffcde bl 0x13c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1056 dc0: e5d60000 ldrb r0, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1057 dc4: e5d61008 ldrb r1, [r6, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1058 dc8: eb000182 bl 0x13d8
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1059 dcc: e59f0040 ldr r0, =0x800104 ; via 0xe14
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1060 dd0: e596c004 ldr r12, [r6, #4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1061 dd4: e580c000 str r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1062 dd8: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1063 ddc: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1064 de0: ea000005 b 0xdfc
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1065 ; response to '<i' is handled here (state 01)
14 3443b1b08af4 boot ROM re: starting to unravel the serial command handling Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 13 diff changeset	1066 de4: e59f0018 ldr r0, =0x800518 ; via 0xe04
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1067 de8: ebfffccb bl 0x11c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1068 dec: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1069 df0: ebfffcd1 bl 0x13c
16 383a4ef12551 boot ROM re: getting the download state machine, <p parsed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 15 diff changeset	1070 ; state machine back to the initial state
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1071 df4: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1072 df8: e5c4c000 strb r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1073 dfc: e28dd008 add sp, sp, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1074 e00: e8bd8070 ldmia sp!, {r4, r5, r6, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1075
12 25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1076 ; literal pool
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1077 e04: 00800518
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1078 e08: 00001fcc
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1079 e0c: 0080010c
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1080 e10: 00800520
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1081 e14: 00800104
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1082 e18: 00800750
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1083 e1c: 0007f8af
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1084 e20: 000fffff
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1085 e24: 00800108
25b016d16602 boot ROM re: making inroads into the 0x2c8 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 11 diff changeset	1086 e28: 00800528
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1087
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1088 ; The following routine performs basic sanity initialization
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1089 ; of the memory map and clocking.
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1090 ;
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1091 ; Arguments:
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1092 ; R0: WS setting for nCS0 (external ROM/flash)
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1093 ; R1: WS setting for nCS6 (internal RAM)
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1094 ; R2: WS setting for nCS7 (internal ROM)
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1095 ; R3: value to be written into bits <3:0> of FFFF:F900
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1096 ; stack arg: value to be written into bits <7:4> of FFFF:F900
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1097
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1098 e2c: e92d4070 stmdb sp!, {r4, r5, r6, lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1099 e30: e5dd5010 ldrb r5, [sp, #16]
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1100 ; mask all interrupts
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1101 e34: e59fc48c ldr r12, =0xFFFF ; via 0x12c8
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1102 e38: e59f4484 ldr r4, =0xFFFFFA08 ; via 0x12c4
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1103 e3c: e1c4c0b0 strh r12, [r4] ; 1st reg
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1104 e40: e59f4484 ldr r4, =0xFFFFFA0A ; via 0x12cc
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1105 e44: e1c4c0b0 strh r12, [r4] ; 2nd reg
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1106 ; disable the watchdog
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1107 e48: e59f4480 ldr r4, =0xFFFFF804 ; via 0x12d0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1108 e4c: e3a0c0f5 mov r12, #245 ; 0xf5
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1109 e50: e1c4c0b0 strh r12, [r4] ; 1st write
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1110 e54: e3a0c0a0 mov r12, #160 ; 0xa0
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1111 e58: e1c4c0b0 strh r12, [r4] ; 2nd write
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1112 ; write 0x100 into the MCU memory map EXTRA_CONF register (FFFF:FB10)
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1113 ; forces the memory map to internal ROM, all other bits at
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1114 ; listed reset default values
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1115 e5c: e59f4470 ldr r4, =0xFFFFFB10 ; via 0x12d4
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1116 e60: e3a0cc01 mov r12, #256 ; 0x100
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1117 e64: e1c4c0b0 strh r12, [r4]
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1118 ; write 0xFF22 into FFFF:F900 in a convoluted way
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1119 e68: e59f6468 ldr r6, =0xFFFFFD00 ; via 0x12d8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1120 e6c: e3a04b01 mov r4, #1024 ; 0x400
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1121 e70: e3a0c801 mov r12, #65536 ; 0x10000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1122 e74: e24cc0de sub r12, r12, #222 ; 0xde
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1123 e78: e106c0b4 strh r12, [r6, -r4]
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1124 ; DPLL control register written with what looks like the reset default value
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1125 e7c: e59fc45c ldr r12, 0x2002 ; via 0x12e0
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1126 e80: e59f4454 ldr r4, =0xFFFF9800 ; via 0x12dc
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1127 e84: e1c4c0b0 strh r12, [r4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1128 e88: e1b04f8c movs r4, r12, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1129 e8c: 1afffffd bne 0xe88
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1130 ; write 0x1083 into FFFF:FD00
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1131 ; sets the MCU clock to come directly from VTCXO, bypassing DPLL
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1132 e90: e3a0c083 mov r12, #131 ; 0x83
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1133 e94: e28cca01 add r12, r12, #4096 ; 0x1000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1134 e98: e1c6c0b0 strh r12, [r6]
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1135 ; clear bit 6 of FFFF:FD02 (set VCLKOUT-FR to /1)
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1136 e9c: e1d6c0b2 ldrh r12, [r6, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1137 ea0: e20c40bf and r4, r12, #191 ; 0xbf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1138 ea4: e20cccff and r12, r12, #65280 ; 0xff00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1139 ea8: e184c00c orr r12, r4, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1140 eac: e1c6c0b2 strh r12, [r6, #2]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1141 ; program nCS0: WS as given by R0, 1 dummy cycle, enable writes
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1142 eb0: e3a0cc02 mov r12, #512 ; 0x200
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1143 eb4: e200001f and r0, r0, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1144 eb8: e3800e2a orr r0, r0, #672 ; 0x2a0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1145 ebc: e10600bc strh r0, [r6, -r12]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1146 ; program nCS6 (int RAM): WS as given by R1, common sense values for the rest
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1147 ec0: e3a0cf7d mov r12, #500 ; 0x1f4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1148 ec4: e201001f and r0, r1, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1149 ec8: e38000c0 orr r0, r0, #192 ; 0xc0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1150 ecc: e10600bc strh r0, [r6, -r12]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1151 ; program nCS7 (int ROM): same as nCS6, but WS as given by R2
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1152 ed0: e3a0cf7e mov r12, #504 ; 0x1f8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1153 ed4: e202001f and r0, r2, #31 ; 0x1f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1154 ed8: e38000c0 orr r0, r0, #192 ; 0xc0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1155 edc: e10600bc strh r0, [r6, -r12]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1156 ; program FFFF:F900 with {FF,stack_arg,R3}
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1157 ee0: e3a0cb01 mov r12, #1024 ; 0x400
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1158 ee4: e1830205 orr r0, r3, r5, lsl #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1159 ee8: e3800cff orr r0, r0, #65280 ; 0xff00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1160 eec: e10600bc strh r0, [r6, -r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1161 ef0: e8bd8070 ldmia sp!, {r4, r5, r6, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1162
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1163 ; The routine at 0xef4 gets called from main() after a '<' character
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1164 ; has been received and autoboot thereby interrupted in the
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1165 ; autoboot-enabled flash state.
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1166 ;
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1167 ; Called with:
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1168 ; R0 = the byte from 800524
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1169 ; R1 = 1 (value for the PLL_DIV field)
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1170 ; R2 = 2 (value for the PLL_MULT field)
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1171
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1172 ef4: e92d4070 stmdb sp!, {r4, r5, r6, lr}
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1173 ef8: e59fc3e4 ldr r12, =0xFFFFF900 ; via 0x12e4
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1174 efc: e1dc40b0 ldrh r4, [r12]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1175 ; original value of FFFF:F900 saved in R4
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1176 ; now set it to FF22, just like the 0xe2c init routine did
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1177 f00: e59f33d0 ldr r3, =0xFFFFFD00 ; via 0x12d8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1178 f04: e3a05b01 mov r5, #1024 ; 0x400
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1179 f08: e3a0c801 mov r12, #65536 ; 0x10000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1180 f0c: e24cc0de sub r12, r12, #222 ; 0xde
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1181 f10: e103c0b5 strh r12, [r3, -r5]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1182 ; write 0x2002 to FFFF:9800, again just like 0xe2c did
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1183 f14: e59f63c0 ldr r6, =0xFFFF9800 ; via 0x12dc
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1184 f18: e59fc3c0 ldr r12, =0x2002 ; via 0x12e0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1185 f1c: e1c6c0b0 strh r12, [r6]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1186 ; the following 2 instructions would cause this code to hang
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1187 ; in a tight loop if the least significant bit of the above constant (0x2002)
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1188 ; were 1 - but it is 0...
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1189 f20: e1b05f8c movs r5, r12, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1190 f24: 1afffffd bne 0xf20
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1191 ; now write the same thing into FFFF:9800, but with the PLL_DIV and
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1192 ; PLL_MULT values from the function arguments ORed in
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1193 f28: e181c102 orr r12, r1, r2, lsl #2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1194 f2c: e1a0c28c mov r12, r12, lsl #5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1195 f30: e38cc002 orr r12, r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1196 f34: e38cca02 orr r12, r12, #8192 ; 0x2000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1197 f38: e1c6c0b0 strh r12, [r6]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1198 ; now look if we are fed with 13 or 26 MHz
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1199 f3c: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1200 f40: 0a000009 beq 0xf6c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1201 f44: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1202 f48: 1a000006 bne 0xf68
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1203 ; 0 in R0, meaning 26 MHz in - set bit 6 in FFFF:FD02, selecting /2
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1204 f4c: e1d3c0b2 ldrh r12, [r3, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1205 f50: e38cc040 orr r12, r12, #64 ; 0x40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1206 f54: e1c3c0b2 strh r12, [r3, #2]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1207 ; write 10A1 into FFFF:FD00, setting ARM clock to DPLL_CLKOUT/2
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1208 f58: e3a0c0a1 mov r12, #161 ; 0xa1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1209 f5c: e28cca01 add r12, r12, #4096 ; 0x1000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1210 f60: e1c3c0b0 strh r12, [r3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1211 f64: ea000008 b 0xf8c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1212 f68: eafffffe b 0xf68
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1213 ; 1 in R0, meaning 13 MHz in - clear bit 6 in FFFF:FD02, selecting /1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1214 f6c: e1d3c0b2 ldrh r12, [r3, #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1215 f70: e20c00bf and r0, r12, #191 ; 0xbf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1216 f74: e20cccff and r12, r12, #65280 ; 0xff00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1217 f78: e180c00c orr r12, r0, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1218 f7c: e1c3c0b2 strh r12, [r3, #2]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1219 ; write 1081 into FFFF:FD00, setting ARM clock to DPLL_CLKOUT/1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1220 f80: e3a0c081 mov r12, #129 ; 0x81
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1221 f84: e28cca01 add r12, r12, #4096 ; 0x1000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1222 f88: e1c3c0b0 strh r12, [r3]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1223 ; the two branches rejoin
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1224 ; set bit 4 in FFFF:9800 - enable PLL
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1225 f8c: e1d6c0b0 ldrh r12, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1226 f90: e38cc010 orr r12, r12, #16 ; 0x10
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1227 f94: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1228 f98: e1a0c82c mov r12, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1229 f9c: e1c6c0b0 strh r12, [r6]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1230 ; the following 2 instructions would cause a dead hang if
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1231 ; bit 0 were already set in FFFF:9800, i.e., if the PLL were
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1232 ; already locked
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1233 fa0: e1b00f8c movs r0, r12, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1234 fa4: 1afffffd bne 0xfa0
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1235 ; restore saved value of FFFF:F900
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1236 fa8: e3a0cb01 mov r12, #1024 ; 0x400
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1237 fac: e10340bc strh r4, [r3, -r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1238 fb0: e8bd8070 ldmia sp!, {r4, r5, r6, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1239
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1240 ; Routine 0xfb4 gets called from main() where the boot code is giving
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1241 ; the UARTs a chance to interrupt the autoboot process before transferring
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1242 ; control to the nCS0 image.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1243 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1244 ; Arguments: both R0 and R1 point to byte variables acting as additional
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1245 ; function outputs.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1246 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1247 ; If a '<' character is received on either UART, the function returns
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1248 ; without further fuss. If nothing was received on either UART, it
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1249 ; also returns without further fuss. However, if the "wrong" byte value
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1250 ; was received on either UART, the function flips the VCLKOUT_DIV2 bit
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1251 ; in the FFFF:FD02 register - it is the boot code's way of figuring out
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1252 ; whether the input clock is 13 or 26 MHz.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1253 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1254 ; Return values:
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1255 ; In R0: 1 if '<' received, 0 otherwise
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1256 ; In *R0: UART ID if '<' received, FF otherwise
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1257 ; In *R1: final state of the 800534 byte variable
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1258 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1259 ; The latter variable records the state of the divide-by-2. On the first
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1260 ; try, the divide-by-2 is enabled, and the variable contains 0. When this
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1261 ; function disables the /2, the variable is set to 1. It keeps toggling
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1262 ; back and forth as wrong bytes come in.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1263
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1264 fb4: e3a0c0ff mov r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1265 fb8: e5c0c000 strb r12, [r0]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1266 ; check the MODEM UART first
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1267 fbc: e59fc324 ldr r12, =0xFFFF5000 ; via 0x12e8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1268 fc0: e5dc2805 ldrb r2, [r12, #2053]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1269 fc4: e1b02f82 movs r2, r2, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1270 fc8: 1a000001 bne 0xfd4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1271 fcc: e3a02000 mov r2, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1272 fd0: ea000003 b 0xfe4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1273 fd4: e5dc2800 ldrb r2, [r12, #2048]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1274 fd8: e352003c cmp r2, #60 ; 0x3c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1275 fdc: 0a000024 beq 0x1074
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1276 fe0: e3a02001 mov r2, #1 ; 0x1
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1277 ; Control gets here if no '<' was received on the MODEM UART.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1278 ; R2 contains 1 if some other byte value was received, or 0 if nothing.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1279 ; Now check the IrDA UART.
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1280 fe4: e5dc3005 ldrb r3, [r12, #5]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1281 fe8: e1b03f83 movs r3, r3, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1282 fec: 1a000002 bne 0xffc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1283 ff0: e3520001 cmp r2, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1284 ff4: 0a000003 beq 0x1008
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1285 ff8: ea000015 b 0x1054
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1286 ffc: e5dcc000 ldrb r12, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1287 1000: e35c003c cmp r12, #60 ; 0x3c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1288 1004: 0a000017 beq 0x1068
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1289 ; control gets here if the "wrong" byte value was received on either UART
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1290 1008: e59fc2dc ldr r12, =0x800534 ; via 0x12ec
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1291 100c: e5dc0000 ldrb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1292 1010: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1293 1014: 1a000008 bne 0x103c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1294 1018: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1295 101c: e5cc0000 strb r0, [r12]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1296 1020: e59f02c8 ldr r0, =0xFFFFFD02 ; via 0x12f0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1297 1024: e1d0c0b0 ldrh r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1298 1028: e20c20bf and r2, r12, #191 ; 0xbf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1299 102c: e20cccff and r12, r12, #65280 ; 0xff00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1300 1030: e182c00c orr r12, r2, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1301 1034: e1c0c0b0 strh r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1302 1038: ea000005 b 0x1054
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1303 103c: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1304 1040: e5cc0000 strb r0, [r12]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1305 1044: e59fc2a4 ldr r12, =0xFFFFFD02 ; via 0x12f0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1306 1048: e1dc00b0 ldrh r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1307 104c: e3800040 orr r0, r0, #64 ; 0x40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1308 1050: e1cc00b0 strh r0, [r12]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1309 1054: e59fc290 ldr r12, =0x800534 ; via 0x12ec
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1310 1058: e5dcc000 ldrb r12, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1311 105c: e5c1c000 strb r12, [r1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1312 1060: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1313 1064: e12fff1e bx lr
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1314 ; control gets here if a '<' character was received on the IrDA UART
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1315 1068: e3a0c001 mov r12, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1316 106c: e5c0c000 strb r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1317 1070: ea000001 b 0x107c
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1318 ; control gets here if a '<' character was received on the MODEM UART
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1319 1074: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1320 1078: e5c0c000 strb r12, [r0]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1321 107c: e59fc268 ldr r12, =0x800534 ; via 0x12ec
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1322 1080: e5dcc000 ldrb r12, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1323 1084: e5c1c000 strb r12, [r1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1324 1088: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1325 108c: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1326
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1327 ; 0x1090 - the main routine for the UART download mode. Called with R0=0
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1328 ; if there is no valid image in flash, or with R0=1 if a valid image is
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1329 ; present, but the autoboot was interrupted by '<' coming in on a UART.
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1330
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1331 1090: e92d4070 stmdb sp!, {r4, r5, r6, lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1332 1094: e24dd00c sub sp, sp, #12 ; 0xc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1333 1098: e1a05000 mov r5, r0
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1334 109c: e59f4250 ldr r4, =0x800518 ; via 0x12f4
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1335 10a0: e2846008 add r6, r4, #8 ; R6=0x800520
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1336 10a4: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1337 10a8: e5cdc008 strb r12, [sp, #8]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1338 ; If the argument was 0, meaning that no valid image was found in the
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1339 ; flash and no wait for '<' was done, that logic is repeated here,
a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1340 ; exactly as in main() when the flash does contain a bootable image.
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1341 10ac: e3550000 cmp r5, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1342 10b0: 1a000009 bne 0x10dc
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1343 10b4: e59f123c ldr r1, =0x800524 ; via 0x12f8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1344 10b8: e1a00006 mov r0, r6
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1345 10bc: ebffffbc bl 0xfb4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1346 10c0: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1347 10c4: 1a000004 bne 0x10dc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1348 10c8: e5d4000c ldrb r0, [r4, #12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1349 10cc: e3a01001 mov r1, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1350 10d0: e3a02002 mov r2, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1351 10d4: ebffff86 bl 0xef4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1352 10d8: ea000001 b 0x10e4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1353 10dc: e3550001 cmp r5, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1354 10e0: 1afffff1 bne 0x10ac
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1355 ; no-image and interrupt-boot code paths merge here
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1356 10e4: e28d0008 add r0, sp, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1357 10e8: ebfffc76 bl 0x2c8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1358 10ec: e5ddc008 ldrb r12, [sp, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1359 10f0: e35c0000 cmp r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1360 10f4: 0a00000d beq 0x1130
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1361 10f8: e5dd0008 ldrb r0, [sp, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1362 10fc: ebfffdec bl 0x8b4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1363 1100: ea00000a b 0x1130
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1364 1104: e5d4000c ldrb r0, [r4, #12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1365 1108: e3a01001 mov r1, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1366 110c: e3a02002 mov r2, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1367 1110: ebffff77 bl 0xef4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1368 1114: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1369 1118: e5cdc000 strb r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1370 111c: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1371 1120: e3a01000 mov r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1372 1124: e3a02000 mov r2, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1373 1128: e3a03002 mov r3, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1374 112c: ebffff3e bl 0xe2c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1375 1130: e5d40008 ldrb r0, [r4, #8]
11 a51729642295 boot ROM re: got to the 0x1090 routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 8 diff changeset	1376 1134: e59fc1c0 ldr r12, =0x800104 ; via 0x12fc
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1377 1138: e59c1000 ldr r1, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1378 113c: e28d2009 add r2, sp, #9 ; 0x9
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1379 1140: eb0000b8 bl 0x1428
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1380 1144: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1381 1148: 1afffff8 bne 0x1130
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1382 114c: e5ddc009 ldrb r12, [sp, #9]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1383 1150: e35c003c cmp r12, #60 ; 0x3c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1384 1154: 1afffff5 bne 0x1130
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1385 1158: e28d0008 add r0, sp, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1386 115c: ebfffc59 bl 0x2c8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1387 1160: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1388 1164: 1affffe6 bne 0x1104
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1389 1168: e5ddc008 ldrb r12, [sp, #8]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1390 116c: e35c0000 cmp r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1391 1170: 1affffe0 bne 0x10f8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1392 1174: eaffffed b 0x1130
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1393
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1394 ; This function takes a few peeks at the external boot memory on nCS0.
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1395 ; It appears that the intent is to return 1 if a valid image is present
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1396 ; in the external flash, or 0 otherwise.
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1397 ;
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1398 ; The first check is the 32-bit word at 0x2000. If that word equals 0,
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1399 ; the function returns 1. Otherwise, that word is expected to equal 1:
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1400 ; if it doesn't, the function returns 0.
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1401 ;
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1402 ; If the word at 2000 is 00000001 (like it is on Closedmoko phones,
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1403 ; for example), the IRQ vector in the flash image (where the ARM core
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1404 ; would vector if the Calypso register were flipped to put nCS0 at 0x0)
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1405 ; is checked. If the vector location contains an unconditional branch
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1406 ; instruction (0xEAxxxxxx) and the 32-bit instruction word at the target
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1407 ; of that branch is something other than 0xFFFFFFFF, the function
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1408 ; returns 1; otherwise it returns 0.
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1409
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1410 1178: e3a0ca02 mov r12, #8192 ; 0x2000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1411 117c: e59cc000 ldr r12, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1412 1180: e35c0000 cmp r12, #0 ; 0x0
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1413 1184: 0a000011 beq 0x11d0 ; return 1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1414 1188: e35c0001 cmp r12, #1 ; 0x1
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1415 118c: 1a00000d bne 0x11c8 ; return 0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1416 1190: e3a0c018 mov r12, #24 ; 0x18
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1417 1194: e28cc403 add r12, r12, #50331648 ; 0x3000000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1418 1198: e59cc000 ldr r12, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1419 119c: e20c04ff and r0, r12, #-16777216 ; 0xff000000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1420 11a0: e3700416 cmn r0, #369098752 ; 0x16000000
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1421 11a4: 1a000007 bne 0x11c8 ; return 0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1422 11a8: e3a00018 mov r0, #24 ; 0x18
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1423 11ac: e2800403 add r0, r0, #50331648 ; 0x3000000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1424 11b0: e28cc002 add r12, r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1425 11b4: e1a0c10c mov r12, r12, lsl #2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1426 11b8: e3ccc4ff bic r12, r12, #-16777216 ; 0xff000000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1427 11bc: e790c00c ldr r12, [r0, r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1428 11c0: e37c0001 cmn r12, #1 ; 0x1
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1429 11c4: 1a000001 bne 0x11d0 ; return 1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1430 11c8: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1431 11cc: e1a0f00e mov pc, lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1432 11d0: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1433 11d4: e1a0f00e mov pc, lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1434
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1435 ; main() entry point
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1436 11d8: e92d4070 stmdb sp!, {r4, r5, r6, lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1437 11dc: e24dd008 sub sp, sp, #8 ; 0x8
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1438 ; 0xe2c basic memmap/clock init routine called with the following
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1439 ; values: WS=4 for nCS0, WS=0 for nCS6 and nCS7, FF22 into FFFF:F900
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1440 11e0: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1441 11e4: e5cdc000 strb r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1442 11e8: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1443 11ec: e3a01000 mov r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1444 11f0: e3a02000 mov r2, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1445 11f4: e3a03002 mov r3, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1446 11f8: ebffff0b bl 0xe2c
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1447 11fc: eb00004f bl 0x1340 ; init UARTs
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1448 ; write 0x1D4C0 into 800104 - even though it was already done by the
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1449 ; bulk RAM init routine at 0x1500
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1450 1200: e59f00f4 ldr r0, =0x800104 ; via 0x12fc
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1451 1204: e3a0c802 mov r12, #131072 ; 0x20000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1452 1208: e24ccdad sub r12, r12, #11072 ; 0x2b40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1453 120c: e580c000 str r12, [r0]
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1454 ; set bit 6 in FFFF:FD02 (set VCLKOUT-FR to /2)
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1455 1210: e59f60d8 ldr r6, =0xFFFFFD02 ; via 0x12f0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1456 1214: e1d6c0b0 ldrh r12, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1457 1218: e38cc040 orr r12, r12, #64 ; 0x40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1458 121c: e1c6c0b0 strh r12, [r6]
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1459 ; Check for a valid image in flash. If there doesn't seem to be one,
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1460 ; call the 0x1090 routine. The latter seems to never return, so it is
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1461 ; probably the endless wait for UART download function.
9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1462 1220: ebffffd4 bl 0x1178 ; check for valid img in flash
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1463 1224: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1464 1228: 1a000001 bne 0x1234
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1465 122c: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1466 1230: ebffff96 bl 0x1090
5 9db4dcf94128 boot ROM re: making inroads into the flash image validity criteria Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 4 diff changeset	1467 ; A valid image is present.
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1468 ; set bit 6 in FFFF:FD02 again
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1469 1234: e1d6c0b0 ldrh r12, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1470 1238: e38cc040 orr r12, r12, #64 ; 0x40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1471 123c: e1c6c0b0 strh r12, [r6]
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1472 1240: e59f10b0 ldr r1, =0x800524 ; via 0x12f8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1473 1244: e2415004 sub r5, r1, #4 ; 0x4
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1474 1248: e59f40b0 ldr r4, =0x373C ; via 0x1300
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1475 ; the retry count loaded into R4 is 14140 in decimal
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1476 124c: e1a00005 mov r0, r5
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1477 ; call made with R0=0x800520, R1=0x800524
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1478 1250: ebffff57 bl 0xfb4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1479 1254: e3500000 cmp r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1480 1258: 1a000001 bne 0x1264
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1481 125c: e2544001 subs r4, r4, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1482 1260: 1afffff9 bne 0x124c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1483 1264: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1484 1268: 0a00000c beq 0x12a0
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1485 ; clear bit 6 in FFFF:FD02
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1486 126c: e1d6c0b0 ldrh r12, [r6]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1487 1270: e20c00bf and r0, r12, #191 ; 0xbf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1488 1274: e20cccff and r12, r12, #65280 ; 0xff00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1489 1278: e180c00c orr r12, r0, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1490 127c: e1c6c0b0 strh r12, [r6]
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1491 ; transfer control to the flash image?
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1492 1280: e3a0ca02 mov r12, #8192 ; 0x2000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1493 1284: e59c0000 ldr r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1494 1288: e1b010a0 movs r1, r0, lsr #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1495 128c: 1a000002 bne 0x129c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1496 1290: e59c1004 ldr r1, [r12, #4]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1497 1294: eb0000bc bl 0x158c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1498 1298: eafffffe b 0x1298
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1499 129c: eafffffe b 0x129c
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1500 ; interactive mode entry?
8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1501 12a0: e59fc050 ldr r12, =0x800524 ; via 0x12f8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1502 12a4: e5dc0000 ldrb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1503 12a8: e3a01001 mov r1, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1504 12ac: e3a02002 mov r2, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1505 12b0: ebffff0f bl 0xef4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1506 12b4: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1507 12b8: ebffff74 bl 0x1090
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1508 12bc: e28dd008 add sp, sp, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1509 12c0: e8bd8070 ldmia sp!, {r4, r5, r6, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1510
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1511 ; literal pool
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1512 12c4: fffffa08
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1513 12c8: 0000ffff
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1514 12cc: fffffa0a
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1515 12d0: fffff804
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1516 12d4: fffffb10
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1517 12d8: fffffd00
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1518 12dc: ffff9800
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1519 12e0: 00002002
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1520 12e4: fffff900
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1521 12e8: ffff5000
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1522 12ec: 00800534
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1523 12f0: fffffd02
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1524 12f4: 00800518
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1525 12f8: 00800524
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1526 12fc: 00800104
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1527 1300: 0000373c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1528
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1529 ; Routine 0x1304: emit a character string through a UART
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1530 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1531 ; Arguments:
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1532 : R0: pointer to the string
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1533 ; R1: number of characters (bytes) to transmit
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1534 ; R2: UART ID (0=MODEM, 1=IrDA)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1535
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1536 1304: e3510000 cmp r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1537 1308: 012fff1e bxeq lr
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1538 130c: e59fc178 ldr r12, =0x1FCC ; via 0x148c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1539 1310: e79cc102 ldr r12, [r12, r2, lsl #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1540 1314: e28c3005 add r3, r12, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1541 1318: e5d32000 ldrb r2, [r3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1542 131c: e3120020 tst r2, #32 ; 0x20
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1543 1320: 0afffffc beq 0x1318
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1544 1324: e4d02001 ldrb r2, [r0], #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1545 1328: e5cc2000 strb r2, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1546 132c: e2411001 sub r1, r1, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1547 1330: e1a01801 mov r1, r1, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1548 1334: e1b01821 movs r1, r1, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1549 1338: 1afffff6 bne 0x1318
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1550 133c: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1551
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1552 ; The following routine initializes both UARTs with a fixed set of
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1553 ; parameters (the same for both UARTs).
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1554
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1555 1340: e92d4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1556 ; UIR fiddling: connect the MODEM UART to the MCU
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1557 ; and restore normal operation (interrupts NOT masked at UIR level)
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1558 1344: e59fc144 ldr r12, =0xFFFF6000 ; via 0x1490
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1559 1348: e5dc0000 ldrb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1560 134c: e3800002 orr r0, r0, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1561 1350: e5cc0000 strb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1562 1354: e5dc0000 ldrb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1563 1358: e20000fe and r0, r0, #254 ; 0xfe
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1564 135c: e5cc0000 strb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1565 1360: e5dc0000 ldrb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1566 1364: e20000fd and r0, r0, #253 ; 0xfd
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1567 1368: e5cc0000 strb r0, [r12]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1568 ; actual UART register diddling: prepare the values for both UARTs
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1569 136c: e3a0b003 mov r11, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1570 1370: e3a05000 mov r5, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1571 1374: e3a0a02a mov r10, #42 ; 0x2a
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1572 1378: e3a09080 mov r9, #128 ; 0x80
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1573 137c: e3a070bf mov r7, #191 ; 0xbf
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1574 1380: e3a04007 mov r4, #7 ; 0x7
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1575 1384: e3a02002 mov r2, #2 ; 0x2
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1576 ; loop over the 2 UART base addresses
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1577 1388: e59f60fc ldr r6, =0x1FCC ; via 0x148c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1578 138c: e496c004 ldr r12, [r6], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1579 1390: e28c3008 add r3, r12, #8 ; 0x8
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1580 ; R3 points to register 8 (MDR1)
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1581 ; write 07 into it: reset mode
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1582 1394: e5c34000 strb r4, [r3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1583 1398: e28c0003 add r0, r12, #3 ; 0x3
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1584 ; R0 points to register 3 (LCR)
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1585 ; write BF into it: map in the extended registers
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1586 139c: e5c07000 strb r7, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1587 13a0: e28c1002 add r1, r12, #2 ; 0x2
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1588 ; R1 points to register 2: EFR under current mapping
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1589 ; set bit 4: enable enhanced functions
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1590 13a4: e5d18000 ldrb r8, [r1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1591 13a8: e3888010 orr r8, r8, #16 ; 0x10
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1592 13ac: e5c18000 strb r8, [r1]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1593 ; write 80 into LCR: map in the baud rate divisor registers
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1594 13b0: e5c09000 strb r9, [r0]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1595 ; reg 2 (pointed to by R1) is now IIR/FCR
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1596 ; write 07 into FCR: FIFOs enabled and cleared, no DMA
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1597 13b4: e5c14000 strb r4, [r1]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1598 ; write BF into LCR again
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1599 13b8: e5c07000 strb r7, [r0]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1600 ; load baud rate divisor /42
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1601 13bc: e5cca000 strb r10, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1602 13c0: e5cc5001 strb r5, [r12, #1]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1603 ; write 03 into LCR: restore normal registers, 8N1
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1604 13c4: e5c0b000 strb r11, [r0]
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1605 ; write 00 into MDR1: plain UART mode
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1606 13c8: e5c35000 strb r5, [r3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1607 13cc: e2522001 subs r2, r2, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1608 13d0: 1affffed bne 0x138c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1609 13d4: e8bd8ff0 ldmia sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1610
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1611 ; The following routine switches a UART to a different baud rate.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1612 ; Arguments:
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1613 ; R0: baud rate index from the table at 0x1FD4
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1614 ; R1: UART ID (0=MODEM, 1=IrDA)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1615
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1616 13d8: e59fc0ac ldr r12, =0x1FCC ; via 0x148c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1617 13dc: e79c2101 ldr r2, [r12, r1, lsl #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1618 13e0: e282c005 add r12, r2, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1619 13e4: e5dc1000 ldrb r1, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1620 13e8: e3110040 tst r1, #64 ; 0x40
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1621 13ec: 0afffffc beq 0x13e4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1622 13f0: e282c003 add r12, r2, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1623 13f4: e5dc1000 ldrb r1, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1624 13f8: e3811080 orr r1, r1, #128 ; 0x80
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1625 13fc: e5cc1000 strb r1, [r12]
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1626 1400: e59f108c ldr r1, =0x1FD4 ; via 0x1494
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1627 1404: e7d13080 ldrb r3, [r1, r0, lsl #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1628 1408: e5c23001 strb r3, [r2, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1629 140c: e0810080 add r0, r1, r0, lsl #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1630 1410: e5d00001 ldrb r0, [r0, #1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1631 1414: e5c20000 strb r0, [r2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1632 1418: e5dc0000 ldrb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1633 141c: e200007f and r0, r0, #127 ; 0x7f
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1634 1420: e5cc0000 strb r0, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1635 1424: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1636
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1637 ; 0x1428 - UART read Rx character routine
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1638 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1639 ; Arguments:
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1640 ; R0: UART ID (0=MODEM, 1=IrDA)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1641 ; R1: poll repeat count, 0 means wait forever
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1642 ; R2: pointer to buffer where the received booty is stored
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1643 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1644 ; Return value: 1 if a character was received, 0 otherwise
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1645
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1646 1428: e3510000 cmp r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1647 142c: 1a000006 bne 0x144c
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1648 1430: e59fc054 ldr r12, =0x1FCC ; via 0x148c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1649 1434: e79cc100 ldr r12, [r12, r0, lsl #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1650 1438: e28c1005 add r1, r12, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1651 143c: e5d10000 ldrb r0, [r1]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1652 1440: e1b00f80 movs r0, r0, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1653 1444: 0afffffc beq 0x143c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1654 1448: ea000009 b 0x1474
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1655 144c: e59fc038 ldr r12, =0x1FCC ; via 0x148c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1656 1450: e79cc100 ldr r12, [r12, r0, lsl #2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1657 1454: e28c3005 add r3, r12, #5 ; 0x5
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1658 1458: e5d30000 ldrb r0, [r3]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1659 145c: e1b00f80 movs r0, r0, lsl #31
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1660 1460: 1a000001 bne 0x146c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1661 1464: e2511001 subs r1, r1, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1662 1468: 1afffffa bne 0x1458
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1663 146c: e3510000 cmp r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1664 1470: 0a000003 beq 0x1484
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1665 1474: e5dcc000 ldrb r12, [r12]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1666 1478: e5c2c000 strb r12, [r2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1667 147c: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1668 1480: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1669 1484: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1670 1488: e12fff1e bx lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1671
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1672 ; literal pool
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1673 148c: 00001fcc
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1674 1490: ffff6000
a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	1675 1494: 00001fd4
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1676
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1677 ; The RESET entry point branches here
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1678 ;
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1679 ; First order of business: copy the 7 vector instructions from
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1680 ; 0x1FE0 to 0x80001C.
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1681 1498: e59f003c ldr r0, =0x1FE0 ; via 0x14dc
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1682 149c: e59f103c ldr r1, =0x80001C ; via 0x14e0
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1683 14a0: e3a02000 mov r2, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1684 14a4: e7903002 ldr r3, [r0, r2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1685 14a8: e7813002 str r3, [r1, r2]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1686 14ac: e2822004 add r2, r2, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1687 14b0: e352001c cmp r2, #28 ; 0x1c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1688 14b4: 1afffffa bne 0x14a4
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1689 ; done with that; now set up the stack
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1690 14b8: e59f0014 ldr r0, =0x8005C0 ; via 0x14d4
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1691 14bc: e59f1014 ldr r1, =0x190 ; via 0x14d8
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1692 14c0: e2411004 sub r1, r1, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1693 14c4: e0802001 add r2, r0, r1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1694 14c8: e3c22003 bic r2, r2, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1695 14cc: e1a0d002 mov sp, r2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1696 14d0: ea000003 b 0x14e4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1697
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1698 ; literals for the above code
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1699 14d4: 008005c0
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1700 14d8: 00000190
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1701 14dc: 00001fe0
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1702 14e0: 0080001c
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1703
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1704 ; continuation of the RESET entry code
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1705 14e4: e59f0078 ldr r0, =0x1694 ; via 0x1564
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1706 14e8: e3700001 cmn r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1707 14ec: 1b000003 blne 0x1500
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1708 14f0: ebffff38 bl 0x11d8 ; main()
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1709 ; only tight-loop halts from here on
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1710 14f4: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1711 14f8: eb000022 bl 0x1588
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1712 14fc: eafffffe b 0x14fc
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1713
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1714 ; 0x1500: Subroutine entry
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1715 ;
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1716 ; This routine initializes multiple RAM areas from a single ROM init data
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1717 ; table. Takes one argument in R0, which points to the ROM table.
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1718 ; The ROM table consists of one or more abutted variable-length records,
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1719 ; each of the following format:
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1720 ;
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1721 ; 1 word: number of bytes to copy (may or may not be word-aligned)
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1722 ; 1 word: copy destination address (ditto)
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1723 ; variable length: data to be copied
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1724 ; 0 to 3 bytes of padding to put the next record on a word boundary
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1725 ;
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1726 ; The list is terminated by a zero word.
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1727
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1728 1500: ea000011 b 0x154c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1729 1504: e4901004 ldr r1, [r0], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1730 1508: e3110003 tst r1, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1731 150c: 1a000007 bne 0x1530
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1732 1510: e2522004 subs r2, r2, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1733 1514: 4a000003 bmi 0x1528
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1734 1518: e4903004 ldr r3, [r0], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1735 151c: e4813004 str r3, [r1], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1736 1520: e2522004 subs r2, r2, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1737 1524: 5afffffb bpl 0x1518
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1738 1528: e2922004 adds r2, r2, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1739 152c: 0a000003 beq 0x1540
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1740 1530: e4d03001 ldrb r3, [r0], #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1741 1534: e4c13001 strb r3, [r1], #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1742 1538: e2522001 subs r2, r2, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1743 153c: 1afffffb bne 0x1530
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1744 1540: e3100003 tst r0, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1745 1544: 13c00003 bicne r0, r0, #3 ; 0x3
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1746 1548: 12800004 addne r0, r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1747 154c: e4902004 ldr r2, [r0], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1748 1550: e3520000 cmp r2, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1749 1554: 1affffea bne 0x1504
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1750 1558: e1a0f00e mov pc, lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1751
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1752 ; literal pool
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1753 155c: 008005c0 ; low address of the stack - unused duplicate?
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1754 1560: 00000190 ; size of the stack - ditto
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1755 1564: 00001694
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1756
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1757 ; The following looks like the TI compiler's IND_CALL library helper
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1758
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1759 1568: e3140001 tst r4, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1760 156c: 1a000000 bne 0x1574
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1761 1570: e12fff14 bx r4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1762 1574: e1a0c004 mov r12, r4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1763 1578: e1a0400e mov r4, lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1764 157c: e28fe001 add lr, pc, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1765 1580: e12fff1c bx r12
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1766 1584: 4720 bx r4
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1767 1586: 46c0 nop (mov r8, r8)
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1768
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1769 1588: eafffffe b 0x1588
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1770
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1771 ; This routine effects the transfer of control to the flash (nCS0)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1772 ; application image of the type indicated by the argument in R0.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1773 ; The latter argument is the word read from 0x2000.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1774 ; R1 contains the word read from 0x2004.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1775
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1776 158c: e92d4010 stmdb sp!, {r4, lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1777 1590: e1a04000 mov r4, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1778 1594: e1b0c0a4 movs r12, r4, lsr #1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1779 1598: 0a000001 beq 0x15a4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1780 159c: e3a00001 mov r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1781 15a0: e8bd8010 ldmia sp!, {r4, pc}
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1782 15a4: e59f0054 ldr r0, =0xFFFFFB10 ; via 0x1600
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1783 15a8: e1d0c0b0 ldrh r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1784 15ac: e20c20ff and r2, r12, #255 ; 0xff
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1785 15b0: e20ccb3f and r12, r12, #64512 ; 0xfc00
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1786 15b4: e182c00c orr r12, r2, r12
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1787 15b8: e1a0c80c mov r12, r12, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1788 15bc: e1a0c82c mov r12, r12, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1789 15c0: e3540000 cmp r4, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1790 15c4: 1a000004 bne 0x15dc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1791 15c8: e38ccc01 orr r12, r12, #256 ; 0x100
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1792 15cc: e1c0c0b0 strh r12, [r0]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1793 15d0: e1a04001 mov r4, r1
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1794 15d4: ebffffe3 bl 0x1568 ; IND_CALL
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1795 15d8: e8bd8010 ldmia sp!, {r4, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1796 15dc: e3540001 cmp r4, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1797 15e0: 18bd8010 ldmneia sp!, {r4, pc}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1798 15e4: e3a00020 mov r0, #32 ; 0x20
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1799 15e8: e3a010cc mov r1, #204 ; 0xcc
6 8c2621b2ed37 boot ROM re: further understanding of the external flash image booting Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 5 diff changeset	1800 15ec: e59f2010 ldr r2, =0x800038 ; via 0x1604
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1801 15f0: eb000019 bl 0x165c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1802 15f4: e1a00004 mov r0, r4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1803 15f8: eb1ffa8e bl 0x800038
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1804 15fc: e8bd8010 ldmia sp!, {r4, pc}
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1805
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1806 ; literal pool
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1807 1600: fffffb10
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1808 1604: 00800038
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1809
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1810 ; This routine computes a simple word-wise (16 bits at a time) sum of
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1811 ; the present internal boot ROM code (ignoring carry-outs), and returns
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1812 ; it in R0. The upper 16 bits of the R0 return value will always be 0.
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1813 ;
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1814 ; If the argument in R0 equals 1, a call to the 0xe2c memmap/clock init
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1815 ; function is made first, with the same arguments as at the beginning
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1816 ; of main().
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1817
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1818 1608: e92d4000 stmdb sp!, {lr}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1819 160c: e24dd008 sub sp, sp, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1820 1610: e3500001 cmp r0, #1 ; 0x1
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1821 1614: 1a000006 bne 0x1634
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1822 ; 0xe2c routine is called with the same arguments as at the beginning
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	1823 ; of main()
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1824 1618: e3a0c002 mov r12, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1825 161c: e5cdc000 strb r12, [sp]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1826 1620: e3a00004 mov r0, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1827 1624: e3a01000 mov r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1828 1628: e3a02000 mov r2, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1829 162c: e3a03002 mov r3, #2 ; 0x2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1830 1630: ebfffdfd bl 0xe2c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1831 1634: e3a00000 mov r0, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1832 1638: e3a0c000 mov r12, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1833 163c: e0dc10b2 ldrh r1, [r12], #2
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1834 1640: e0810000 add r0, r1, r0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1835 1644: e1a00800 mov r0, r0, lsl #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1836 1648: e1a00820 mov r0, r0, lsr #16
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1837 164c: e35c0a02 cmp r12, #8192 ; 0x2000
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1838 1650: 3afffff9 bcc 0x163c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1839 1654: e28dd008 add sp, sp, #8 ; 0x8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1840 1658: e8bd8000 ldmia sp!, {pc}
3 e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1841
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1842 ; The following is a bcopy/memcpy-like routine, but with arguments
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1843 ; in the wrong order (matching neither bcopy nor memcpy):
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1844 ;
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1845 ; R0: source address
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1846 ; R1: # of bytes to copy
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1847 ; R2: dest address
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1848 ;
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1849 ; The addresses must be word-aligned, the length must be a multiple of 4.
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1850 ; Zero length is OK (no-op).
e3f8fe6a848e boot ROM re: started on main() and the 0xe2c routine Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 2 diff changeset	1851
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1852 165c: e3510000 cmp r1, #0 ; 0x0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1853 1660: 012fff1e bxeq lr
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1854 1664: e490c004 ldr r12, [r0], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1855 1668: e482c004 str r12, [r2], #4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1856 166c: e2511004 subs r1, r1, #4 ; 0x4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1857 1670: 1afffffb bne 0x1664
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1858 1674: e12fff1e bx lr
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1859
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1860 ; The soft-vector pointers at 0x800000 are initially set to point
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1861 ; to the ROM addresses of the following 7 tight-loop branch instructions:
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1862 1678: eafffffe b 0x1678
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1863 167c: eafffffe b 0x167c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1864 1680: eafffffe b 0x1680
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1865 1684: eafffffe b 0x1684
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1866 1688: eafffffe b 0x1688
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1867 168c: eafffffe b 0x168c
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1868 1690: eafffffe b 0x1690
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1869
2 979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1870 ; RAM init table for the 0x1500 subroutine
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1871 ; vector init
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1872 1694: 0000001c
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1873 1698: 00800000
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1874 169c: 00001678
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1875 16a0: 0000167c
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1876 16a4: 00001680
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1877 16a8: 00001684
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1878 16ac: 00001688
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1879 16b0: 0000168c
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1880 16b4: 00001690
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1881 ; another record
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1882 16b8: 00000004
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1883 16bc: 00800104
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1884 16c0: 0001d4c0
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1885 ; another record
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1886 16c4: 00000001
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1887 16c8: 00800108
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1888 16cc: 00000001
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1889 ; another record
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1890 16d0: 00000001
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1891 16d4: 00800534
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1892 16d8: 00000000
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1893 ; end marker
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1894 16dc: 00000000
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1895
979d97fe75eb boot ROM rev eng: progressing on the RESET code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 1 diff changeset	1896 ; The word at 0x16DC appears to be the last word of the actual boot
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1897 ; code + data. Between here and 0x1FCC we've got what looks like
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1898 ; filler:
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1899
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1900 000016C0: C0 D4 01 00 01 00 00 00 08 01 80 00 01 00 00 00 ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1901 000016D0: 01 00 00 00 34 05 80 00 00 00 00 00 00 00 00 00 ....4...........
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1902 000016E0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1903 000016F0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1904 00001700: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1905 00001710: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1906 00001720: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1907 00001730: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1908 00001740: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1909 00001750: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1910 00001760: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1911 00001770: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1912 00001780: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1913 00001790: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1914 000017A0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1915 000017B0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1916 000017C0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1917 000017D0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1918 000017E0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1919 000017F0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1920 00001800: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1921 00001810: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1922 00001820: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1923 00001830: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1924 00001840: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1925 00001850: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1926 00001860: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1927 00001870: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1928 00001880: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1929 00001890: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1930 000018A0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1931 000018B0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1932 000018C0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1933 000018D0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1934 000018E0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1935 000018F0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1936 00001900: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1937 00001910: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1938 00001920: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1939 00001930: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1940 00001940: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1941 00001950: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1942 00001960: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1943 00001970: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1944 00001980: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1945 00001990: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1946 000019A0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1947 000019B0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1948 000019C0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1949 000019D0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1950 000019E0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1951 000019F0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1952 00001A00: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1953 00001A10: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1954 00001A20: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1955 00001A30: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1956 00001A40: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1957 00001A50: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1958 00001A60: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1959 00001A70: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1960 00001A80: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1961 00001A90: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1962 00001AA0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1963 00001AB0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1964 00001AC0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1965 00001AD0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1966 00001AE0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1967 00001AF0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1968 00001B00: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1969 00001B10: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1970 00001B20: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1971 00001B30: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1972 00001B40: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1973 00001B50: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1974 00001B60: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1975 00001B70: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1976 00001B80: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1977 00001B90: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1978 00001BA0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1979 00001BB0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1980 00001BC0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1981 00001BD0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1982 00001BE0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1983 00001BF0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1984 00001C00: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1985 00001C10: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1986 00001C20: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1987 00001C30: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1988 00001C40: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1989 00001C50: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1990 00001C60: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1991 00001C70: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1992 00001C80: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1993 00001C90: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1994 00001CA0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1995 00001CB0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1996 00001CC0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1997 00001CD0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1998 00001CE0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1999 00001CF0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2000 00001D00: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2001 00001D10: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2002 00001D20: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2003 00001D30: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2004 00001D40: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2005 00001D50: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2006 00001D60: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2007 00001D70: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2008 00001D80: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2009 00001D90: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2010 00001DA0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2011 00001DB0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2012 00001DC0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2013 00001DD0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2014 00001DE0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2015 00001DF0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2016 00001E00: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2017 00001E10: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2018 00001E20: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2019 00001E30: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2020 00001E40: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2021 00001E50: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2022 00001E60: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2023 00001E70: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2024 00001E80: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2025 00001E90: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2026 00001EA0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2027 00001EB0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2028 00001EC0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 FF FE FD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2029 00001ED0: FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0 EF EE ED ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2030 00001EE0: EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 DF DE DD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2031 00001EF0: DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CF CE CD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2032 00001F00: CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 BF BE BD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2033 00001F10: BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2034 00001F20: AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 9F 9E 9D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2035 00001F30: 9C 9B 9A 99 98 97 96 95 94 93 92 91 90 8F 8E 8D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2036 00001F40: 8C 8B 8A 89 88 87 86 85 84 83 82 81 80 7F 7E 7D ..............~}
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2037 00001F50: 7C 7B 7A 79 78 77 76 75 74 73 72 71 70 6F 6E 6D \|{zyxwvutsrqponm
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2038 00001F60: 6C 6B 6A 69 68 67 66 65 64 63 62 61 60 5F 5E 5D lkjihgfedcba`_^]
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2039 00001F70: 5C 5B 5A 59 58 57 56 55 54 53 52 51 50 4F 4E 4D \[ZYXWVUTSRQPONM
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2040 00001F80: 4C 4B 4A 49 48 47 46 45 44 43 42 41 40 3F 3E 3D LKJIHGFEDCBA@?>=
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2041 00001F90: 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D <;:9876543210/.-
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2042 00001FA0: 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1D ,+*)('&%$#"! ...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2043 00001FB0: 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D ................
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2044 00001FC0: 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 58 FF FF .............X..
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2045 00001FD0: 00 50 FF FF 00 07 00 0E 00 15 00 1C 00 2A 00 00 .P...........*..
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2046 00001FE0: 24 F0 1F E5 24 F0 1F E5 24 F0 1F E5 24 F0 1F E5 $...$...$...$...
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2047 00001FF0: 24 F0 1F E5 24 F0 1F E5 24 F0 1F E5 00 00 00 03 $...$...$.......
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2048
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	2049 ; The filler ends at 0x1FCC. Then we've got some data words:
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2050
4 a821df9c4457 boot ROM re: got as far as UART init Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 3 diff changeset	2051 ; base addresses of the two UARTs
18 123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	2052 1fcc: ffff5800 ; MODEM
123cb5021b64 boot ROM re: appears to be complete! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 17 diff changeset	2053 1fd0: ffff5000 ; IrDA
8 a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2054 ; UART baud rates
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2055 1fd4: 0700 ; /7 (115200?)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2056 1fd6: 0e00 ; /14 (57600?)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2057 1fd8: 1500 ; /21 (38400?)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2058 1fda: 1c00 ; /28 (28800?)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2059 1fdc: 2a00 ; /42 (19200?)
a06573cacb6e boot ROM re: trying to understand the code that runs after '<' received Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 6 diff changeset	2060 1fde: 0000
1 4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2061
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2062 ; These ldr-jump instructions get copied to the 7 internal RAM words
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2063 ; starting at 0x80001C. They have the effect of defining the preceding
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2064 ; 7 words (0x800000-0x800018 inclusive) as address-type vectors for the
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2065 ; exceptions, such that one can hook an exception either by replacing
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2066 ; the ldr-jump instruction in the 0x80001C-0x800034 window with a branch
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2067 ; to the desired handler, or by sticking the absolute address of that
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2068 ; desired handler into the 0x800000-0x800018 window.
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2069
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2070 1fe0: e51ff024 ldr pc, [pc, #-36] ; 0x1fc4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2071 1fe4: e51ff024 ldr pc, [pc, #-36] ; 0x1fc8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2072 1fe8: e51ff024 ldr pc, [pc, #-36] ; 0x1fcc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2073 1fec: e51ff024 ldr pc, [pc, #-36] ; 0x1fd0
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2074 1ff0: e51ff024 ldr pc, [pc, #-36] ; 0x1fd4
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2075 1ff4: e51ff024 ldr pc, [pc, #-36] ; 0x1fd8
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2076 1ff8: e51ff024 ldr pc, [pc, #-36] ; 0x1fdc
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2077 ; ???
4b5e22875181 beginning of boot ROM reverse eng Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2078 1ffc: 03000000 tsteq r0, #0 ; 0x0

FreeCalypso > hg > freecalypso-reveng

annotate bootrom.disasm @ 18:123cb5021b64