FreeCalypso > hg > freecalypso-reveng
annotate bootrom.notes @ 16:383a4ef12551
boot ROM re: getting the download state machine, <p parsed
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
---|---|
date | Thu, 25 Apr 2013 03:16:17 +0000 |
parents | 3443b1b08af4 |
children | d2206cb5f8b4 |
rev | line source |
---|---|
7
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
1 Application images in flash: |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
2 |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
3 In order for the nCS0 flash content to be considered a valid bootable image |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
4 (i.e., for the boot ROM to transfer control to it, rather than wait forever |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
5 for a UART download), the 32-bit word at address 0x2000 (the first word |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
6 after the ROM-overlaid portion) must contain either 0 or 1, corresponding |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
7 to two supported environment options: |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
8 |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
9 * If the word at 0x2000 equals 0, it signifies an application image that is |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
10 designed to run with the boot ROM still mapped at 0, with ARM exceptions |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
11 vectoring through the 7 magic RAM locations at 0x80001C, and possibly |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
12 through the 2nd level ("user-friendly") vector table at 0x800000 as well. |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
13 |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
14 If the word at 0x2000 equals 0, the following word at 0x2004 must contain |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
15 the absolute address of the boot entry point; the boot ROM will transfer |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
16 control to that address with the FFFF:FB10 register set to explicitly map |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
17 the internal boot ROM at 0. It is a BX-style address: setting the least |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
18 significant bit will result in control being transferred in the Thumb state. |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
19 |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
20 * If the word at 0x2000 equals 1, it signifies an application image that is |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
21 at least conceptually independent of the Calypso boot ROM - one that would, |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
22 at least in theory, function correctly with nIBOOT tied/pulled/driven HIGH, |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
23 or even on an older DBB chip with no internal boot ROM. |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
24 |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
25 When the boot ROM code sees a 1 in the 0x2000 word, it copies a little piece |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
26 of code into the internal ROM and runs it there; this code sets the FFFF:FB10 |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
27 register to disable the internal boot ROM (map the external nCS0 memory at 0, |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
28 as if nIBOOT were high) and causes the watchdog timer to go off, resetting |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
29 the ARM core and causing it to execute the external nCS0 reset vector. |
a445735685ba
boot ROM re: flash application image interface documented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
3
diff
changeset
|
30 |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
31 UART protocol |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
32 |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
33 The external host initiates every operation by sending a command to the |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
34 Calypso target running the boot ROM code. Every command begins with '<' and |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
35 a lowercase ASCII letter; just the initial '<' is sufficient to interrupt |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
36 the flash image autoboot. The external host shound send these commands at |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
37 19200 baud, 8N1, and the boot ROM will intuit whether the Calypso is being |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
38 clocked with 13 or 26 MHz by trying the two possible clocking setups |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
39 alternately, with the UART baud rate registers set to /42 in both cases, |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
40 until a clean '<' is received. |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
41 |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
42 Once the initial '<' has been received on either UART, the boot ROM only |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
43 listens on that port from there onward. There is a timeout between the |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
44 successive bytes of a single command, but the ROM will wait forever |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
45 for another '<'. |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
46 |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
47 Commands: |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
48 |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
49 <a |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
50 |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
51 <b |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
52 |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
53 Followed by 4 bytes, giving a 32-bit value in MSB-first order. The value is |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
54 written to 80052C, and the 0x2c8 function returns code 6. |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
55 |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
56 <c |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
57 |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
58 <i |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
59 |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
60 Calls the 0x11c routine, then responds with '>i'. |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
61 |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
62 <p |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
63 |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
64 Followed by 9 bytes: |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
65 1 byte: goes into var at 800518, selects the baud rate: |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
66 0: 115200 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
67 1: 57600 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
68 2: 38400 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
69 3: 28800 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
70 4: 19200 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
71 1 byte: goes into var at 800521, controls the 0xef4 routine: |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
72 bits <6:2>: R2 arg (PLL_MULT field) |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
73 bits <1:0>: R1 arg (PLL_DIV field) |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
74 2 bytes: 16-bit MSB-first value goes into var at 800522 |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
75 word gives arguments to 0xe2c routine, breaks down as follows: |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
76 bit 15: unused |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
77 <14:10> arg3 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
78 <9:5> arg2 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
79 <4:0> arg1 |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
80 1 byte: goes into var at 800525 |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
81 remaining arguments to 0xe2c: |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
82 <7:4> arg5 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
83 <3:0> arg4 |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
84 4 bytes: 32-bit MSG-first value goes into var at 80051C |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
85 reloads the UART timeout variable 800104 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
86 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
87 Good response: >p 00 04 (4 bytes total) |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
88 The baud rate is switched after the above response is sent. |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
89 |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
90 Error response: >P |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
91 |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
92 <w |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
93 |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
94 Followed by: |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
95 1 byte: block number (of this block) |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
96 1 byte: total # of blocks |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
97 2 bytes: # of payload bytes in this block (MSB first) |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
98 4 bytes: load address for this block (MSB first) |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
99 data |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
100 |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
101 for a single block (both bytes after <w set to 01), the maximum allowed |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
102 payload length is 1015 (0x3F7) bytes. |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
103 |
3
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
104 RAM layout: |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
105 |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
106 800000 7 words: |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
107 soft-vector pointers: by default the following 7 words at |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
108 80001C are filled with ldr-jump instructions, which read |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
109 from these 7 words and load them into PC |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
110 80001C 7 words: |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
111 hard vectors: the physical vector locations in the ROM |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
112 contain branch instructions to these 7 RAM addresses |
8
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
113 800038: The helper routine for transferring control to type 1 flash images |
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
114 is copied to and run here. |
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
115 800100: the last word of the above routine |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
116 800104: word initialized to 0x0001D4C0 - tells the 0x2c8 routine |
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
117 how long to wait for a character |
3
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
118 800108: byte initialized to 0x01 |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
119 state variable for the serial command interface |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
120 in the initial state of 01, only <i and <p are accepted |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
121 state 02: after successful <p, <w is allowed |
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
122 state 03: after first successful <w? |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
123 80010C: all bytes of a '<w' command after these two command chars |
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
124 are stored starting here |
14
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
125 this buffer is also used for other scratchpad functions: <p |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
126 command bytes, all response messages |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
127 80050B: the above buffer ends here |
3
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
128 |
14
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
129 The group of vars starting at 800518 may have been envisioned |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
130 as a struct - see the routine at 0x11c: |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
131 |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
132 800518: byte variable receives the first parameter byte after '<p' |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
133 baud rate code ([0,4] range) |
14
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
134 init to 04 by '<i' |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
135 80051C: 32-bit var set by the '<p' command |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
136 reloads the UART timeout variable 800104 |
8
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
137 800520: byte variable filled every time the 0xfb4 routine is called |
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
138 holds the ID of the UART on which '<' came in, or FF if none |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
139 800521: byte variable receives the 2nd parameter byte after '<p' |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
140 PLL config |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
141 800522: 16-bit var set by the '<p' command |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
142 chip select wait state config |
8
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
143 800524: byte variable filled every time the 0xfb4 routine is called |
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
144 filled with a copy of 800534 |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
145 800525: byte var set by the '<p' command |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
146 config for the FFFF:F900 register (0xe2c routine) |
14
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
147 800526: 16-bit var init to 0 by 0x11c ('<i' handler) |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
148 byte following the '<c' command is extended to a half-word and |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
149 written here |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
150 800528: 16-bit var init to 0 by 0x11c ('<i' handler) |
16
383a4ef12551
boot ROM re: getting the download state machine, <p parsed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
14
diff
changeset
|
151 checksum accum? |
8
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
152 |
14
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
153 80052C: 32-bit var init to 0 by 0x11c ('<i' handler) |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
154 word holds the argument of the '<b' command |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
155 800530: byte indicates validity of the received '<w' command: |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
156 0 means valid, 1 means something bad |
3443b1b08af4
boot ROM re: starting to unravel the serial command handling
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
13
diff
changeset
|
157 init to 0 by 0x11c |
12
25b016d16602
boot ROM re: making inroads into the 0x2c8 routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
8
diff
changeset
|
158 |
8
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
159 800534: byte initialized to 0x00, then may be set to 1 by the 0xfb4 |
a06573cacb6e
boot ROM re: trying to understand the code that runs after '<' received
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
7
diff
changeset
|
160 routine if it selects /1 clock mode. |
3
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
161 |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
162 8005C0: appears to be the intended low address (bottom) of the stack |
e3f8fe6a848e
boot ROM re: started on main() and the 0xe2c routine
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
163 80074C: top of the stack (initial value loaded into SP) |
13
e0ce45f043c0
boot ROM re: continuing plowing through the serial protocol code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
12
diff
changeset
|
164 800750: lowest address at which user code may be loaded |