FreeCalypso > hg > freecalypso-reveng

annotate pirelli/32khz @ 361:5d1c186cc3cf

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fluid-mnf/target-bin/cmd39.m0: hand-crafted by copying cmd.m0 and manually patching the S3 record that contains the 16-bit word at 0x1140, the literal pool DPLL init constant used by hardware_init_calypso()
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 14 Mar 2020 19:33:52 +0000
parents 3147e960aeff
children
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196
3147e960aeff pirelli/32khz: investigative note checked in
Michael Spacefalcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
1 Let's see if Pirelli's PCB layout implements the "special" GND for the 32 kHz
3147e960aeff pirelli/32khz: investigative note checked in
Michael Spacefalcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
2 oscillator like TI's schematics and app notes indicate.
3147e960aeff pirelli/32khz: investigative note checked in
Michael Spacefalcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
3
3147e960aeff pirelli/32khz: investigative note checked in
Michael Spacefalcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
4 VSSO ball (A14): no trace on L1, so must be a micro-via right under the ball
3147e960aeff pirelli/32khz: investigative note checked in
Michael Spacefalcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
5 itself. L1 coord (3640,1049). GND side of the cap for V-RTC power balls:
3147e960aeff pirelli/32khz: investigative note checked in
Michael Spacefalcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
6 micro-vias at (3435,970) and (3458,980).