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annotate arm7dis/armdis.c @ 88:691551f0635b

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armdis: implemented decoding of data processing instructions
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 29 Mar 2014 20:28:13 +0000
parents f7fba8518fa2
children c5d52666d2eb
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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537cf2245d98 beginning of ARM7 disassembler
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1 #include <sys/types.h>
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2 #include <stdio.h>
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3 #include <stdlib.h>
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4
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5 extern char *binfilename;
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6 extern u_char *filemap;
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7 extern unsigned disasm_len, base_vma;
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8
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9 extern unsigned get_u16(), get_u32();
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10
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11 extern char *regnames[16], *condition_decode[16];
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12
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13 static char *dataproc_ops[16] = {"and", "eor", "sub", "rsb",
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14 "add", "adc", "sbc", "rsc",
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15 "tst", "teq", "cmp", "cmn",
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16 "orr", "mov", "bic", "mvn"};
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17 static char *shift_types[4] = {"lsl", "lsr", "asr", "ror"};
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18
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19 static void
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20 arm_branch(off, word)
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21 unsigned off, word;
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22 {
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23 unsigned dest;
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24
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25 dest = (word & 0x00FFFFFF) << 2;
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26 if (dest & 0x02000000)
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27 dest |= 0xFC000000;
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28 dest += base_vma + off + 8;
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29 printf("b%s%s\t0x%x\n", word&0x1000000 ? "l" : "",
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30 condition_decode[word>>28], dest);
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31 }
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32
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33 static void
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34 op2_immed(word)
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35 unsigned word;
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36 {
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37 unsigned low8, rot, val;
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38
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39 low8 = word & 0xFF;
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40 rot = (word & 0xF00) >> 7;
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41 val = (low8 << (32 - rot)) | (low8 >> rot);
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42 if (val <= 9)
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43 printf("#%u\n", val);
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44 else
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45 printf("#%u\t; 0x%x\n", val, val);
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46 }
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47
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48 static void
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49 op2_regbyconst(word)
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50 unsigned word;
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51 {
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52 unsigned c, t;
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53
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54 c = (word >> 7) & 0x1F;
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55 t = (word >> 5) & 3;
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56 if (!c) {
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57 switch (t) {
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58 case 0:
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59 printf("%s\n", regnames[word&0xF]);
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60 return;
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61 case 3:
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62 printf("%s, rrx\n", regnames[word&0xF]);
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63 return;
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64 default:
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65 c = 32;
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66 }
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67 }
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68 printf("%s, %s #%u\n", regnames[word&0xF], shift_types[t], c);
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69 }
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70
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71 static void
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72 op2_regbyreg(word)
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73 unsigned word;
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74 {
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75 printf("%s, %s %s\n", regnames[word&0xF], shift_types[(word>>5)&3],
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76 regnames[(word>>8)&0xF]);
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77 }
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78
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79 static void
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80 op2_regshift(word)
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81 unsigned word;
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82 {
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83 if (word & 0x10)
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84 op2_regbyreg(word);
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85 else
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86 op2_regbyconst(word);
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87 }
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88
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89 static void
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90 dataproc_op2(word)
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91 unsigned word;
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92 {
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93 if (word & 0x02000000)
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94 op2_immed(word);
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95 else
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96 op2_regshift(word);
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97 }
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98
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99 static void
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100 dataproc_74_overlay(off, word)
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101 unsigned off, word;
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102 {
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103 printf("<dataproc overlay with 7&4 set>\n");
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104 }
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105
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106 static void
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107 dataproc_tstcmp_overlay(off, word)
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108 unsigned off, word;
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109 {
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110 printf("<dataproc overlay with S=0 for tst/cmp>\n");
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111 }
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112
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113 static void
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114 dataproc(off, word)
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115 unsigned off, word;
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116 {
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117 unsigned opc;
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118
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119 opc = (word >> 21) & 0xF;
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120 switch (opc) {
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121 case 0:
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122 case 1:
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123 case 2:
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124 case 3:
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125 case 4:
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126 case 5:
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127 case 6:
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128 case 7:
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129 case 0xC:
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130 case 0xE:
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131 printf("%s%s%s\t%s, %s, ", dataproc_ops[opc],
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132 condition_decode[word>>28], word&0x100000 ? "s" : "",
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133 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]);
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134 dataproc_op2(word);
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135 return;
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136 case 0xD:
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137 case 0xF:
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138 printf("%s%s%s\t%s, ", dataproc_ops[opc],
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139 condition_decode[word>>28], word&0x100000 ? "s" : "",
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diff changeset
140 regnames[(word>>12)&0xF]);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
141 dataproc_op2(word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
142 return;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
143 case 8:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
144 case 9:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
145 case 0xA:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
146 case 0xB:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
147 if (word & 0x100000) {
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
148 printf("%s%s\t%s, ", dataproc_ops[opc],
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
149 condition_decode[word>>28],
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
150 regnames[(word>>16)&0xF]);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
151 dataproc_op2(word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
152 } else
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
153 dataproc_tstcmp_overlay(off, word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
154 return;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
155 }
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
156 }
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
157
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 void
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 arm_disasm_line(off)
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
160 unsigned off;
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 {
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
162 unsigned word;
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 word = get_u32(filemap + off);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165 printf("%8x:\t%08x\t", base_vma + off, word);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 if ((word >> 28) == 0xF) {
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
167 printf("invalid-F\n");
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 return;
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 }
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
170 switch ((word >> 24) & 0xF) {
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
171 case 0:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
172 case 1:
88
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
173 if ((word & 0x90) == 0x90)
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
174 dataproc_74_overlay(off, word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
175 else
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
176 dataproc(off, word);
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
177 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
178 case 2:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
179 case 3:
88
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
180 dataproc(off, word);
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
181 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
182 case 4:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
183 case 5:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
184 printf("<ldr/str, immediate offset>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
185 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
186 case 6:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
187 case 7:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
188 printf("<ldr/str, register offset>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
189 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
190 case 8:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
191 case 9:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
192 printf("<ldm/stm>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
193 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
194 case 0xA:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
195 case 0xB:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
196 arm_branch(off, word);
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
197 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
198 case 0xC:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
199 case 0xD:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
200 case 0xE:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
201 printf("<COPROCESSOR>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
202 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
203 case 0xF:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
204 printf("swi%s\t0x%x\n", condition_decode[word>>28],
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
205 word & 0xFFFFFF);
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
206 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
207 }
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208 }
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 main(argc, argv)
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211 char **argv;
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212 {
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
213 unsigned off;
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 common_init(argc, argv, 4);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 for (off = 0; off < disasm_len; off += 4)
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 arm_disasm_line(off);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 exit(0);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 }