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annotate arm7dis/armdis.c @ 89:c5d52666d2eb

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armdis: BX/MRS/MSR decoding implemented
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 29 Mar 2014 21:36:22 +0000
parents 691551f0635b
children f68d8e7a904f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 #include <sys/types.h>
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2 #include <stdio.h>
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3 #include <stdlib.h>
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4 #include <string.h>
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5 #include <strings.h>
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6
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7 extern char *binfilename;
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8 extern u_char *filemap;
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9 extern unsigned disasm_len, base_vma;
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10
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11 extern unsigned get_u16(), get_u32();
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12
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13 extern char *regnames[16], *condition_decode[16];
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14
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15 static char *dataproc_ops[16] = {"and", "eor", "sub", "rsb",
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16 "add", "adc", "sbc", "rsc",
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17 "tst", "teq", "cmp", "cmn",
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18 "orr", "mov", "bic", "mvn"};
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19 static char *shift_types[4] = {"lsl", "lsr", "asr", "ror"};
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20
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21 static void
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22 arm_branch(off, word)
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23 unsigned off, word;
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24 {
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25 unsigned dest;
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26
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27 dest = (word & 0x00FFFFFF) << 2;
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28 if (dest & 0x02000000)
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29 dest |= 0xFC000000;
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30 dest += base_vma + off + 8;
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31 printf("b%s%s\t0x%x\n", word&0x1000000 ? "l" : "",
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32 condition_decode[word>>28], dest);
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33 }
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34
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35 static void
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36 op2_immed(word)
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37 unsigned word;
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38 {
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39 unsigned low8, rot, val;
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40
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41 low8 = word & 0xFF;
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42 rot = (word & 0xF00) >> 7;
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43 val = (low8 << (32 - rot)) | (low8 >> rot);
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44 if (val <= 9)
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45 printf("#%u\n", val);
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46 else
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47 printf("#%u\t; 0x%x\n", val, val);
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48 }
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49
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50 static void
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51 op2_regbyconst(word)
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52 unsigned word;
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53 {
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54 unsigned c, t;
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55
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56 c = (word >> 7) & 0x1F;
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57 t = (word >> 5) & 3;
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58 if (!c) {
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59 switch (t) {
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60 case 0:
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61 printf("%s\n", regnames[word&0xF]);
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62 return;
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63 case 3:
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64 printf("%s, rrx\n", regnames[word&0xF]);
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65 return;
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66 default:
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67 c = 32;
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68 }
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69 }
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70 printf("%s, %s #%u\n", regnames[word&0xF], shift_types[t], c);
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71 }
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72
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73 static void
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74 op2_regbyreg(word)
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75 unsigned word;
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76 {
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77 printf("%s, %s %s\n", regnames[word&0xF], shift_types[(word>>5)&3],
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78 regnames[(word>>8)&0xF]);
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79 }
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80
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81 static void
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82 op2_regshift(word)
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83 unsigned word;
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84 {
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85 if (word & 0x10)
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86 op2_regbyreg(word);
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87 else
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88 op2_regbyconst(word);
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89 }
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90
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91 static void
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92 dataproc_op2(word)
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93 unsigned word;
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94 {
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95 if (word & 0x02000000)
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96 op2_immed(word);
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97 else
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98 op2_regshift(word);
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99 }
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100
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101 static void
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102 dataproc_74_overlay(off, word)
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103 unsigned off, word;
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104 {
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105 printf("<dataproc overlay with 7&4 set>\n");
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106 }
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107
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108 static void
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109 dataproc_tstcmp_overlay(off, word)
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110 unsigned off, word;
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111 {
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112 char msrmask[5], *cp;
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113
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114 if ((word & 0x0FFFFFF0) == 0x012FFF10) {
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115 printf("bx%s\t%s\n", condition_decode[word>>28],
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116 regnames[word&0xF]);
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117 return;
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118 } else if ((word & 0x0FBF0FFF) == 0x010F0000) {
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119 printf("mrs%s\t%s, %cPSR\n", condition_decode[word>>28],
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120 regnames[(word>>12)&0xF], word&0x400000 ? 'S' : 'C');
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121 return;
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122 } else if ((word & 0x0DB0F000) == 0x0120F000) {
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123 if (!(word & 0x02000000) && (word & 0xFF0)) {
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124 printf("<invalid MSR>\n");
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125 return;
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126 }
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127 if (word & 0xF0000) {
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128 cp = msrmask;
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129 if (word & 0x80000)
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130 *cp++ = 'f';
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131 if (word & 0x40000)
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132 *cp++ = 's';
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133 if (word & 0x20000)
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134 *cp++ = 'x';
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135 if (word & 0x10000)
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136 *cp++ = 'c';
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
137 *cp = '\0';
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
138 } else
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
139 strcpy(msrmask, "null");
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
140 printf("msr%s\t%cPSR_%s, ", condition_decode[word>>28],
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
141 word&0x400000 ? 'S' : 'C', msrmask);
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
142 dataproc_op2(word);
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
143 return;
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
144 }
c5d52666d2eb armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 88
diff changeset
145 printf("<invalid BX/MRS/MSR>\n");
88
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
146 }
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
147
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
148 static void
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
149 dataproc(off, word)
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
150 unsigned off, word;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
151 {
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
152 unsigned opc;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
153
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
154 opc = (word >> 21) & 0xF;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
155 switch (opc) {
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
156 case 0:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
157 case 1:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
158 case 2:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
159 case 3:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
160 case 4:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
161 case 5:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
162 case 6:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
163 case 7:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
164 case 0xC:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
165 case 0xE:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
166 printf("%s%s%s\t%s, %s, ", dataproc_ops[opc],
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
167 condition_decode[word>>28], word&0x100000 ? "s" : "",
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
168 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
169 dataproc_op2(word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
170 return;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
171 case 0xD:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
172 case 0xF:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
173 printf("%s%s%s\t%s, ", dataproc_ops[opc],
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
174 condition_decode[word>>28], word&0x100000 ? "s" : "",
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
175 regnames[(word>>12)&0xF]);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
176 dataproc_op2(word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
177 return;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
178 case 8:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
179 case 9:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
180 case 0xA:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
181 case 0xB:
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
182 if (word & 0x100000) {
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
183 printf("%s%s\t%s, ", dataproc_ops[opc],
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
184 condition_decode[word>>28],
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
185 regnames[(word>>16)&0xF]);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
186 dataproc_op2(word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
187 } else
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
188 dataproc_tstcmp_overlay(off, word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
189 return;
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
190 }
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
191 }
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
192
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 void
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 arm_disasm_line(off)
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
195 unsigned off;
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 {
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
197 unsigned word;
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199 word = get_u32(filemap + off);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200 printf("%8x:\t%08x\t", base_vma + off, word);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201 if ((word >> 28) == 0xF) {
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
202 printf("invalid-F\n");
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 return;
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 }
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
205 switch ((word >> 24) & 0xF) {
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
206 case 0:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
207 case 1:
88
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
208 if ((word & 0x90) == 0x90)
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
209 dataproc_74_overlay(off, word);
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
210 else
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
211 dataproc(off, word);
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
212 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
213 case 2:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
214 case 3:
88
691551f0635b armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 87
diff changeset
215 dataproc(off, word);
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
216 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
217 case 4:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
218 case 5:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
219 printf("<ldr/str, immediate offset>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
220 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
221 case 6:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
222 case 7:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
223 printf("<ldr/str, register offset>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
224 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
225 case 8:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
226 case 9:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
227 printf("<ldm/stm>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
228 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
229 case 0xA:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
230 case 0xB:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
231 arm_branch(off, word);
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
232 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
233 case 0xC:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
234 case 0xD:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
235 case 0xE:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
236 printf("<COPROCESSOR>\n");
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
237 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
238 case 0xF:
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
239 printf("swi%s\t0x%x\n", condition_decode[word>>28],
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
240 word & 0xFFFFFF);
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
241 return;
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
242 }
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 }
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245 main(argc, argv)
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 char **argv;
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 {
87
f7fba8518fa2 armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 86
diff changeset
248 unsigned off;
86
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 common_init(argc, argv, 4);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 for (off = 0; off < disasm_len; off += 4)
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 arm_disasm_line(off);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 exit(0);
537cf2245d98 beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 }