FreeCalypso > hg > freecalypso-schem2
diff venus/src/usb/usb_xtal_wrap.v @ 67:8f3df7a222f5
change USB 6.0 MHz crystal to a smaller part
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Dec 2021 01:35:34 +0000 |
| parents | venus/src/core/xtal_32khz_wrap.v@3ed0f7a9c489 |
| children |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/usb/usb_xtal_wrap.v Thu Dec 02 01:35:34 2021 +0000 @@ -0,0 +1,16 @@ +/* + * This Verilog module encapsulates the PCB footprint + * for our 6.0 MHz USB crystal. + */ + +module usb_xtal_wrap (electrode1, electrode2, GND); + +input electrode1, electrode2, GND; + +xtal_4pin_pkg xtal (.pin_1(electrode1), + .pin_2(GND), + .pin_3(electrode2), + .pin_4(GND) + ); + +endmodule