annotate gsm-fw/L1/cfile/l1_init.c @ 985:8109185528c1

tfc139: new logic actually works
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sat, 12 Dec 2015 03:24:52 +0000
parents a418c48046ad
children 908566db1538
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1 /************ Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_INIT.C
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4 *
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5 * Filename l1_init.c
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 #define L1_INIT_C
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11
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12 #include "config.h"
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13 #include "l1_confg.h"
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14
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15 #if (CODE_VERSION == SIMULATION)
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16 #include <string.h>
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17 #include "l1_types.h"
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18 #include "sys_types.h"
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19 #include "l1_const.h"
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20 #include "l1_time.h"
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21 #include "l1_signa.h"
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22
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23 #if TESTMODE
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24 #include "l1tm_defty.h"
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25 #endif
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26 #if (AUDIO_TASK == 1)
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27 #include "l1audio_const.h"
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28 #include "l1audio_cust.h"
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29 #include "l1audio_defty.h"
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30 #endif
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31 #if (L1_GTT == 1)
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32 #include "l1gtt_const.h"
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33 #include "l1gtt_defty.h"
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34 #endif
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35
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36 #if (L1_MP3 == 1)
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37 #include "l1mp3_defty.h"
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38 #endif
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39
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40 #if (L1_MIDI == 1)
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41 #include "l1midi_defty.h"
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42 #endif
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43 //ADDED FOR AAC
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44 #if (L1_AAC == 1)
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45 #include "l1aac_defty.h"
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46 #endif
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47 #if (L1_DYN_DSP_DWNLD == 1)
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48 #include "l1_dyn_dwl_proto.h"
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49 #endif
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50
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51 #include "l1_defty.h"
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52 #include "cust_os.h"
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53 #include "l1_msgty.h"
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54 #include "l1_varex.h"
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55 #include "l1_proto.h"
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56 #include "l1_mftab.h"
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57 #include "l1_tabs.h"
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58 #include "l1_ver.h"
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59 #include "ulpd.h"
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60
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61 #include "l1_proto.h"
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62
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63 #if L1_GPRS
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64 #include "l1p_cons.h"
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65 #include "l1p_msgt.h"
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66 #include "l1p_deft.h"
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67 #include "l1p_vare.h"
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68 #include "l1p_tabs.h"
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69 #include "l1p_macr.h"
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70 #include "l1p_ver.h"
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71 #endif
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72
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73 #if TESTMODE
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74 #include "l1tm_ver.h"
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75 #endif
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76
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77 #include <stdio.h>
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78 #include "sim_cfg.h"
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79 #include "sim_cons.h"
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80 #include "sim_def.h"
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81 #include "sim_var.h"
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82
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83 #else // NO SIMULATION
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84
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85 #include <string.h>
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86 /* #include "tm_defs.h" */
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87 #include "l1_types.h"
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88 #include "sys_types.h"
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89 #include "../dsp/leadapi.h"
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90 #include "l1_const.h"
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91 #include "l1_macro.h"
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92 #include "l1_time.h"
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93 #include "l1_signa.h"
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94 #if (AUDIO_TASK == 1)
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95 #include "l1audio_const.h"
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96 #include "l1audio_cust.h"
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97 #include "l1audio_defty.h"
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98 #endif
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99
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100
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101 #include "../../bsp/abb+spi/spi_drv.h"
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102 #include "../../bsp/abb+spi/abb.h"
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103 #if (ANALOG != 11)
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104 #include "../../bsp/abb+spi/abb_core_inth.h"
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105 #endif
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106
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107 #if TESTMODE
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108 #include "l1tm_defty.h"
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109 #endif
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110
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111 #if (L1_GTT == 1)
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112 #include "l1gtt_const.h"
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113 #include "l1gtt_defty.h"
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114 #endif
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115
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116 #if (L1_MP3 == 1)
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117 #include "l1mp3_defty.h"
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118 #endif
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119
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120 #if (L1_MIDI == 1)
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121 #include "l1midi_defty.h"
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122 #endif
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diff changeset
123 //ADDED FOR AAC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 #if (L1_AAC == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 #include "l1aac_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 #if (L1_DYN_DSP_DWNLD == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 #include "l1_dyn_dwl_proto.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 #include "l1_defty.h"
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
132 #include "../../gpf/inc/cust_os.h"
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 #include "l1_msgty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 #include "l1_varex.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 #include "l1_proto.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136 #include "l1_mftab.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 #include "l1_tabs.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138 #include "l1_ver.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 #include "tpudrv.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142 #include "sys_inth.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 #else
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
144 #include "../../bsp/mem.h"
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
145 #include "../../bsp/inth.h"
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
146 #include "../../bsp/dma.h"
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
147 #include "../../bsp/iq.h"
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
150 #include "../../bsp/clkm.h"
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
151 #include "../../bsp/rhea_arm.h"
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
152 #include "../../bsp/ulpd.h"
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 #include "l1_proto.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 #include "l1p_cons.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 #include "l1p_msgt.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 #include "l1p_deft.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 #include "l1p_vare.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 #include "l1p_tabs.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 #include "l1p_macr.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163 #include "l1p_ver.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 #if TESTMODE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 #include "l1tm_ver.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 #if (RF_FAM == 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 #if (DRP_FW_EXT==0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 #include "drp_drive.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 #include "drp_api.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 #include "l1_rf61.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 #include "apc.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 #include "l1_rf61.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 #include "l1_drp_inc.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187 #if (RF_FAM == 60)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 #include "drp_drive.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 #include "drp_api.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190 #include "l1_rf60.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 #if (TRACE_TYPE == 1)||(TRACE_TYPE == 4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 #include "l1_trace.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197 #include <string.h>
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198 #include <stdio.h>
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
200 #if (ANALOG == 11)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201 #include "bspTwl3029_I2c.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202 #include "bspTwl3029_Aud_Map.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 #include "bspTwl3029_Madc.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 #endif
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
205
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
206 #if (RF_FAM == 61)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207 //OMAPS148175
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208 #include "l1_drp_if.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209 #include "drp_main.h"
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
210 #endif
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
211
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
212 #if (ANALOG == 11)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213 #if (L1_MADC_ON == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214 extern BspTwl3029_MadcResults l1_madc_results;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 extern void l1a_madc_callback(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 #if(OP_L1_STANDALONE == 1 || L1_NAVC == 1 )//NAVC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 extern UWORD32 Cust_navc_ctrl_status(UWORD8 d_navc_start_stop_read);//NAVC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221 #if (AUDIO_DEBUG == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222 extern UWORD8 audio_reg_read_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227 #if (AUDIO_TASK == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228 /**************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229 /* External audio prototypes */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230 /**************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231 extern void l1audio_initialize_var (void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234 extern void l1audio_dsp_init (void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 extern void initialize_wait_loop(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 // external functions from GPRS implementation
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 void initialize_l1pvar(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240 void l1pa_reset_cr_freq_list(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241 #endif // L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 #if ((OP_L1_STANDALONE == 1) && ((DSP == 38)|| (DSP == 39))&& (CODE_VERSION != SIMULATION))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 extern void l1_api_dump(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
246 #if (TRACE_TYPE==3)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 void reset_stats();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 #endif // TRACE_TYPE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 #if (L1_GTT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 extern void l1gtt_initialize_var(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 #if (L1_MP3 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 extern void l1mp3_initialize_var(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 #if (L1_MIDI == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 extern void l1midi_initialize_var(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261 //ADDED FOR AAC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 #if (L1_AAC == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263 extern void l1aac_initialize_var(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266 #if ((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==4) || (TRACE_TYPE==7))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267 extern void L1_trace_string(char *s);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 #if (RF_FAM == 60 || RF_FAM == 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271 extern const UWORD8 drp_ref_sw[] ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272 extern T_DRP_REGS_STR *drp_regs;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273 extern T_DRP_SRM_API* drp_srm_api;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
274
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275 extern T_DRP_SW_DATA drp_sw_data_calib;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
276 extern T_DRP_SW_DATA drp_sw_data_init;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
277
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
278 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 /* l1_dsp_init() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285 /* Functionality : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 void l1_dsp_init(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 //int i;-OMAPS90550- new
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 // L1S <-> DSP communication...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 l1s_dsp_com.dsp_ndb_ptr = &(buf.ndb);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 l1s_dsp_com.dsp_db_r_ptr = &(buf.mcu_rd[0]);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
295 l1s_dsp_com.dsp_db_w_ptr = &(buf.mcu_wr[0]);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
296 l1s_dsp_com.dsp_param_ptr = &(buf.param);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297 l1s_dsp_com.dsp_w_page = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 l1s_dsp_com.dsp_r_page = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299 l1s_dsp_com.dsp_r_page_used = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
300
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
301 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
302 l1ps_dsp_com.pdsp_ndb_ptr = &(buf.ndb_gprs);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
303 l1ps_dsp_com.pdsp_db_r_ptr = &(buf.mcu_rd_gprs[0]);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
304 l1ps_dsp_com.pdsp_db_w_ptr = &(buf.mcu_wr_gprs[0]);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
305 l1ps_dsp_com.pdsp_param_ptr = &(buf.param_gprs);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
306 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
307
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308 // Reset DSP page bit and DSP enable bit...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 l1s_tpu_com.reg_cmd->dsp_enb_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 l1s_tpu_com.reg_cmd->dsp_pag_bit = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313 // Set EOTD bit if required
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 #if (L1_EOTD ==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
316 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_EOTD;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
317 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
318
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
319
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
320 #else // NO SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
321
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
322 // L1S <-> DSP communication...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
323 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
324 l1s_dsp_com.dsp_ndb_ptr = (T_NDB_MCU_DSP *) NDB_ADR;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 l1s_dsp_com.dsp_db_r_ptr = (T_DB_DSP_TO_MCU *) DB_R_PAGE_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 l1s_dsp_com.dsp_db_w_ptr = (T_DB_MCU_TO_DSP *) DB_W_PAGE_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
327 l1s_dsp_com.dsp_param_ptr = (T_PARAM_MCU_DSP *) PARAM_ADR;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
328 l1s_dsp_com.dsp_w_page = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329 l1s_dsp_com.dsp_r_page = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330 l1s_dsp_com.dsp_r_page_used = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
331
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
332 #if (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 l1s_dsp_com.dsp_db_common_w_ptr = (T_DB_COMMON_MCU_TO_DSP *)DB_COMMON_W_PAGE_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
334 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 /* DSP CPU load measurement */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337 #if (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 l1s_dsp_com.dsp_cpu_load_db_w_ptr = (T_DB_MCU_TO_DSP_CPU_LOAD *)DSP_CPU_LOAD_DB_W_PAGE_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339 (*((volatile UWORD16 *)(DSP_CPU_LOAD_MCU_W_CTRL))) = (API)0x0001; // enable DSP CPU load measurement
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
341
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
343 l1ps_dsp_com.pdsp_ndb_ptr = (T_NDB_MCU_DSP_GPRS *) NDB_ADR_GPRS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
344 l1ps_dsp_com.pdsp_db_r_ptr = (T_DB_DSP_TO_MCU_GPRS *) DB_R_PAGE_0_GPRS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
345 l1ps_dsp_com.pdsp_db_w_ptr = (T_DB_MCU_TO_DSP_GPRS *) DB_W_PAGE_0_GPRS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
346 l1ps_dsp_com.pdsp_param_ptr = (T_PARAM_MCU_DSP_GPRS *) PARAM_ADR_GPRS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
347 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
348
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
349 #if (DSP_DEBUG_TRACE_ENABLE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
350 l1s_dsp_com.dsp_db2_current_r_ptr = (T_DB2_DSP_TO_MCU *) DB2_R_PAGE_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
351 l1s_dsp_com.dsp_db2_other_r_ptr = (T_DB2_DSP_TO_MCU *) DB2_R_PAGE_1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
352 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
353
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
354 // Reset DSP page bit and DSP enable bit...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
355 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357 (*(volatile UWORD16 *)l1s_tpu_com.reg_cmd) &= ~TPU_CTRL_D_ENBL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
359 #if (DSP >= 33)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 l1s_dsp_com.dsp_ndb_ptr->d_dsp_page = l1s_dsp_com.dsp_w_page;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362 l1s_dsp_com.dsp_param_ptr->d_dsp_page = l1s_dsp_com.dsp_w_page;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
363 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365 // NDB init : Reset buffers and set flags...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
367 l1s_dsp_com.dsp_ndb_ptr->d_fb_mode = FB_MODE_1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 l1s_dsp_com.dsp_ndb_ptr->d_fb_det = FALSE; // D_FB_DET =0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 l1s_dsp_com.dsp_ndb_ptr->a_cd[0] = (1<<B_FIRE1); // B_FIRE1 =1, B_FIRE0 =0 , BLUD =0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 l1s_dsp_com.dsp_ndb_ptr->a_dd_0[0] = 0; // BLUD = 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371 l1s_dsp_com.dsp_ndb_ptr->a_dd_0[2] = 0xffff; // NERR = 0xffff
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 l1s_dsp_com.dsp_ndb_ptr->a_dd_1[0] = 0; // BLUD = 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373 l1s_dsp_com.dsp_ndb_ptr->a_dd_1[2] = 0xffff; // NERR = 0xffff
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374 l1s_dsp_com.dsp_ndb_ptr->a_du_0[0] = 0; // BLUD = 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 l1s_dsp_com.dsp_ndb_ptr->a_du_0[2] = 0xffff; // NERR = 0xffff
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 l1s_dsp_com.dsp_ndb_ptr->a_du_1[0] = 0; // BLUD = 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 l1s_dsp_com.dsp_ndb_ptr->a_du_1[2] = 0xffff; // NERR = 0xffff
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
378 l1s_dsp_com.dsp_ndb_ptr->a_fd[0] = (1<<B_FIRE1); // B_FIRE1 =1, B_FIRE0 =0 , BLUD =0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379 l1s_dsp_com.dsp_ndb_ptr->a_fd[2] = 0xffff; // NERR = 0xffff
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 l1s_dsp_com.dsp_ndb_ptr->d_a5mode = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
382 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (ANALOG == 11))
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode = 0x0800; // Analog base band selected = Nausica, Iota, Syren (bit 11)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
385
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
386 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
387 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= (((l1_config.params.guard_bits - 4) & 0x000F) << 7); //Bit 7..10: guard bits
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388 #endif
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
389 #if (ANALOG == 11)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= (((l1_config.params.guard_bits) & 0x000F) << 7); //Bit 7..10: guard bits
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393 #if (DSP == 32)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= 0x2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 #endif // OP_WCP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
397 l1s_dsp_com.dsp_ndb_ptr->a_sch26[0] = (1<<B_SCH_CRC);// B_SCH_CRC =1, BLUD =0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 l1audio_dsp_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400 #if IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 l1s_dsp_com.dsp_ndb_ptr->d_ra_conf = 0; // IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402 l1s_dsp_com.dsp_ndb_ptr->d_ra_act = 0; // IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403 l1s_dsp_com.dsp_ndb_ptr->d_ra_test = 0; // IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404 l1s_dsp_com.dsp_ndb_ptr->d_ra_statu = 0; // IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 l1s_dsp_com.dsp_ndb_ptr->d_ra_statd = 0; // IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406 l1s_dsp_com.dsp_ndb_ptr->d_fax = 0; // IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
407 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409 #if(RF_FAM != 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410 // interrupt rif TX on FIFO <= threshold with threshold = 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 l1s_dsp_com.dsp_ndb_ptr->d_spcx_rif = 0x179;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 // l1s_dsp_com.dsp_ndb_ptr->d_spcx_rif = 0x179; TBD put hte replacement here... Danny
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 // Initialize V42b variables
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419 l1s_dsp_com.dsp_ndb_ptr->d_v42b_nego0 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420 l1s_dsp_com.dsp_ndb_ptr->d_v42b_nego1 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421 l1s_dsp_com.dsp_ndb_ptr->d_v42b_control = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422 l1s_dsp_com.dsp_ndb_ptr->d_v42b_ratio_ind = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 l1s_dsp_com.dsp_ndb_ptr->d_mcu_control = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 l1s_dsp_com.dsp_ndb_ptr->d_mcu_control_sema = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426 #if !(W_A_DSP_SR_BGD)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 // Initialize background control variable to No background. Background tasks can be launch in GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 // as in GSM.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429 l1s_dsp_com.dsp_ndb_ptr->d_max_background = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433 #if (DSP == 36) || (DSP == 37)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 // Initialize GEA module
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435 l1ps_dsp_com.pdsp_ndb_ptr->d_gea_mode = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 // Initialize background control variable to No background
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442 l1ps_dsp_com.pdsp_ndb_ptr->d_max_background = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 l1ps_dsp_com.pdsp_ndb_ptr->d_sched_mode_gprs = GSM_SCHEDULER;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449 // Initialize the poll response buffer to "no poll request"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450 l1ps_dsp_com.pdsp_ndb_ptr->a_pu_gprs[0][0] = CS_NONE_TYPE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451 #else // L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452 #if ((DSP == 31) || (DSP == 32) || (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 l1s_dsp_com.dsp_ndb_ptr->d_sched_mode_gprs_ovly = GSM_SCHEDULER;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 #endif // L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 // Set EOTD bit if required
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458 //=============================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 #if (L1_EOTD ==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_EOTD;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461 #endif // L1_EOTD
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463 #if (DSP == 33)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464 #if DCO_ALGO
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 // Set DCO bit
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466 if (l1_config.params.dco_enabled == TRUE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
467 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_DCO_ON;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471 // DCO algo in case of DSP 17/32
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472 #if (DCO_ALGO == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473 #if ((DSP == 17)||(DSP == 32))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_DCO_ON;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475 #endif // DSP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476 #endif // DCO_ALGO
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
478 #if ((DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38)) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
479 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[0] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[1] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[2] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[3] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
485 #if (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
486 l1s_dsp_com.dsp_ndb_ptr->d_thr_onset_afs = 400; // thresh detection ONSET AFS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
487 l1s_dsp_com.dsp_ndb_ptr->d_thr_sid_first_afs = 150; // thresh detection SID_FIRST AFS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
488 l1s_dsp_com.dsp_ndb_ptr->d_thr_ratscch_afs = 450; // thresh detection RATSCCH AFS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
489 l1s_dsp_com.dsp_ndb_ptr->d_thr_update_afs = 300; // thresh detection SID_UPDATE AFS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
490 l1s_dsp_com.dsp_ndb_ptr->d_thr_onset_ahs = 200; // thresh detection ONSET AHS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
491 l1s_dsp_com.dsp_ndb_ptr->d_thr_sid_ahs = 150; // thresh detection SID frames AHS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
492 l1s_dsp_com.dsp_ndb_ptr->d_thr_ratscch_marker = 500; // thresh detection RATSCCH MARKER
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
493 l1s_dsp_com.dsp_ndb_ptr->d_thr_sp_dgr = 3; // thresh detection SPEECH DEGRADED/NO_DATA
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
494 l1s_dsp_com.dsp_ndb_ptr->d_thr_soft_bits = 0; // thresh detection SPEECH DEGRADED/NO_DATA
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
495 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
496
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
497 #if ((DSP==36 || (DSP == 37) || (DSP == 38) || (DSP == 39))&&(W_A_AMR_THRESHOLDS==1))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
498 // init of the afs thresholds parameters
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[0]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[1]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[2]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[3]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[4]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[5]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[6]=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[7]=1950;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508 // init of the ahs thresholds parameters
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[0]=1500;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[1]=1500;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
511 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[2]=1500;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[3]=1500;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[4]=1500;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[5]=1500;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
517 // init of of the threshold for USF detection
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 #if (L1_FALSE_USF_DETECTION == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 2300;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
521 l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
523
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525 #if (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530 #if ((CHIPSET == 15) || (CHIPSET == 12) || (CHIPSET == 4) || ((CHIPSET == 10) && (OP_WCP == 1))) // Calypso+ or Perseus2 or locosto
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531 #if (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532 // Note: for locosto there is only one MCSI port
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533 l1s_dsp_com.dsp_ndb_ptr->d_mcsi_select = MCSI_PORT1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536 #if(DSP == 36) || (DSP == 37)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537 l1s_dsp_com.dsp_ndb_ptr->d_vol_ul_level = 0x1000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538 l1s_dsp_com.dsp_ndb_ptr->d_vol_dl_level = 0x1000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539 l1s_dsp_com.dsp_ndb_ptr->d_vol_speed = 0x68;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540 l1s_dsp_com.dsp_ndb_ptr->d_sidetone_level = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542 #endif // ((CHIPSET == 15) || (CHIPSET == 12) || (CHIPSET == 4) || ((CHIPSET == 10) && (OP_WCP == 1)))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544 // DB Init DB : Reset all pages, set TX power and reset SCH buffer...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545 //====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 l1s_reset_db_mcu_to_dsp((T_DB_MCU_TO_DSP *) DB_W_PAGE_0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 l1s_reset_db_mcu_to_dsp((T_DB_MCU_TO_DSP *) DB_W_PAGE_1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548 l1s_reset_db_dsp_to_mcu((T_DB_DSP_TO_MCU *) DB_R_PAGE_0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549 l1s_reset_db_dsp_to_mcu((T_DB_DSP_TO_MCU *) DB_R_PAGE_1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550 #if (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551 l1s_reset_db_common_mcu_to_dsp((T_DB_COMMON_MCU_TO_DSP *) DB_COMMON_W_PAGE_0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552 l1s_reset_db_common_mcu_to_dsp((T_DB_COMMON_MCU_TO_DSP *) DB_COMMON_W_PAGE_1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 #endif // NO_SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557 #if ((DSP==17)||(DSP == 32))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558 // init the DC offset values
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
559 l1s_dsp_com.dsp_ndb_ptr->d_dco_type = 0x0000; // Tide off
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 l1s_dsp_com.dsp_ndb_ptr->p_start_IQ = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561 l1s_dsp_com.dsp_ndb_ptr->d_level_off = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562 l1s_dsp_com.dsp_ndb_ptr->d_dco_dbg = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
563 l1s_dsp_com.dsp_ndb_ptr->d_tide_resa = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566 //Initialize DSP DCO
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567 #if (((DSP == 38) || (DSP == 39)) && (RF_FAM == 61))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568 l1s_dsp_com.dsp_ndb_ptr->d_dco_samples_per_symbol = C_DCO_SAMPLES_PER_SYMBOL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 l1s_dsp_com.dsp_ndb_ptr->d_dco_fcw = C_DCO_FCW;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571 // APCDEL1 will be initialized on rach only ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
572 l1s_dsp_com.dsp_ndb_ptr->d_apcdel1 = l1_config.params.apcdel1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
573 l1s_dsp_com.dsp_ndb_ptr->d_apcdel2 = l1_config.params.apcdel2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 // APCCTRL2 alone initialize on the next TDMA frame possible
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575 l1ddsp_apc_load_apcctrl2(l1_config.params.apcctrl2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
576
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
577 l1dapc_init_ramp_tables();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579 #if ((FF_REPEATED_SACCH == 1) || (FF_REPEATED_DL_FACCH == 1 ))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
580
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
581 /* Chase combining feature flag Initialise */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
582 l1s_dsp_com.dsp_ndb_ptr->d_chase_comb_ctrl |= 0x0001;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
583 #endif /* FF_REPEATED_SACCH or FF_REPEATED_DL_FACCH */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
584
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
585 #endif // DSP == 38
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
586
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
587 // Intialize the AFC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
588 #if (DSP == 38) || (DSP == 39)
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
589 #if (CODE_VERSION != SIMULATION)
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
590 l1s_dsp_com.dsp_ndb_ptr->d_drp_afc_add_api = C_DRP_DCXO_XTAL_DSP_ADDRESS;
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
591 #endif
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
592
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
593 #if (L1_DRP_IQ_SCALING == 1)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
594 l1s_dsp_com.dsp_ndb_ptr->d_dsp_iq_scaling_factor = 1;
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
595 #else
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
596 l1s_dsp_com.dsp_ndb_ptr->d_dsp_iq_scaling_factor = 0;
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
597 #endif
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
598 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
599
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
600 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
601
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
602 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
603 /* l1_tpu_init() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
604 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
605 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
606 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
607 /* Functionality : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
608 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
609 void l1_tpu_init(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
610 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
611 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
612 // L1S -> TPU communication...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
613 //=============================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
614 l1s_tpu_com.tpu_w_page = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
615 l1s_tpu_com.tpu_page_ptr = &(tpu.buf[l1s_tpu_com.tpu_w_page].line[0]);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
616 l1s_tpu_com.reg_cmd = (T_reg_cmd*) &(hw.reg_cmd);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
617 l1s_tpu_com.reg_com_int = &(hw.reg_com_int);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
618 l1s_tpu_com.offset = &(hw.offset);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
619
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
620 // Reset TPU.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
621 //=============================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
622 *(l1s_tpu_com.offset) = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
623 *(l1s_tpu_com.reg_com_int) = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
624 l1s_tpu_com.reg_cmd->tpu_idle_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
625 l1s_tpu_com.reg_cmd->tpu_enb_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
626 l1s_tpu_com.reg_cmd->tpu_stat_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
627 l1s_tpu_com.reg_cmd->tpu_reset_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
628 l1s_tpu_com.reg_cmd->tpu_pag_bit = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
629
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
630 // Init. OFFSET and SYNC registers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
631 //================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
632 l1s_tpu_com.reg_cmd->tpu_reset_bit = ON; // bit TPU_RESET active
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
633 l1dmacro_synchro(IMM, 0); // OFFSET=SYNCHRO=0 without any AT
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
634 l1dtpu_end_scenario(); // Close TPU scenario
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
635
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
636 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
637 // bit TPU_RESET set
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
638 // OFFSET and SYNCHRO initialized at 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
639 // TSP_ACT bits reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
640 // Sleep added and TPU_ENABLE set...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
641 l1dmacro_init_hw();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
642
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
643 l1s_tpu_com.reg_cmd = (UWORD16 *) TPU_CTRL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
644 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
645 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
646
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
647 void l1_tpu_init_light(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
648 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
649 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
650 // L1S -> TPU communication...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
651 //=============================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
652 l1s_tpu_com.tpu_w_page = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
653 l1s_tpu_com.tpu_page_ptr = &(tpu.buf[l1s_tpu_com.tpu_w_page].line[0]);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
654 l1s_tpu_com.reg_cmd = (T_reg_cmd*) &(hw.reg_cmd);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
655 l1s_tpu_com.reg_com_int = &(hw.reg_com_int);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
656 l1s_tpu_com.offset = &(hw.offset);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
657
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
658 // Reset TPU.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
659 //=============================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
660 *(l1s_tpu_com.offset) = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
661 *(l1s_tpu_com.reg_com_int) = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
662 l1s_tpu_com.reg_cmd->tpu_idle_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
663 l1s_tpu_com.reg_cmd->tpu_enb_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
664 l1s_tpu_com.reg_cmd->tpu_stat_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
665 l1s_tpu_com.reg_cmd->tpu_reset_bit = OFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
666 l1s_tpu_com.reg_cmd->tpu_pag_bit = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
667
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
668 // Init. OFFSET and SYNC registers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
669 //================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
670 l1s_tpu_com.reg_cmd->tpu_reset_bit = ON; // bit TPU_RESET active
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
671 l1dmacro_synchro(IMM, 0); // OFFSET=SYNCHRO=0 without any AT
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
672 l1dtpu_end_scenario(); // Close TPU scenario
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
673
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
674 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
675 // bit TPU_RESET set
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
676 // OFFSET and SYNCHRO initialized at 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
677 // TSP_ACT bits reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
678 // Sleep added and TPU_ENABLE set...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
679 l1dmacro_init_hw_light();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
680
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
681 l1s_tpu_com.reg_cmd = (UWORD16 *) TPU_CTRL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
682 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
683 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
684
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
685 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
686 /* l1_abb_power_on() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
687 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
688 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
689 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
690 /* Functionality : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
691 /* Initialize the global structure for spi communication */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
692 /* with ABB. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
693 /* Set up ABB connection (CLK 13M free) */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
694 /* Aknowledge the ABB status register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
695 /* Configure ABB modules */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
696 /* Program the ramp parameters into the NDB */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
697 /* Load in the NDB registers' value to be programmed in */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
698 /* ABB at first communication it */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
699 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
700
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
701 //Locosto This funciton would change drastically due to Triton introduction and instead of SPI we have i2c
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
702 void l1_abb_power_on(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
703 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
704 #if (CODE_VERSION != SIMULATION)
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
705 #if (CHIPSET != 15)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
706 T_SPI_DEV *Abb;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
707 T_SPI_DEV init_spi_device;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
708 UWORD16 Abb_Status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
709 T_NDB_MCU_DSP * dsp_ndb_ptr;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
710
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
711 Abb = &init_spi_device; /* Pointer initialization to device communication structure */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
712 Abb->PrescVal = SPI_CLOCK_DIV_1; /* ABB transmission parameters initialization */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
713 Abb->DataTrLength = SPI_WNB_15;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
714 Abb->DevAddLength = 5;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
715 Abb->DevId = ABB;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
716 Abb->ClkEdge = SPI_CLK_EDG_RISE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
717 Abb->TspEnLevel = SPI_NTSPEN_NEG_LEV;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
718 Abb->TspEnForm = SPI_NTSPEN_LEV_TRIG;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
719
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
720 SPI_InitDev(Abb); /* Initialize the spi to work with ABB */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
721
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
722 ABB_free_13M(); /* Set up Abb connection (CLK 13M free).*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
723 Abb_Status = ABB_Read_Status(); /* Aknowledge the Abb status register. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
724
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
725 /*------------------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
726 /* Add here SW to manage Abb VRPCSTS status register informations */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
727 /*------------------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
728
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
729 ABB_Read_Register_on_page(PAGE0,ITSTATREG); /* Aknowledge the interrupt status register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
730 /* to clear any pending interrupt */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
731
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
732 ABB_on(AFC | MADC, l1a_l1s_com.recovery_flag);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
733
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
734 // ADC init: Configuration of the channels to be converted and enable the ADC Interrupt
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
735 ABB_Conf_ADC(ALL,EOC_INTENA);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
736
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
737 //in case of reset due to a recovery process do not create the HISR
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
738 if (l1a_l1s_com.recovery_flag == FALSE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
739 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
740 Create_ABB_HISR();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
741 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
742
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
743 // Load RAMP up/down in NDB memory...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
744 dsp_ndb_ptr = (T_NDB_MCU_DSP *) NDB_ADR;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
745
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
746 if (l1_config.tx_pwr_code == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
747 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
748 Cust_get_ramp_tab(dsp_ndb_ptr->a_ramp,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
749 0 /* not used */,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
750 0 /* not used */,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
751 1 /* arbitrary value for arfcn*/);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
752 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
753 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
754 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
755 Cust_get_ramp_tab(dsp_ndb_ptr->a_ramp,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
756 5 /* arbitrary value working in any case */,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
757 5 /* arbitrary value working in any case */,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
758 1 /* arbitrary value for arfcn*/);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
759 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
760 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
761
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
762
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
763 #if (ANALOG == 1)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
764 // Omega registers values will be programmed at 1st DSP communication interrupt
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
765
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
766 dsp_ndb_ptr->d_debug1 = l1_config.params.debug1; // Enable f_tx delay of 400000 cyc DEBUG
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
767 dsp_ndb_ptr->d_afcctladd = l1_config.params.afcctladd; // Value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
768 dsp_ndb_ptr->d_vbuctrl = l1_config.params.vbuctrl; // Uplink gain amp 0dB, Sidetone gain to mute
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
769 dsp_ndb_ptr->d_vbdctrl = l1_config.params.vbdctrl; // Downlink gain amp 0dB, Volume control 0 dB
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
770 dsp_ndb_ptr->d_bbctrl = l1_config.params.bbctrl; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
771 dsp_ndb_ptr->d_apcoff = l1_config.params.apcoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
772 dsp_ndb_ptr->d_bulioff = l1_config.params.bulioff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
773 dsp_ndb_ptr->d_bulqoff = l1_config.params.bulqoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
774 dsp_ndb_ptr->d_dai_onoff = l1_config.params.dai_onoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
775 dsp_ndb_ptr->d_auxdac = l1_config.params.auxdac; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
776 dsp_ndb_ptr->d_vbctrl = l1_config.params.vbctrl; // VULSWITCH=0, VDLAUX=1, VDLEAR=1.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
777
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
778 // APCDEL1 will be initialized on rach only ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
779 dsp_ndb_ptr->d_apcdel1 =l1_config.params.apcdel1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
780
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
781 #if (DSP >= 33)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
782 // To increase the robustness the IOTA register are reseted to 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
783 // if OMEGA, NAUSICA is used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
784 dsp_ndb_ptr->d_bulgcal = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
785 dsp_ndb_ptr->d_vbctrl2 = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
786 dsp_ndb_ptr->d_apcdel2 = 0x0000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
787 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
788 #endif
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
789 #if (ANALOG == 2)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
790 // Iota registers values will be programmed at 1st DSP communication interrupt
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
791
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
792 dsp_ndb_ptr->d_debug1 = l1_config.params.debug1; // Enable f_tx delay of 400000 cyc DEBUG
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
793 dsp_ndb_ptr->d_afcctladd = l1_config.params.afcctladd; // Value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
794 dsp_ndb_ptr->d_vbuctrl = l1_config.params.vbuctrl; // Uplink gain amp 0dB, Sidetone gain to mute
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
795 dsp_ndb_ptr->d_vbdctrl = l1_config.params.vbdctrl; // Downlink gain amp 0dB, Volume control 0 dB
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
796 dsp_ndb_ptr->d_bbctrl = l1_config.params.bbctrl; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
797 dsp_ndb_ptr->d_bulgcal = l1_config.params.bulgcal; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
798 dsp_ndb_ptr->d_apcoff = l1_config.params.apcoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
799 dsp_ndb_ptr->d_bulioff = l1_config.params.bulioff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
800 dsp_ndb_ptr->d_bulqoff = l1_config.params.bulqoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
801 dsp_ndb_ptr->d_dai_onoff = l1_config.params.dai_onoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
802 dsp_ndb_ptr->d_auxdac = l1_config.params.auxdac; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
803 dsp_ndb_ptr->d_vbctrl1 = l1_config.params.vbctrl1; // VULSWITCH=0, VDLAUX=1, VDLEAR=1.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
804 dsp_ndb_ptr->d_vbctrl2 = l1_config.params.vbctrl2; // MICBIASEL=0, VDLHSO=0, MICAUX=0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
805
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
806 // APCDEL1 will be initialized on rach only ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
807 dsp_ndb_ptr->d_apcdel1 =l1_config.params.apcdel1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
808 dsp_ndb_ptr->d_apcdel2 = l1_config.params.apcdel2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
809 #endif
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
810 #if (ANALOG == 3)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
811 // Syren registers values will be programmed at 1st DSP communication interrupt
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
812
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
813 dsp_ndb_ptr->d_debug1 = l1_config.params.debug1; // Enable f_tx delay of 400000 cyc DEBUG
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
814 dsp_ndb_ptr->d_afcctladd = l1_config.params.afcctladd; // Value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
815 dsp_ndb_ptr->d_vbuctrl = l1_config.params.vbuctrl; // Uplink gain amp 0dB, Sidetone gain to mute
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
816 dsp_ndb_ptr->d_vbdctrl = l1_config.params.vbdctrl; // Downlink gain amp 0dB, Volume control 0 dB
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
817 dsp_ndb_ptr->d_bbctrl = l1_config.params.bbctrl; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
818 dsp_ndb_ptr->d_bulgcal = l1_config.params.bulgcal; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
819 dsp_ndb_ptr->d_apcoff = l1_config.params.apcoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
820 dsp_ndb_ptr->d_bulioff = l1_config.params.bulioff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
821 dsp_ndb_ptr->d_bulqoff = l1_config.params.bulqoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
822 dsp_ndb_ptr->d_dai_onoff = l1_config.params.dai_onoff; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
823 dsp_ndb_ptr->d_auxdac = l1_config.params.auxdac; // value at reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
824 dsp_ndb_ptr->d_vbctrl1 = l1_config.params.vbctrl1; // VULSWITCH=0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
825 dsp_ndb_ptr->d_vbctrl2 = l1_config.params.vbctrl2; // MICBIASEL=0, VDLHSO=0, MICAUX=0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
826
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
827 // APCDEL1 will be initialized on rach only ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
828 dsp_ndb_ptr->d_apcdel1 = l1_config.params.apcdel1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
829 dsp_ndb_ptr->d_apcdel2 = l1_config.params.apcdel2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
830
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
831 // Additional registers management brought by SYREN
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
832 dsp_ndb_ptr->d_vbpop = l1_config.params.vbpop; // HSOAUTO enabled only
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
833 dsp_ndb_ptr->d_vau_delay_init = l1_config.params.vau_delay_init; // vaud_init_delay init 2 frames
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
834 dsp_ndb_ptr->d_vaud_cfg = l1_config.params.vaud_cfg; // Init to zero
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
835 dsp_ndb_ptr->d_vauo_onoff = l1_config.params.vauo_onoff; // Init to zero
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
836 #if ((L1_AUDIO_MCU_ONOFF == 1)&&(OP_L1_STANDALONE == 1)&&(CHIPSET == 12))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
837 ABB_Write_Register_on_page(PAGE1, VAUOCTRL, 0x0015A);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
838 #endif // E Sample testing of audio on off
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
839 dsp_ndb_ptr->d_vaus_vol = l1_config.params.vaus_vol; // Init to zero
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
840 dsp_ndb_ptr->d_vaud_pll = l1_config.params.vaud_pll; // Init to zero
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
841 dsp_ndb_ptr->d_togbr2 = 0; // TOGBR2 initial value handled by the DSP (this value doesn't nake any sense)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
842
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
843 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
844
548
67ab5f240b7d gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 544
diff changeset
845 #if (ANALOG == 11)
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
846 // The following settings need to be done only in L1 StandALoen as PSP would
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
847 // do in the case of full PS Build...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
848
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
849 //Set the CTRL3 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
850 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
851 l1_config.params.ctrl3,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
852
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
853 #if (OP_L1_STANDALONE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
854 // THESE REGISTERS ARE INITIALIZED IN STANDALONE AND PS BUILDS FOR AUDIO PATH
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
855
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
856 // ************ START REG INIT FOR PS build/STANDALONE *************
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
857 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_TOGB_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
858 0x15,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
859 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_VULGAIN_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
860 l1_config.params.vulgain,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
861 //Set the VDLGAIN register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
862 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_VDLGAIN_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
863 l1_config.params.vdlgain,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
864 //Set the SIDETONE register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
865 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_SIDETONE_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
866 l1_config.params.sidetone,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
867 //Set the CTRL1 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
868 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
869 l1_config.params.ctrl1,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
870 //Set the CTRL2 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
871 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
872 l1_config.params.ctrl2,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
873
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
874 //Set the CTRL4 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
875 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL4_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
876 l1_config.params.ctrl4,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
877 //Set the CTRL5 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
878 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL5_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
879 l1_config.params.ctrl5,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
880 //Set the CTRL6 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
881 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL6_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
882 l1_config.params.ctrl6,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
883 //Set the POPAUTO register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
884 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_POPAUTO_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
885 l1_config.params.popauto,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
886
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
887 // ************ END REG INIT FOR PS build/STANDALONE ****************
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
888
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
889
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
890
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
891 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
892 l1_config.params.outen1,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
893 //Set the OUTEN2 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
894 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
895 l1_config.params.outen2,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
896 //Set the OUTEN3 register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
897 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
898 l1_config.params.outen3,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
899
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
900
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
901
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
902 //Set the AUDLGAIN register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
903 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_AUDLGAIN_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
904 l1_config.params.aulga,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
905 //Set the AUDRGAIN register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
906 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_AUDRGAIN_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
907 l1_config.params.aurga,NULL);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
908 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
909
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
910
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
911 #if (OP_L1_STANDALONE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
912 #if (L1_MADC_ON == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
913 //MADC Real time initialization for all the 11 ADCs
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
914 bspTwl3029_Madc_enableRt( NULL, 0x7ff, l1a_madc_callback, &l1_madc_results);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
915 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
916 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
917
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
918 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
919 #endif //CODE_VERSION != SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
920 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
921
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
922 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
923 /* l1_pwr_mgt_init() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
924 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
925 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
926 /* ------------- */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
927 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
928 /* ------------- */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
929 /* Description : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
930 /* ------------- */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
931 /* This routine is used to initialize the gauging */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
932 /* related variables. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
933 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
934 void l1_pwr_mgt_init(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
935 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
936
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
937 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
938 // Power management variables
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
939 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
940
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
941 // flags for wake-up ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
942 l1s.pw_mgr.Os_ticks_required = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
943 l1s.pw_mgr.frame_adjust = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
944 l1s.pw_mgr.wakeup_time = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
945
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
946 // variables for sleep ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
947 l1s.pw_mgr.sleep_duration = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
948 l1s.pw_mgr.sleep_performed = DO_NOT_SLEEP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
949 l1s.pw_mgr.modules_status = 0; // all clocks ON
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
950 l1s.pw_mgr.paging_scheduled = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
951
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
952 #if 0 /* removed in FreeCalypso */
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
953 // variable for afc bypass mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
954 l1s.pw_mgr.afc_bypass_mode = AFC_BYPASS_MODE;
563
a418c48046ad L1: l1_init.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 548
diff changeset
955 #endif
544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
956
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
957 // 32 Khz gauging ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
958 l1s.pw_mgr.gaug_count = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
959 l1s.pw_mgr.enough_gaug = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
960 //Nina modify to save power, not forbid deep sleep, only force gauging in next paging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
961 l1s.force_gauging_next_paging_due_to_CCHR = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
962 l1s.pw_mgr.gauging_task = INACTIVE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
963
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
964 // GAUGING duration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
965 #if (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
966 if (l1_config.dpll <8 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
967 l1s.pw_mgr.gaug_duration = 9; // 9 frames (no more CTRL with DSP)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
968 else // with a dpll >= 104Mhz the HF counter is too small: gauging limitation to 6 frames.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
969 #if(CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
970 // Gauging duration could be reduced to 4 frames (from 5 frames) as fast paging (FF_L1_FAST_DECODING) is available
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
971 l1s.pw_mgr.gaug_duration = 4; // 4 frames
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
972 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
973 l1s.pw_mgr.gaug_duration = 6; // 6 frames
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
974 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
975 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
976 l1s.pw_mgr.gaug_duration = 11; // 1CTRL + 9 frames +1CTRL
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
977 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
978
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
979
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
980 //-------------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
981 // INIT state:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
982 // 32.768Khz is in the range [-500 ppm,+100 ppm]
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
983 // due to temperature variation.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
984 // LF_100PPM = 32.7712768 Khz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
985 // LF_500PPM = 32.751616 Khz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
986 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
987 // ACQUIS STATE :
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
988 // 32.768Khz variations allowed from INIT value
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
989 // are [-50 ppm,+50ppm]. Same delta on ideal 32khz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
990 // during 9 frames (gauging duration) represents 1348*T32.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
991 // LF_50PPM = 32.7696384 Khz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
992 // 1348/32.768 - 1348/32.7696384 = 0.002056632 ms
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
993 // At 78 Mhz it means : 0.002056632ms/0.000012820513ms= 160 T
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
994 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
995 // UPDATE state :
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
996 // allowed variations are [-6 ppm,+6ppm] jitter
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
997 // LF_6PPM = 32.76819661 Khz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
998 // 1348/32.768 - 1348/32.76819661 = 0.00024691 ms
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
999 // At 78 Mhz it means : 0.00024691 / 0.000012820513ms= 19 T
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1000 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1001 // 78 Mhz 65 Mhz 84.5 Mhz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1002 // ===========================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1003 // C_CLK_MIN 2380 1983 2578
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1004 // C_CLK_INIT_MIN 8721 29113 31293
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1005 // C_CLK_MAX 2381 1984 2580
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1006 // C_CLK_INIT_MAX 36823 41608 1662
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1007 // C_DELTA_HF_ACQUIS 160 130 173
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1008 // C_DELTA_HF_UPDATE 19 15 20
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1009 //-------------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1010 #if ((CHIPSET == 2) || (CHIPSET == 3) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1011 l1s.pw_mgr.c_clk_min = C_CLK_MIN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1012 l1s.pw_mgr.c_clk_init_min = C_CLK_INIT_MIN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1013 l1s.pw_mgr.c_clk_max = C_CLK_MAX;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1014 l1s.pw_mgr.c_clk_init_max = C_CLK_INIT_MAX;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1015 l1s.pw_mgr.c_delta_hf_acquis = C_DELTA_HF_ACQUIS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1016 l1s.pw_mgr.c_delta_hf_update = C_DELTA_HF_UPDATE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1017 #elif ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1018 // 78000/32.7712768 = 2380.13308
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1019 l1s.pw_mgr.c_clk_min = (UWORD32)((l1_config.dpll*MCUCLK)/LF_100PPM);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1020 // 0.13308*2^16
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1021 l1s.pw_mgr.c_clk_init_min =(UWORD32) ((UWORD32)((UWORD32)(((UWORD32)(l1_config.dpll*MCUCLK))-
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1022 (l1s.pw_mgr.c_clk_min*LF_100PPM))*
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1023 65536)/LF_100PPM); //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1024
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1025 // 78000/32.751616 = 2381.561875
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1026 l1s.pw_mgr.c_clk_max = (UWORD32)((l1_config.dpll*MCUCLK)/LF_500PPM); //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1027 // 0.561875*2^16
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1028 l1s.pw_mgr.c_clk_init_max =(UWORD32)((UWORD32)(((double)(l1_config.dpll*MCUCLK)-
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1029 (double)(l1s.pw_mgr.c_clk_max*LF_500PPM))*
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1030 65536)/LF_500PPM);//omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1031
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1032 // remember hf is expressed in nbr of clock in hz (ex 65Mhz,104Mhz)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1033 l1s.pw_mgr.c_delta_hf_acquis =(UWORD32) (((GAUG_IN_32T/LF)-(GAUG_IN_32T/LF_50PPM))*(l1_config.dpll*MCUCLK));//omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1034 l1s.pw_mgr.c_delta_hf_update =(UWORD32)( ((GAUG_IN_32T/LF)-(GAUG_IN_32T/LF_6PPM ))*(l1_config.dpll*MCUCLK));//omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1035 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1036
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1037 } /* l1_pwr_mgt_init() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1038
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1039 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1040 /* l1_initialize_var() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1041 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1042 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1043 /* ------------- */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1044 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1045 /* ------------- */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1046 /* Description : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1047 /* ------------- */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1048 /* This routine is used to initialize the l1a, l1s and */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1049 /* l1a_l1s_com global structures. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1050 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1051 void l1_initialize_var(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1052 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1053 UWORD32 i;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1054 UWORD8 task_id;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1055
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1056 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1057 // Power management variables
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1058 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1059 l1_pwr_mgt_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1060
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1061 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1062 // Reset "l1s" structure.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1063 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1064
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1065 // time counter used for debug and by L3 scenario...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1066 l1s.debug_time = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1067
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1068 // L1S tasks management...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1069 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1070 for(task_id=0; task_id<NBR_DL_L1S_TASKS; task_id++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1071 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1072 if (!((task_id == ADC_CSMODE0) && (l1a_l1s_com.recovery_flag != FALSE)))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1073 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1074 l1s.task_status[task_id].new_status = NOT_PENDING;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1075 l1s.task_status[task_id].current_status = INACTIVE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1076 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1077 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1078 l1s.frame_count = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1079 l1s.forbid_meas = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1080 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1081 l1s.tcr_prog_done=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1082 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1083 #if (AUDIO_DEBUG == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1084 audio_reg_read_status=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1085 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1086 // MFTAB management variables...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1087 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1088 l1s.afrm = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1089 l1s_clear_mftab(l1s.mftab.frmlst);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1090
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1091 // Controle parameters... (miscellaneous)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1092 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1093 #if (RF_FAM != 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1094 l1s.afc = ((WORD16)l1_config.params.eeprom_afc>>3); //F13.3 -> F16.0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1095 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1096 #if (RF_FAM == 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1097 l1s.afc = ((WORD16)l1_config.params.eeprom_afc>>2); //F13.3 -> F14.0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1098 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1099
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1100
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1101 l1s.afc_frame_count = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1102
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1103 #if (TOA_ALGO == 2)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1104 l1s.toa_var.toa_shift = ISH_INVALID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1105 l1s.toa_var.toa_snr_mask = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1106 l1s.toa_var.toa_frames_counter = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1107 l1s.toa_var.toa_accumul_counter = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1108 l1s.toa_var.toa_accumul_value = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1109 l1s.toa_var.toa_update_fn = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1110 l1s.toa_var.toa_update_flag = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1111 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1112 l1s.toa_shift = ISH_INVALID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1113 l1s.toa_snr_mask = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1114 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1115 l1s.toa_period_count = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1116 l1s.toa_update = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1117 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1118 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1119
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1120 #if (L1_GPRS == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1121 l1s.algo_change_synchro_active = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1122 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1123
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1124 #if (L1_RF_KBD_FIX == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1125 l1s.total_kbd_on_time = 5000;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1126 l1s.correction_ratio = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1127 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1128 /* Initialising the repeated SACCH variables */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1129 #if (FF_REPEATED_SACCH == 1 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1130 l1s.repeated_sacch.srr = 0;/* SACCH Repetiton Request */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1131 l1s.repeated_sacch.sro = 0;/* SACCH Repetiton Order */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1132 l1s.repeated_sacch.buffer_empty = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1133 #endif /* FF_REPEATED_SACCH ==1*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1134
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1135 #if (FF_REPEATED_DL_FACCH == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1136 l1s.repeated_facch.pipeline[0].buffer_empty=l1s.repeated_facch.pipeline[1].buffer_empty=TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1137 l1s.repeated_facch.counter_candidate=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1138 l1s.repeated_facch.counter=1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1139 #endif/* (FF_REPEATED_DL_FACCH == 1) */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1140
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1141 // Init the spurious_fb_detected flag
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1142 l1s.spurious_fb_detected = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1143
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1144 // Flag registers for RF task controle...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1145 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1146 l1s.tpu_ctrl_reg = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1147 l1s.dsp_ctrl_reg = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1148
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1149 // Serving...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1150 //============
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1151
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1152 // Serving frame number management.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1153 //---------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1154 if (l1a_l1s_com.recovery_flag == FALSE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1155 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1156 l1s.actual_time.tc = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1157 l1s.actual_time.fn = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1158 l1s.actual_time.t1 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1159 l1s.actual_time.t2 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1160 l1s.actual_time.t3 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1161 l1s.actual_time.fn_in_report = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1162 l1s.actual_time.fn_mod42432 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1163
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1164 l1s.next_time.tc = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1165 l1s.next_time.fn = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1166 l1s.next_time.t1 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1167 l1s.next_time.t2 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1168 l1s.next_time.t3 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1169 l1s.next_time.fn_in_report = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1170 l1s.next_time.fn_mod42432 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1171
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1172 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1173 l1s.actual_time.block_id = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1174 l1s.next_time.block_id = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1175 l1s.next_plus_time = l1s.next_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1176 l1s_increment_time(&(l1s.next_plus_time),1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1177 l1s.ctrl_synch_before = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1178 l1s.next_gauging_scheduled_for_PNP= 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1179 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1180 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1181
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1182 // TXPWR management.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1183 //-------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1184 l1s.reported_txpwr = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1185 l1s.applied_txpwr = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1186
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1187 // Last RXQUAL value.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1188 //-------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1189 l1s.rxqual = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1190
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1191 // Hardware info.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1192 //---------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1193 l1s.tpu_offset = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1194 l1s.tpu_offset_hw = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1195
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1196 l1s.tpu_win = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1197
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1198 // Initialize TXPWR info.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1199 l1s.last_used_txpwr = NO_TXPWR;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1200
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1201 #if (AMR == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1202 // Reset DTX AMR status
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1203 //---------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1204 l1s.dtx_amr_dl_on=FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1205 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1206
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1207 // Code version structure
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1208 //-------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1209
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1210 // DSP versions & checksum
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1211 l1s.version.dsp_code_version = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1212 l1s.version.dsp_patch_version = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1213 l1s.version.dsp_checksum = 0; // checksum patch+code DSP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1214
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1215 l1s.version.mcu_tcs_program_release = PROGRAM_RELEASE_VERSION;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1216 l1s.version.mcu_tcs_internal = INTERNAL_VERSION;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1217 l1s.version.mcu_tcs_official = MAINTENANCE_VERSION;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1218
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1219 #if TESTMODE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1220 l1s.version.mcu_tm_version = TESTMODEVERSION;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1221 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1222 l1s.version.mcu_tm_version = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1223 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1224
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1225 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1226 // Reset "l1a" structure.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1227 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1228
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1229 // Downlink tasks management...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1230 // Uplink tasks management...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1231 // Measurement tasks management...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1232 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1233
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1234 if (l1a_l1s_com.recovery_flag == FALSE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1235 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1236 for(i=0; i<NBR_L1A_PROCESSES; i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1237 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1238 l1a.l1a_en_meas[i] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1239 l1a.state[i] = 0; // RESET state.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1240 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1241 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1242 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1243 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1244 // L1A state for full list meas has to be maintained in case of recovery
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1245 for(i=0; i<NBR_L1A_PROCESSES; i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1246 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1247 if ((i != FULL_MEAS) && (i!= I_ADC))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1248 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1249 l1a.l1a_en_meas[i] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1250 l1a.state[i] = 0; // RESET state.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1251 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1252 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1253 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1254
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1255 l1a.confirm_SignalCode = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1256
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1257 // Flag for forward/delete message management.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1258 //---------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1259 if (l1a_l1s_com.recovery_flag == FALSE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1260 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1261 l1a.l1_msg_forwarded = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1262 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1263
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1264 #if (L1_VOCODER_IF_CHANGE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1265 // Reset new vocoder interface L1A global variables: automatic disabling and vocoder enabling flag.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1266 l1a.vocoder_state.automatic_disable = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1267 l1a.vocoder_state.enabled = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1268 #endif // if L1_VOCODER_IF_CHANGE == 1
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1269 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1270 // Reset "l1a_l1s_com" structure.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1271 //++++++++++++++++++++++++++++++++++++++++++
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1272
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1273 l1a_l1s_com.l1a_activity_flag = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1274 l1a_l1s_com.time_to_next_l1s_task = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1275
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1276 // Serving Cell...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1277 //=================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1278
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1279 // Serving Cell identity and information.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1280 //---------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1281 l1a_reset_cell_info(&(l1a_l1s_com.Scell_info));
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1282
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1283 l1a_l1s_com.Smeas_dedic.acc_sub = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1284 l1a_l1s_com.Smeas_dedic.nbr_meas_sub = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1285 l1a_l1s_com.Smeas_dedic.qual_acc_full = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1286 l1a_l1s_com.Smeas_dedic.qual_acc_sub = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1287 l1a_l1s_com.Smeas_dedic.qual_nbr_meas_full = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1288 l1a_l1s_com.Smeas_dedic.qual_nbr_meas_sub = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1289 l1a_l1s_com.Smeas_dedic.dtx_used = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1290
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1291 #if REL99
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1292 #if FF_EMR
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1293 // Serving Cell identity EMR information.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1294 //---------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1295 l1a_l1s_com.Smeas_dedic_emr.rxlev_val_acc = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1296 l1a_l1s_com.Smeas_dedic_emr.rxlev_val_nbr_meas = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1297 l1a_l1s_com.Smeas_dedic_emr.nbr_rcvd_blocks = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1298 l1a_l1s_com.Smeas_dedic_emr.mean_bep_block_acc = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1299 l1a_l1s_com.Smeas_dedic_emr.cv_bep_block_acc = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1300 l1a_l1s_com.Smeas_dedic_emr.mean_bep_block_num = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1301 l1a_l1s_com.Smeas_dedic_emr.cv_bep_block_num = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1302
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1303 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1304 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1305
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1306
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1307 l1a_l1s_com.Scell_used_IL.input_level = l1_config.params.il_min;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1308 l1a_l1s_com.Scell_used_IL_d.input_level = l1_config.params.il_min;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1309 l1a_l1s_com.Scell_used_IL_dd.input_level = l1_config.params.il_min;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1310
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1311 l1a_l1s_com.Scell_used_IL.lna_off = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1312 l1a_l1s_com.Scell_used_IL_d.lna_off = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1313 l1a_l1s_com.Scell_used_IL_dd.lna_off = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1314
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1315 // Synchro information.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1316 //---------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1317 l1a_l1s_com.tn_difference = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1318 l1a_l1s_com.dl_tn = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1319 #if L1_FF_WA_OMAPS00099442
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1320 l1a_l1s_com.change_tpu_offset_flag = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1321 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1322
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1323 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1324 l1a_l1s_com.dsp_scheduler_mode = GSM_SCHEDULER;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1325 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1326
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1327 // Idle parameters.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1328 //-----------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1329 l1a_l1s_com.nbcchs.schedule_array_size=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1330 l1a_l1s_com.ebcchs.schedule_array_size=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1331 l1a_l1s_com.bcchn.current_list_size=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1332 l1a_l1s_com.nsync.current_list_size=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1333
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1334 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1335 l1s.gsm_idle_ram_ctl.l1s_full_exec = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1336
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1337 #if GSM_IDLE_RAM_DEBUG
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1338 #if (CHIPSET == 10) && (OP_WCP == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1339 l1s.gsm_idle_ram_ctl.TC_true_control=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1340 #endif // CHIPSET && OP_WCP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1341 #endif // GSM_IDLE_RAM_DEBUG
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1342 #endif // GSM_IDLE_RAM
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1343
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1344 #if (L1_12NEIGH ==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1345 for (i=0;i<NBR_NEIGHBOURS+1;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1346 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1347 for (i=0;i<6;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1348 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1349 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1350 l1a_l1s_com.nsync.list[i].status=NSYNC_FREE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1351 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1352 for (i=0;i<6;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1353 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1354 l1a_l1s_com.bcchn.list[i].status=NSYNC_FREE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1355 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1356
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1357 // EOTD variables
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1358 #if (L1_EOTD==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1359 l1a_l1s_com.nsync.eotd_meas_session=FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1360 l1a_l1s_com.nsync.fn_sb_serv;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1361 l1a_l1s_com.nsync.ta_sb_serv;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1362 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1363
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1364 // CBCH parameters.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1365 // ----------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1366 // nothing to reset.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1367
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1368 // Random Access information.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1369 // ----------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1370 // nothing to reset.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1371
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1372 // ADC management
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1373 //---------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1374 if (l1a_l1s_com.recovery_flag == FALSE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1375 l1a_l1s_com.adc_mode = ADC_DISABLED;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1376
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1377 // TXPWR management.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1378 //-------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1379 #if(L1_FF_MULTIBAND == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1380 l1a_l1s_com.powerclass_band1 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1381 l1a_l1s_com.powerclass_band2 = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1382 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1383 for( i = 0; i< (NB_MAX_SUPPORTED_BANDS); i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1384 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1385 l1a_l1s_com.powerclass[i] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1386 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1387 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1388
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1389 // Dedicated parameters.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1390 //----------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1391 l1a_l1s_com.dedic_set.aset = NULL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1392 l1a_l1s_com.dedic_set.fset = NULL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1393 l1a_l1s_com.dedic_set.SignalCode = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1394 l1a_l1s_com.dedic_set.sync_tch = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1395 l1a_l1s_com.dedic_set.stop_tch = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1396 l1a_l1s_com.dedic_set.reset_facch = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1397 #if (FF_L1_TCH_VOCODER_CONTROL)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1398 l1a_l1s_com.dedic_set.reset_sacch = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1399 #if (L1_VOCODER_IF_CHANGE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1400 l1a_l1s_com.dedic_set.vocoder_on = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1401 #if (W_A_DSP_PR20037 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1402 l1a_l1s_com.dedic_set.start_vocoder = TCH_VOCODER_ENABLE_REQ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1403 #else // W_A_DSP_PR20037 == 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1404 l1a_l1s_com.dedic_set.start_vocoder = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1405 #endif // W_A_DSP_PR20037
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1406 #else // L1_VOCODER_IF_CHANGE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1407 l1a_l1s_com.dedic_set.vocoder_on = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1408 l1a_l1s_com.dedic_set.start_vocoder = TCH_VOCODER_RESET_COMMAND;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1409 #endif // L1_VOCODER_IF_CHANGE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1410 #endif // FF_L1_TCH_VOCODER_CONTROL
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1411
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1412 l1a_l1s_com.dedic_set.radio_freq = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1413 l1a_l1s_com.dedic_set.radio_freq_d = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1414 l1a_l1s_com.dedic_set.radio_freq_dd = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1415 #if ((REL99 == 1) && (FF_BHO == 1))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1416 // blind handover params in dedic set
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1417 // Initialize the handover type to default value that is Normal Handover.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1418 l1a_l1s_com.dedic_set.handover_type = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1419 l1a_l1s_com.dedic_set.long_rem_handover_type = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1420 l1a_l1s_com.dedic_set.bcch_carrier_of_nbr_cell = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1421 l1a_l1s_com.dedic_set.fn_offset = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1422 l1a_l1s_com.dedic_set.time_alignment = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1423 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1424
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1425 #if (L1_12NEIGH ==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1426 for (i=0;i<NBR_NEIGHBOURS+1;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1427 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1428 for (i=0;i<6;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1429 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1430 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1431 l1a_l1s_com.nsync.list[i].sb26_offset = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1432 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1433
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1434 l1a_l1s_com.dedic_set.pwrc = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1435 l1a_l1s_com.dedic_set.handover_fail_mode = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1436 #if (AMR == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1437 l1a_l1s_com.dedic_set.sync_amr = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1438 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1439
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1440 // Handover parameters.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1441 //---------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1442 // nothing to reset.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1443
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1444 // Neighbour Cells...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1445 //====================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1446
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1447 // FULL list.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1448 //-----------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1449 l1a_reset_full_list();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1450
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1451 // BA list.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1452 //---------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1453 l1a_reset_ba_list();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1454 l1a_l1s_com.ba_list.new_list_present = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1455
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1456 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1457 // Packet measurement: Reset of the frequency list.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1458 //-------------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1459 l1pa_reset_cr_freq_list();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1460 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1461
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1462 // L1S scheduler...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1463 //====================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1464
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1465 // L1S tasks management...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1466 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1467 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1468 UWORD8 mem;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1469 mem = l1a_l1s_com.l1s_en_task[ADC_CSMODE0];
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1470
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1471 for(i=0; i<NBR_DL_L1S_TASKS; i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1472 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1473 l1a_l1s_com.task_param[i] = SEMAPHORE_RESET;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1474 l1a_l1s_com.l1s_en_task[i] = TASK_DISABLED;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1475 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1476
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1477 // in case of recovery do not change the ADC initialization
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1478 if (l1a_l1s_com.recovery_flag != FALSE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1479 l1a_l1s_com.l1s_en_task[ADC_CSMODE0] = mem;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1480 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1481
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1482 // Measurement tasks management...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1483 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1484 l1a_l1s_com.meas_param = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1485 l1a_l1s_com.l1s_en_meas = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1486
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1487 // L1 mode...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1488 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1489 if (l1a_l1s_com.recovery_flag == FALSE) // do not restart from CS_MODE0 after a recovery
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1490 l1a_l1s_com.mode = CS_MODE0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1491
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1492 // Control algo variables.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1493 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1494 l1a_l1s_com.fb_mode = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1495 l1a_l1s_com.toa_reset = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1496
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1497 #if(L1_FF_MULTIBAND == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1498 for(i=0; i<=l1_config.std.nbmax_carrier; i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1499 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1500 for(i=0; i<= NBMAX_CARRIER; i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1501 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1502 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1503 l1a_l1s_com.last_input_level[i].input_level = l1_config.params.il_min;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1504 l1a_l1s_com.last_input_level[i].lna_off = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1505 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1506
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1507 #if FF_L1_IT_DSP_DTX
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1508 // Fast DTX variables.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1509 //-----------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1510 // Clear DTX interrupt condition
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1511 l1a_apihisr_com.dtx.pending = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1512 // Enable TX activity
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1513 l1a_apihisr_com.dtx.tx_active = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1514 // No DTX status awaited
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1515 l1a_apihisr_com.dtx.dtx_status = DTX_AVAILABLE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1516 // Fast DTX service latency timer
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1517 l1a_apihisr_com.dtx.fast_dtx_ready_timer = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1518 // Fast DTX service available
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1519 l1a_apihisr_com.dtx.fast_dtx_ready = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1520 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1521 #if L1_RECOVERY
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1522 l1s.recovery.frame_count = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1523 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1524
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1525 #if (AUDIO_TASK == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1526 l1audio_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1527 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1528
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1529 #if (L1_GTT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1530 l1gtt_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1531 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1532
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1533 #if (L1_MP3 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1534 l1mp3_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1535 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1536
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1537 #if (L1_MIDI == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1538 l1midi_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1539 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1540 //ADDED FOR AAC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1541 #if (L1_AAC == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1542 l1aac_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1543 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1544 #if (L1_DYN_DSP_DWNLD == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1545 l1_dyn_dwnld_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1546 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1547 #if (FF_L1_FAST_DECODING == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1548 l1a_apihisr_com.fast_decoding.pending = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1549 l1a_apihisr_com.fast_decoding.crc_error = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1550 l1a_apihisr_com.fast_decoding.status = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1551 l1a_apihisr_com.fast_decoding.deferred_control_req = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1552 l1a_apihisr_com.fast_decoding.task = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1553 l1a_apihisr_com.fast_decoding.burst_id = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1554 l1a_apihisr_com.fast_decoding.contiguous_decoding = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1555 #endif /* FF_L1_FAST_DECODING */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1556
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1557
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1558 #if(L1_CHECK_COMPATIBLE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1559 l1a.vcr_wait = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1560 l1a.stop_req = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1561 l1a.vcr_msg_param = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1562 l1a.vch_auto_disable = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1563
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1564 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1565
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1566
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1567 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1568
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1569
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1570 /*---------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1571 /* l1_dpll_init_var() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1572 /*---------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1573 /* Parameters : None */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1574 /* Return : None */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1575 /* Functionality : Initialize L1 DPLL variable for gauging */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1576 /* processing */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1577 /*---------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1578 void l1_dpll_init_var(void) {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1579
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1580 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1581 // Init DPLL variable
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1582 //===================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1583 #if (CHIPSET == 2 || CHIPSET == 3 || CHIPSET == 5 || CHIPSET == 6 || CHIPSET == 9)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1584 l1_config.dpll=PLL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1585 #elif ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1586 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1587 UWORD16 dpll_div;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1588 UWORD16 dpll_mul;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1589 #if (CHIPSET == 12)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1590 // not required for Locosto: There is NO CNTL_CLK_DSP in Locosto
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1591 double dsp_div = CLKM_GET_DSP_DIV_VALUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1592 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1593
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1594 dpll_div=DPLL_READ_DPLL_DIV;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1595 dpll_mul=DPLL_READ_DPLL_MUL;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1596
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1597 #if (CHIPSET == 12)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1598 // Not required for locsto due to the reason mentioned above.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1599 l1_config.dpll= ((double)(dpll_mul)/(double)(dpll_div+1))/(double)(dsp_div);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1600 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1601 l1_config.dpll= (double)(dpll_mul)/(double)(dpll_div+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1602 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1603 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1604 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1605 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1606
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1607 } /* l1_dpll_init_var() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1608
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1609 /*-------------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1610 /* FUNCTION: l1_drp_wrapper_init */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1611
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1612 /*-------------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1613
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1614 void l1_drp_wrapper_init (void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1615 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1616 #if(RF_FAM == 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1617 l1ddsp_apc_load_apcctrl2(l1_config.params.apcctrl2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1618 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1619
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1620 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1621
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1622 /*-------------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1623 /* FUNCTION: l1_drp_init */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1624 /* Params: Void */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1625 /*
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1626 Functionality: This function does the following
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1627 1. Initialize Misc variables wrt DRP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1628 2a Copy the RAMP Tables into the DSP MCU API
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1629 2b. Initialize other APIs wrt DCO
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1630 3. Download Reference Software
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1631 4. Call the function to : Start the REG_ON Script in the DRP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1632 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1633 /*-------------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1634
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1635 #if (L1_DRP == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1636 #if (DRP_FW_EXT==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1637 #pragma DATA_SECTION(l1_drp_int_mem, ".drp_ptr")
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1638 void * l1_drp_int_mem;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1639 #pragma DATA_SECTION(l1_drp_ext_mem, ".drp_ptr")
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1640 void *l1_drp_ext_mem;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1641 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1642 void l1_drp_init()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1643 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1644 //int i;- OMAPS90550-new
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1645 #if (DRP_FW_EXT==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1646 uint32 size_int=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1647 uint32 size_ext=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1648 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1649 #if (RF_FAM == 61)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1650 volatile UWORD16 *ptr_drp_init16;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1651 UWORD16 drp_maj_version;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1652 UWORD16 drp_min_version;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1653
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1654 //Initialize the following SRM_API, REG related address drp_srm_data = DRP_SRM_DATA_ADD,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1655 //drp_regs = DRP_REGS_BASE_ADD;, drp_srm_api = DRP_SRM_API_ADD
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1656
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1657 drp_api_addr_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1658
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1659 #if (DRP_FW_EXT==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1660 drp_maj_version = (drp_ref_sw_ver >> 8) & 0xFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1661 drp_min_version = (drp_ref_sw_ver & 0xFF);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1662 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1663
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1664 //Initialize the following variables... TBD Danny
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1665 //SRM_CW = 0x00000040, IRQ_CNT= 0x00000040 , TX_PTR_START_END_ADDR = 0X00200025,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1666 //RX_PTR_START_END_ADDR = 0X0000001F , 0XFFFE0806= 16
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1667 //The registers are 32 bit since its a RHEA peripheral has to be writtin in 16 bit writes
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1668 // This is done by the DRP script download
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1669
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1670 // The counter for # of DRP_DBB_RX_IRQs (in the wrapper) to be masked
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1671 ptr_drp_init16 = (UWORD16 *) (DRP_DBB_RX_IRQ_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1672 (*ptr_drp_init16) = DRP_DBB_RX_IRQ_COUNT;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1673
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1674 #endif //RF_FAM == 61
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1675 l1s.boot_result=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1676 #if (DRP_FW_EXT==1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1677 if(!((drp_min_version >= L1_DRP_COMPAT_MINOR_VER) && (drp_maj_version == L1_DRP_COMPAT_MAJOR_VER))) {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1678 l1s.boot_result = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1679 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1680 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1681 drp_get_memory_size(&size_int,&size_ext);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1682 /* FIXME FIXME ERROR handling for memory allocation failure */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1683 if(size_int)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1684 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1685 l1_drp_int_mem=os_alloc_sig(size_int);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1686 if(l1_drp_int_mem==NULL)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1687 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1688 /*FIXME Error Handling Here */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1689 l1s.boot_result = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1690 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1691 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1692 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1693 if(size_ext)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1694 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1695 l1_drp_ext_mem=os_alloc_sig(size_ext);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1696
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1697 if(l1_drp_ext_mem==NULL)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1698 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1699 /*FIXME Error Handling Here */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1700 l1s.boot_result = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1701 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1702 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1703 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1704
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1705 // Populate pointers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1706 if(drpfw_init(&modem_func_jump_table,&modem_var_jump_table))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1707 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1708 // This condition should not be reached in phase 1 of DRP FW
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1709 // Extraction. DRP and L1 software should always be compatible
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1710 l1s.boot_result = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1711 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1712 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1713
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1714 ((T_DRP_ENV_INT_BLK *)l1_drp_int_mem)->g_pcb_config = RF_BAND_SYSTEM_INDEX; //OMAPS148175
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1715
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1716 #endif // DRP_FW_EXT==1
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1717 // This function would takes care of drp_ref_sw download till that is in place this would be a dummy function
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1718 // Testing PLD_WriteRegister(0x0440, 0x165c);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1719 #if (RF_FAM == 60) // PLD board
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1720 // for PLD board script downloading will happen through USP driver
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1721 // load ref_sw_main
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1722 // drp_ref_sw_upload(drp_ref_sw);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1723 drp_copy_ref_sw_to_drpsrm( (unsigned char *) drp_ref_sw);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1724 #elif (RF_FAM == 61) // Locosto based board
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1725 // load ref_sw_main
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1726 // drp_ref_sw_upload(drp_ref_sw); // TBD replace with DRP Copy function...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1727 drp_copy_ref_sw_to_drpsrm( (unsigned char *) drp_ref_sw);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1728 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1729
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1730 #if (L1_DRP_DITHERING == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1731 (*(volatile UINT8 *)CONF_MUX_VIEW8) = 0x01;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1732 (*(volatile UINT8 *)CONF_DEBUG_SEL_TST_8) = 0x07;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1733 (*(volatile UINT8 *)CONF_GPIO_17) = 0x02;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1734 (*(volatile UINT8 *)CONF_LOCOSTO_DEBUG) = 0x00;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1735 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1736
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1737 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1738 #endif // L1_DRP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1739
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1740 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1741 /* l1_initialize() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1742 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1743 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1744 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1745 /* Functionality : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1746 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1747 void l1_initialize(T_MMI_L1_CONFIG *mmi_l1_config)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1748 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1749 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4) || (TRACE_TYPE == 5)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1750 l1_trace_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1751 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1752
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1753 // this is not a recovery initialization .
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1754 l1a_l1s_com.recovery_flag = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1755
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1756 // initialize the ratio of the wait loop
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1757 // must be initialized before using the wait_ARM_cycles() function !!!
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1758 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1759 initialize_wait_loop();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1760 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1761
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1762 // Init Layer 1 configuration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1763 //===========================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1764 #if(L1_FF_MULTIBAND == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1765 l1_config.std.id = mmi_l1_config->std;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1766 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1767
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1768 l1_config.tx_pwr_code = mmi_l1_config->tx_pwr_code;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1769 #if IDS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1770 l1_config.ids_enable = mmi_l1_config->ids_enable;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1771 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1772 l1_config.facch_test.enable = mmi_l1_config->facch_test.enable;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1773 l1_config.facch_test.period = mmi_l1_config->facch_test.period;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1774 l1_config.dwnld = mmi_l1_config->dwnld;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1775
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1776 #if TESTMODE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1777 // Initialize TestMode params: must be done after Omega power-on
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1778 l1_config.TestMode = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1779 // Enable control algos and ADC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1780 l1_config.agc_enable = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1781 l1_config.afc_enable = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1782 l1_config.adc_enable = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1783 #if (FF_REPEATED_SACCH == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1784 l1_config.repeat_sacch_enable = 1; /* Repeated SACCH mode enabled */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1785 #endif /* (FF_REPEATED_SACCH == 1) */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1786 #if (FF_REPEATED_DL_FACCH == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1787 l1_config.repeat_facch_dl_enable = 1; /* Repeated SACCH mode enabled */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1788 #endif /* ( FF_REPEATED_DL_FACCH == 1) */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1789 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1790
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1791 // sleep management configuration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1792 //===============================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1793 l1s.pw_mgr.mode_authorized = mmi_l1_config->pwr_mngt_mode_authorized;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1794 l1s.pw_mgr.clocks = mmi_l1_config->pwr_mngt_clocks;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1795 l1_config.pwr_mngt = mmi_l1_config->pwr_mngt;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1796
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1797 Cust_init_std();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1798 Cust_init_params();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1799
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1800
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1801
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1802 // Init DPLL variable
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1803 //===================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1804 l1_dpll_init_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1805
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1806 // Reset hardware (DSP,Analog Baseband device , TPU) ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1807 //========================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1808 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1809 dsp_power_on();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1810 l1_abb_power_on();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1811 #if (L1_DRP == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1812 l1_drp_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1813 //required for interworking with Isample 2.1 and Isample 2.5
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1814 #if (DRP_FW_EXT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1815 if (!l1s.boot_result)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1816 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1817 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1818 //for DRP Calibration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1819 Cust_init_params_drp();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1820 drp_efuse_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1821 #if (DRP_FW_EXT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1822 } /* end if boot_result != 0 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1823 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1824
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1825 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1826
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1827 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1828
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1829 // Initialize hardware....(DSP, TPU)....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1830 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1831 l1_tpu_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1832 l1_dsp_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1833
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1834 // Initialize L1 variables (l1a, l1s, l1a_l1s_com).
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1835 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1836 l1_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1837
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1838 // API check function
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1839 #if ((OP_L1_STANDALONE == 1) && ((DSP == 38) || (DSP == 39)) && (CODE_VERSION != SIMULATION))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1840 l1_api_dump();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1841 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1842
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1843 #if (L1_GPRS)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1844 // Initialize L1 variables used in packet mode (l1pa, l1ps, l1pa_l1ps_com).
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1845 //========================================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1846 initialize_l1pvar();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1847 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1848
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1849 // Initialize statistics mode.......
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1850 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1851 #if TRACE_TYPE==3
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1852 reset_stats();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1853 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1854 #if(OP_L1_STANDALONE == 1 || L1_NAVC == 1 )//NAVC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1855 Cust_navc_ctrl_status(1);//start - NAVC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1856 #endif//end of (OP_L1_STANDALONE == 1 || L1_NAVC == 1 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1857
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1858 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1859
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1860 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1861 /* l1_initialize_for_recovery */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1862 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1863 /* Parameters : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1864 /* Return : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1865 /* Functionality : This function is called for L1 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1866 /* recovery after a Crash. When there are 100 COM error */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1867 /* or if ther are 100 PM =0 from the DSP Successively. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1868 /* The Layer 1 Crashes. The next time the Protocol stack */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1869 /* requests for Full Rx Measurement (viz Cell selection) */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1870 /* This function gets called and the L1 recovery is */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1871 /* initiated. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1872 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1873 #if L1_RECOVERY
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1874 void l1_initialize_for_recovery(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1875 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1876 LA_ResetLead(); // set DSP in reset mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1877 initialize_wait_loop();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1878
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1879 dsp_power_on(); // the reset mode is disabled here
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1880 l1_abb_power_on();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1881 #if (L1_DRP == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1882 l1_drp_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1883 //Required for interworking with Isample 2.1 and Isample 2.5
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1884 Cust_init_params_drp();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1885 drp_efuse_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1886 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1887 l1_tpu_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1888 wait_ARM_cycles(convert_nanosec_to_cycles(11000000)); // wait of 5.5 msec
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1889 l1_dsp_init();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1890 l1_initialize_var();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1891
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1892 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1893 initialize_l1pvar();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1894 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1895
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1896 l1a_l1s_com.recovery_flag = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1897
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1898 // clear pending IQ_FRAME it and enable it
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1899 #if (CHIPSET >= 4 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1900 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1901 F_INTH_RESET_ONE_IT(C_INTH_FRAME_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1902 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1903 * (volatile UWORD16 *) INTH_IT_REG1 &= ~(1 << IQ_FRAME); // clear TDMA IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1904 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1905 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1906 * (volatile UWORD16 *) INTH_IT_REG &= ~(1 << IQ_FRAME); // clear TDMA IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1907 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1908
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1909 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1910 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1911
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1912
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1913