annotate gsm-fw/L1/include/l1_confg.h @ 871:a5c8f48003cd

rvinterf: client programs can now selectively stop receiving packets of a particular RVTMUX type
author Space Falcon <falcon@ivan.Harhan.ORG>
date Fri, 29 May 2015 06:29:38 +0000
parents 58bbee73c4b7
children cc9d97d0e911
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_CONFG.H
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4 *
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5 * Filename l1_confg.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 #ifndef __L1_CONFG_H__
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11 #define __L1_CONFG_H__
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12
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13 // Traces...
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14 // TRACE_TYPE == 1,2,3 are used in standalone mode (L2-L3 Simul) with USART
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15 // TRACE_TYPE == 4 is used on A-sample only (with UART): L1 + protocol stack
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16 // TRACE_TYPE == 1 -> L1/L3 interface trace
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17 // TRACE_TYPE == 2 -> Trace mode: ~33~~1~011...
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18 // TRACE_TYPE == 3 -> same as above (2) plus FER or stats trace
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19 // TRACE_TYPE == 4 -> L1/L3 interface trace on A-sample with protocol stack
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20 // TRACE_TYPE == 5 -> trace for full simulation
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21 // TRACE_TYPE == 6 -> CPU load trace for hisr
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22 // TRACE_TYPE == 7 -> CPU LOAD trace for layer 1 hisr for all TDMA. Output on
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23 // UART at 38400 bps =>
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24 // format : <hisr cpu value in microseconds> <frame number>
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25
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26 // Code PB reported workaround
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27 //------------------------------
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28
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29
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30 // Code Version possible choices
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31 //------------------------------
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32 #define SIMULATION 1
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33 #define NOT_SIMULATION 2
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34
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35 // RLC functions Version possible choices
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36 //------------------------------
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37 #define POLL_FORCED 0
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38 #define RLC_SCENARIO 1
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39 #define MODEM_FLOW 2
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40
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41 // possible choices for UART trace output
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42 //------------------------------
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43 #if (CHIPSET != 15)
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44 #define MODEM_UART 0
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45 #define IRDA_UART 1
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46 #if (CHIPSET == 12)
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47 #define MODEM2_UART 2
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48 #endif
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49 #else
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50 // There is only one UART in Locosto
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51 #define MODEM_UART 0
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52 #endif
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53
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54 //============
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55 // CODE CHOICE
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56 //============
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57 #if 0
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58 #if (OP_L1_STANDALONE==0)
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59 #define CODE_VERSION NOT_SIMULATION
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60 #else // OP_L1_STANDALONE
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61 #ifdef WIN32
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62 #define CODE_VERSION SIMULATION
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63 #else // WIN32
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64 #define CODE_VERSION NOT_SIMULATION
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65 #endif // WIN32
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66 #endif // OP_L1_STANDALONE
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67 #endif // #if 0
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68
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69 /* FreeCalypso */
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70 #define CODE_VERSION NOT_SIMULATION
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71 #define AMR 1
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72 #define L1_12NEIGH 1
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73 #define L1_EOTD 0
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74 #define L1_GTT 0
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75 #define ORDER2_TX_TEMP_CAL 1
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76 #define TRACE_TYPE 4
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77 #define VCXO_ALGO 1
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78
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79 /* let's try running without any DSP patches initially */
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80 #define DWNLD 0
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81 #define L1_DYN_DSP_DWNLD 0
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82
532
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83 /* TESTMODE will be enabled with feature l1tm */
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84
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85 #if CONFIG_AUDIO
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86 # define AUDIO_TASK 1 // Enable the L1 audio features
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87 # define MELODY_E2 1
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88 #endif
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89
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90 #if CONFIG_GPRS
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91 # define L1_GPRS 1
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92 #else
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93 # define L1_GPRS 0
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94 #endif
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95
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96 //---------------------------------------------------------------------------------
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97 // Test with full simulation.
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98 //---------------------------------------------------------------------------------
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99 #if (CODE_VERSION == SIMULATION)
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100
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101
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102 #undef FF_L1_IT_DSP_USF
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103 #define FF_L1_IT_DSP_USF 0
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104 #undef FF_L1_IT_DSP_DTX
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105 #if (AMR == 1)
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106 #define FF_L1_IT_DSP_DTX 1 //it should be 1, sajal- temp made it 0 for build purpose
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107 #else
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108 #define FF_L1_IT_DSP_DTX 0
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109 #endif
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110
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111 #define L1_DRP_IQ_SCALING 0
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112
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113 // Test Scenari...
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114 #define SCENARIO_FILE 1 // Test Scenario comes from input files.
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115 #define SCENARIO_MEM 0 // Test Scenario comes from RAM.
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116
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117 // In Simulation AUDIO_DEBUG Should be 0
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118 #define AUDIO_DEBUG 0
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119
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120 // Traces...
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121 #undef TRACE_TYPE
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122 #define TRACE_TYPE 5
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123 #define LOGFILE_TRACE 1 // trace in an output logfile
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124
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125 #define BURST_PARAM_LOG_ENABLE 0 // Burst Param Log Enable
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126
115
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127 #define FLOWCHART 0 // Message sequence/flow chart trace.
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128 #define NUCLEUS_TRACE 0 // Nucleus error trace
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129 #define EOTD_TRACE 1 // EOTD log trace
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130 #define TRACE_FULL_NAME 0 // display full fct names after a PM/COM error
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131
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132 #define L2_L3_SIMUL 1 // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
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133
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134 // Control algorithms...
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135 #define AFC_ALGO 1 // AFC algorithm.
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136 #if (L1_SAIC != 0)
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137 #define TOA_ALGO 2 // TOA algorithm.
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138 #else
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139 #define TOA_ALGO 1 // TOA algorithm.
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140 #endif
115
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141 #define AGC_ALGO 1 // AGC algorithm.
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142 #define TA_ALGO 0 // TA (Timing Advance) algorithm.
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143 #undef VCXO_ALGO
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144 #define VCXO_ALGO 1 // VCXO algo
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145 #undef DCO_ALGO
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146 #define DCO_ALGO 0 // DCO algo (TIDE)
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147 #undef ORDER2_TX_TEMP_CAL
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148 #define ORDER2_TX_TEMP_CAL 0 // TX Temperature Compensation Algorithm selection
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149
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150
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151 #define FACCH_TEST 0 // FACCH test enabled.
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152
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153 #define ADC_TIMER_ON 0 // Timer for ADC measurements
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154 #define AFC_ON 1 // Enable of the Omega AFC module
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155
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156 #define AUDIO_TASK 1 // Enable the L1 audio features
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157 #define AUDIO_SIMULATION 1 // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
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158 #define AUDIO_L1_STANDALONE 0 // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
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159
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160 #define GTT_SIMULATION 1 // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
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161 #define TTY_SYNC_MCU 0 // TTY WORKAROUND BUG03401
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162 #define TTY_SYNC_MCU_2 0 //
115
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163 #define L1_GTT_FIFO_TEST_ATOMIC 0 //
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164 #define NEW_WKA_PATCH 0
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165 #define OPTIMISED 0
115
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166
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167 #define L1_RECOVERY 0 // L1 recovery
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168
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169 #undef L1_GPRS
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170 #define L1_GPRS 1 // GPRS L1: MS supporting both Circuit Switched and Packet (GPRS) capabilities
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171
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172 #undef AMR
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173 #define AMR 1 // AMR version 1.0 supported
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174
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175 #undef L1_12NEIGH
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176 #define L1_12NEIGH 1 // new L1-RR interface for 12 neighbour cells
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177
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178 #undef L1_GTT
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179 #define L1_GTT 1 // Enable Global Text Telephony feature for simulation
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180
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181 #undef OP_L1_STANDALONE
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182 #define OP_L1_STANDALONE 1 // Selection of code for L1 stand alone
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183
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184 #undef OP_RIV_AUDIO
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185 #define OP_RIV_AUDIO 0 // Selection of code for Riviera audio
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186
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187 #undef OP_WCP
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188 #define OP_WCP 0 // No WCP integration
530
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189
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190 #undef L1_DRP
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191 #define L1_DRP 0 // L1 supporting DRP interface
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192
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193 #undef DRP_MEM_SIMULATION
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194 #define DRP_MEM_SIMULATION 0
115
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195 //---------------------------------------------------------------------------------
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196 // Test with H/W platform.
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197 //---------------------------------------------------------------------------------
530
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198
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199 #if (GSM_IDLE_RAM == 1)
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200 #define GSM_IDLE_RAM_DEBUG 0
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201 #endif
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202
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203 #define AFC_BYPASS_MODE 0
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204 #define PWMEAS_IF_MODE_FORCE 0
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205 // WA for OMAPS00099442 must be disabled in PC simulation
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206 #undef L1_FF_WA_OMAPS00099442
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207 #define L1_FF_WA_OMAPS00099442 0
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diff changeset
208
115
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209 #elif (CODE_VERSION == NOT_SIMULATION)
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210
530
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211 #define L1_DRP_IQ_SCALING 1
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212 // In Target AUDIO_DEBUG could be turned ON to debug any AUDIO ON/OFF issues
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213 #define AUDIO_DEBUG 0
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214
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215 #if (GSM_IDLE_RAM == 1)
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diff changeset
216 #if ((CHIPSET == 12) || (CHIPSET == 10))
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217 #define GSM_IDLE_RAM_DEBUG 1
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diff changeset
218 #else
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diff changeset
219 #define GSM_IDLE_RAM_DEBUG 0
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diff changeset
220 #endif
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diff changeset
221 #else
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diff changeset
222 #define GSM_IDLE_RAM_DEBUG 0
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diff changeset
223 #endif
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224
532
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225 //FreeCalypso: L1_VPM commented out, as I suspect it's a LoCosto-ism
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diff changeset
226 //#define L1_VPM 1
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227
530
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diff changeset
228 #if (OP_L1_STANDALONE == 1)
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diff changeset
229 #if (CHIPSET == 15)
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diff changeset
230 #if ((BOARD == 71) && (FLASH == 0))
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diff changeset
231 // Not possible in I-SAMPLE only RAM configuration as there will
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diff changeset
232 // not be enough memory space
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diff changeset
233 #define BURST_PARAM_LOG_ENABLE 0
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diff changeset
234 #else
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diff changeset
235 #define BURST_PARAM_LOG_ENABLE 1
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diff changeset
236 #endif
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diff changeset
237 #else
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diff changeset
238 #define BURST_PARAM_LOG_ENABLE 0
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diff changeset
239 #endif
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diff changeset
240 #else
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diff changeset
241 #define BURST_PARAM_LOG_ENABLE 0
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diff changeset
242 #endif
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diff changeset
243
115
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244 // Work around about Calypso RevA: the bus is floating (Cf PB01435)
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245 // (corrected with Calypso ReV B and Calypso C035)
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246 #if (CHIPSET == 7)
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247 #define W_A_CALYPSO_BUG_01435 1
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248 #else
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249 #define W_A_CALYPSO_BUG_01435 0
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250 #endif
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251
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252 #if (CHIPSET == 12) // Not needed for CHIPSET =15, as there is no extended page mode in Locosto
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253 #define W_A_CALYPSO_PLUS_SPR_19599 1
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254 #else
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255 #define W_A_CALYPSO_PLUS_SPR_19599 0
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256 #endif
115
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257
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258 // for AMR thresolds definition CQ22226
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259 #define W_A_AMR_THRESHOLDS 1
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260 #define W_A_PCTM_RX_AGC_GLOBAL_PARAMS 1 // For support of PCTM
115
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261
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262 #if (L1_GTT==1)
530
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263 #define TTY_SYNC_MCU 0
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264 #define TTY_SYNC_MCU_2 0
115
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265 #define L1_GTT_FIFO_TEST_ATOMIC 0
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266 #define NEW_WKA_PATCH 0
530
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267 #define OPTIMISED 0
115
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268 #else
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269 #define TTY_SYNC_MCU_2 0
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270 #define L1_GTT_FIFO_TEST_ATOMIC 0
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271 #define TTY_SYNC_MCU 0
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272 #define NEW_WKA_PATCH 0
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273 #define OPTIMISED 0
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274
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275 #endif
530
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276
532
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277 /*
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278 * FreeCalypso: these FF_L1_IT_DSP_USF and FF_L1_IT_DSP_DTX features (?)
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279 * are new with the LoCosto L1 headers, i.e., not present in the Leonardo
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280 * headers. I have no idea what they are, and I suspect they may likely
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281 * be something that won't work on our Calypso platform, so I'm disabling
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282 * them for now.
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283 */
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284
530
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285 #undef FF_L1_IT_DSP_USF
532
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286 #if 0 //(L1_GPRS == 1)
530
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287 #define FF_L1_IT_DSP_USF 1
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288 #else
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289 #define FF_L1_IT_DSP_USF 0
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290 #endif
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291 #undef FF_L1_IT_DSP_DTX
532
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292 #if 0 //(AMR == 1)
530
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293 #define FF_L1_IT_DSP_DTX 1
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294 #else
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295 #define FF_L1_IT_DSP_DTX 0
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296 #endif
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297
115
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298 // Traces...
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299 #define NUCLEUS_TRACE 0 // Nucleus error trace
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300 #define FLOWCHART 0 // Message sequence/flow chart trace.
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301 #define LOGFILE_TRACE 0 // trace in an output logfile
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302 #define TRACE_FULL_NAME 0 // display full fct names after a PM/COM error
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303
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304 // Test Scenari...
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305 #define SCENARIO_FILE 0 // Test Scenario comes from input files.
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306 #define SCENARIO_MEM 1 // // Test Scenario comes from RAM.
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307
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308 #if (OP_L1_STANDALONE == 1)
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diff changeset
309 #define L2_L3_SIMUL 1 // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
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310 #else
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311 #define L2_L3_SIMUL 0
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312 #endif
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313
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314 // Control algorithms...
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315 #define AFC_ALGO 1 // AFC algorithm.
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316 //TOA Algorithm needs to be on for TestMode, otherwise no dedic test will be succesful!!!
530
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diff changeset
317 #if (L1_SAIC != 0)
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diff changeset
318 #define TOA_ALGO 2 // TOA algorithm.
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diff changeset
319 #else
115
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320 #define TOA_ALGO 1 // TOA algorithm.
530
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diff changeset
321 #endif
115
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322 #define AGC_ALGO 1 // AGC algorithm.
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diff changeset
323 #define TA_ALGO 1 // TA (Timing Advance) algorithm.
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324
1e41550feec5 nuc-fw: Init_Target() reconstructed
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325 #define FACCH_TEST 0 // FACCH test enabled.
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326
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327 #define ADC_TIMER_ON 0 // Timer for ADC measurements
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328 #define AFC_ON 1 // Enable of the Omega AFC module
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329
532
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diff changeset
330 #if 0
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diff changeset
331 /* FreeCalypso: moved to config section above */
115
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332 #define AUDIO_TASK 1 // Enable the L1 audio features
532
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diff changeset
333 #endif
115
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diff changeset
334 #define AUDIO_SIMULATION 0 // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
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335 #if (OP_L1_STANDALONE == 1)
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diff changeset
336 #define AUDIO_L1_STANDALONE 1 // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
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diff changeset
337 #else
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diff changeset
338 #define AUDIO_L1_STANDALONE 0
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diff changeset
339 #endif
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diff changeset
340
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
341 #define GTT_SIMULATION 0 // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
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342
530
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diff changeset
343 #define OP_BT 0 // Simulation of ISLAND (BLUETOOTH) sleep management
115
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diff changeset
344
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
345 #define L1_RECOVERY 1 // L1 recovery
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diff changeset
346
530
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diff changeset
347 #if ((RF_FAM == 60) || (RF_FAM == 61))
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diff changeset
348 #define L1_DRP 1 // L1 supporting DRP interface
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diff changeset
349 #else
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diff changeset
350 #define L1_DRP 0 // L1 supporting DRP interface
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diff changeset
351 #endif
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diff changeset
352 #define DRP_MEM_SIMULATION 0 // DRP memory simulation OFF by default
115
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diff changeset
353
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
354 #if (L1_GPRS == 1)
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diff changeset
355 #define RLC_VERSION RLC_SCENARIO
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diff changeset
356 #if (RLC_VERSION == RLC_SCENARIO)
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diff changeset
357 #define RLC_DL_BLOCK_STAT 0 // Works with RLC_VERSION = RLC_SCENARIO
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diff changeset
358 // output stat on CRC error blocks
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parents:
diff changeset
359 // The user must enter the cs type and
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parents:
diff changeset
360 // the number of frames desired.
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parents:
diff changeset
361 #else
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diff changeset
362 #define RLC_DL_BLOCK_STAT 0 // Default value; Never change it
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parents:
diff changeset
363 #endif
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parents:
diff changeset
364
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
365 #if (OP_L1_STANDALONE == 1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366 #define DSP_BACKGROUND_TASKS 1 // Enable the TEST of DSP background.tasks
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
367 // activated by a layer 3 message (BG_TASK_START (<task number>))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 // deactivated by a layer 3 message (BG_TASK_STOP (<task number>))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 // Warning : Works only with DSP>=31
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371 #define DSP_BACKGROUND_TASKS 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 #define DSP_BACKGROUND_TASKS 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 #define RLC_DL_BLOCK_STAT 0 // Default value; Never change it
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
378 #define PWMEAS_IF_MODE_FORCE 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
379 // WA for OMAPS00099442 (OMAPS0010023 (N12.x), OMAPS000010022 (N5.x))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
380 // The problem is: When NW is lost due to reception gap or cell border range,
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
381 // the MS will try to re-synchronize on the cell with the TPU timing aligned
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
382 // with the timing of the cell. So the FB will start within the 92 bits of the TPU window and
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
383 // will be missed. This issue is due to a limitation of the legacy FB demodulation algorithm
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
384 // WA is to re-initialize the TPU with an arbitrary timing value
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
385 #undef L1_FF_WA_OMAPS00099442
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
386 #define L1_FF_WA_OMAPS00099442 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
387
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
389
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 // Audio tasks selection
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391 //-----------------------
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393 #if (AUDIO_TASK == 1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 #define KEYBEEP 1 // Enable keybeep feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 #define TONE 1 // Enable tone feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396 // Temporary modification for protocol stack compatibility - GSMLITE will be removed
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
397 #if (OP_L1_STANDALONE == 1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 #define GSMLITE 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
400 #if (CODE_VERSION == SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
401 #define L1_VOICE_MEMO 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
402 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403 #if ((OP_L1_STANDALONE == 1) || (!GSMLITE))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404 #define MELODY_E1 1 // Enable melody format E1 feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
406 #if(L1_VOICE_MEMO == 1)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
407 #define VOICE_MEMO 1 // Enable voice memorization feature
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
408 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
409 #define VOICE_MEMO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
410 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 #define FIR 1 // Enable FIR feature
532
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
412 #if (DSP >= 33)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 #define AUDIO_MODE 1 // Enable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415 #define AUDIO_MODE 0 // Disable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 #define MELODY_E1 0 // Disable melody format E1 feature
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
419 #if(L1_VOICE_MEMO == 1)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
420 #define VOICE_MEMO 1 // Enable voice memorization feature
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
421 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
422 #define VOICE_MEMO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
423 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 #if (MELODY_E2)
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
425 #define FIR 1 // Enable FIR feature
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
426 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
427 #define FIR 0 // Disable FIR feature
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429 #define AUDIO_MODE 0 // Disable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
431
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 #define KEYBEEP 0 // Enable keybeep feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435 #define TONE 0 // Enable tone feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436 #define MELODY_E1 0 // Enable melody format E1 feature
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
437 #define VOICE_MEMO 0 // Enable voice memorization feature
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438 #define FIR 0 // Enable FIR feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 #define AUDIO_MODE 0 // Enable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 #endif
532
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
441
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
442 //FreeCalypso: LoCosto-ism below disabled
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
443 //#define L1_MIDI_BUFFER 1
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
444
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
445 /*
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
446 * L1_CPORT appears in the Leonardo L1 headers, and is enabled only for
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
447 * CHIPSET 12. The LoCosto version doesn't have it at all.
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
448 */
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
449 #define L1_CPORT 0
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451 #define L1_AUDIO_BACKGROUND_TASK (SPEECH_RECO | MELODY_E2) // audio background task is used by speech reco and melody_e2
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452 #if (OP_RIV_AUDIO == 1)
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
453 #define L1_AUDIO_DRIVER (L1_VOICE_MEMO_AMR | L1_EXT_AUDIO_MGT | L1_MP3) // Riviera audio driver (only Voice Memo AMR is available)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 // Vocoder selections
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458 //-------------------
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 #define FR 1 // Full Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461 #define FR_HR 2 // Full Rate + Half Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462 #define FR_EFR 3 // Full Rate + Enhanced Full Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463 #define FR_HR_EFR 4 // Full Rate + Half Rate + Enhanced Full Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 // Standard (frequency plan) selections
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466 //-------------------------------------
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
467 #if(L1_FF_MULTIBAND == 0) // std id is not used if multiband feature is enabled
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 #define GSM 1 // GSM900.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470 #define GSM_E 2 // GSM900 Extended.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471 #define PCS1900 3 // PCS1900.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472 #define DCS1800 4 // DCS1800.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473 #define DUAL 5 // Dual Band (GSM900 + DCS 1800 bands)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 #define DUALEXT 6 // Dual Band (E-GSM900 + DCS 1800 bands)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475 #define GSM850 7 // GSM850 Band
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476 #define DUAL_US 8 // PCS1900 + GSM850
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
478 #endif // L1_FF_MULTIBAND
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
479
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481 /* Power Management */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483 #define PWR_MNGT 1 // POWER management active if l1_config.pwr_mngt=1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
485 /*------------------------------------*/
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
486 /* BT Audio */
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
487 /*------------------------------------*/
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
488 #if ((L1_MP3 == 1) || (L1_AAC == 1))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
489 #if (OP_L1_STANDALONE == 0)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
490 #if((PSP_STANDALONE == 1) || (DRP_FW_BUILD == 1))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
491 #define L1_BT_AUDIO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
492 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
493 #define L1_BT_AUDIO 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
494 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
495 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
496 #define L1_BT_AUDIO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
497 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
498 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499 /*---------------------------------------------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 /* DSP configurations */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501 /* ------------------ */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502 /* DSP | FR| HR|EFR|14.4| SPEED |12LA68|12LA68 |4L32|AEC| MCU/DSP */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 /* (version) | | | | | |POLE80|POLE112| |/NS| interface */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 /* 0 (821) | x | | | | 39Mhz | x | | | | 1 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507 /* 1 (830) | x | | | | 39Mhz | (1) | | x | | 1 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509 /* 2 (912) | x | x | | | 58.5Mhz | x | | | | 2 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
511 /* 3 (10xx) | x | | x | x | 65Mhz | x | | | x | 3 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512 /* ----------+---+---+---+----+---------+------+-------+----|---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513 /* 4 (11xx) | x | x | x | x | 65Mhz | x | x (3)| | x | 3 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 /* 5 (830) | x | | | | 39Mhz | x | | | | 1 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
517 /* 6 (11xx) | x | x | x | x | 65Mhz | x | x (3)| |(2)| 3 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 /*(1) this version can be loaded on a 12LA68/POLE80 but the RIF/DL problem is*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
521 /* not corrected. */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
523 /*(2) AEC is disabled at DSP level but L1 must be compiled with MCU/DSP */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 /* interface which support AEC, therefore AEC is defined as 1. */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 /*(3) Pole112 include RIF DL correction. No patch is needed if this one only */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527 /* include RIF/DL problem. */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529 /*---------------------------------------------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530 #if (DSP == 16 || DSP == 17)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532 /* #define CLKMOD1 0x414e // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533 #define CLKMOD2 0x414e // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 #define CLKSTART 0x29 // ...65 Mips */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540 /* #define CLKMOD1 0x2116 //This settings force the DSP to never enteridle
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541 #define CLKMOD2 0x2116 //In this case the PLL will be always on. 39 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542 #define CLKSTART 0x25 // ...39 Mips */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544 #define VOC FR_HR_EFR // FR + HR + EFR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545 #define DATA14_4 1 // No 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 #define AEC 1 // AEC/NS supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548 #define DSP_START 0x2000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
559 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
563 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568 #elif (DSP == 30) // First GPRS.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
572
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
573 #define VOC FR_HR_EFR // FR + HR + EFR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 #define DATA14_4 1 // No 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575 #define AEC 1 // AEC/NS not supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
576 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
577 #define DSP_START 0x1F81
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
580
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
581 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
582 #elif (DSP == 31) // ROM Code GPRS G0.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
583 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
584 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
585 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
586
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
587 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
588 #define DATA14_4 1 // 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
589 #define AEC 1 // AEC/NS not supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
590 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
591
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
592 #define DSP_START 0x8763
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
593
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
594 #define INSTALL_ADD 0x87c9 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
595 #define INSTALL_ADD_WITH_PATCH 0x1352 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
596
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
597 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
598 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
599
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
600 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
601 #elif (DSP == 32) // ROM Code GPRS G1.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
602 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
603 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
604 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
605
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
606 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
607 #define DATA14_4 1 // 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
608 #define AEC 1 // AEC/NS not supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
609 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
610
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
611 #define DSP_START 0x8763
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
612
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
613 #define INSTALL_ADD 0x87c9 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
614
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
615 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
616 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
617
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
618 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
619 #elif (DSP == 33) // ROM Code GPRS.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
620 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
621 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
622 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
623 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
624 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
625 #define AEC 1 // AEC/NS not supported.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
626 #define L1_NEW_AEC 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
627
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
628 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
629 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
630 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
631 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
632 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
633
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
634 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
635
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
636 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
637
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
638 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
639
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
640 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
641 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
642
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
643 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
644
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
645 #if (CODE_VERSION == NOT_SIMULATION)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
646 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
647 // management.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
648 // DSP_IDLE3 is not supported in simulation
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
649 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
650 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
651 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
652
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
653 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
654 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
655 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
656 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
657 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
658
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
659 #if (ANALOG == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
660 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
661
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
662 #elif (ANALOG == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
663 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
664
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
665 #elif (ANALOG == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
666 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
667
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
668 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
669
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
670 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
671 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
672 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
673 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
674 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
675
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
676 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
677 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
678 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
679
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
680 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
681 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
682 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
683 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
684
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
685 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
686 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
687 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
688 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
689 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
690 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
691 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
692 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
693
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
694 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
695 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
696 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
697 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
698
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
699 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
700 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
701 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
702 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
703 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
704 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
705
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
706 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
707 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
708
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
709 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
710 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
711 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
712 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
713
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
714 #if DCO_ALGO
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
715 // DCO type of scheduling
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
716 #define C_CN_DCO_PARAM 0xA248
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
717 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
718
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
719 #elif (DSP == 34) // ROM Code GPRS AMR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
720 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
721 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
722 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
723 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
724 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
725 #define AEC 1 // AEC/NS not supported.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
726 #define L1_NEW_AEC 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
727
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
728 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
729 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
730 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
731 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
732 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
733 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
734
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
735 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
736
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
737 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
738
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
739 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
740 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
741
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
742 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
743
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
744 #if (CODE_VERSION == NOT_SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
745 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
746 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
747 // DSP_IDLE3 is not supported in simulation
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
748 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
749 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
750 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
751
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
752 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
753 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
754 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
755 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
756 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
757 #if (ANALOG == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
758 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
759
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
760 #elif (ANALOG == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
761 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
762
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
763 #elif (ANALOG == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
764 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
765
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
766 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
767
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
768 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
769 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
770 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
771 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
772 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
773
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
774 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
775 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
776 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
777
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
778 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
779 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
780 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
781 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
782
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
783 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
784 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
785 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
786 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
787 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
788 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
789 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
790 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
791
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
792 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
793 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
794 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
795 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
796
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
797 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
798 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
799 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
800
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
801 // AMR trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
802 #define C_AMR_TRACE_ID 55
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
803
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
804 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
805 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
806 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
807
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
808 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
809 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
810
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
811 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
812 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
813 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
814 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
815
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
816 #elif (DSP == 35) // ROM Code GPRS AMR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
817 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
818 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
819 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
820 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
821 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
822 #define AEC 1 // AEC/NS not supported.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
823 #define L1_NEW_AEC 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
824
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
825 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
826 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
827 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
828 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
829 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
830 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
831
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
832 #define FF_L1_TCH_VOCODER_CONTROL 1
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
833 #define W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
834
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
835 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
836
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
837 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
838
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
839 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
840 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
841
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
842 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
843
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
844 #if (CODE_VERSION == NOT_SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
845 #if (CHIPSET != 12)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
846 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
847 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
848 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
849 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
850 #define W_A_DSP_IDLE3 0 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
851 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
852 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
853 #endif // CHIPSET 12
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
854 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
855 #define W_A_DSP_IDLE3 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
856 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
857
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
858 #define W_A_DSP_PR20037 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
859
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
860 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
861 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
862 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
863 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
864 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
865 #if (ANALOG == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
866 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
867
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
868 #elif (ANALOG == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
869 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
870
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
871 #elif (ANALOG == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
872 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
873
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
874 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
875
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
876 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
877 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
878 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
879 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
880 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
881
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
882 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
883 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
884 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
885
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
886 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
887 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
888 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
889 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
890
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
891 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
892 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
893 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
894 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
895 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
896 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
897 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
898 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
899
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
900 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
901 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
902 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
903 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
904
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
905 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
906 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
907 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
908
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
909 // AMR trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
910 #define C_AMR_TRACE_ID 55
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
911
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
912 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
913 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
914 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
915
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
916 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
917 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
918
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
919 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
920 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
921 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
922 #endif
532
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
923 #elif (DSP >= 36) // ROM Code GPRS AMR.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
924
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
925 #if ((L1_PCM_EXTRACTION) && (SPEECH_RECO))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
926 #error "PCM extraction and Speech recognition not supported simultaneously"
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
927 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
928
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
929 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
930 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
931 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
932 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
933 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
532
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
934
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
935 #if 0
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
936 /* what we got with LoCosto L1 headers */
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
937 #define AEC 0 // AEC/NS not supported.
532
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
938 #define L1_NEW_AEC 0
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
939 #else
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
940 /* what we are used to from the Leonardo version */
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
941 #define AEC 1 // AEC/NS not supported.
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
942 #if (OP_RIV_AUDIO == 0)
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
943 #define L1_NEW_AEC 1
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
944 #else
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
945 // Available but not yet tuned with Riviera AUDIO
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
946 #define L1_NEW_AEC 0
532
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
947 #endif
d9fd344d7570 gsm-fw/L1/include/l1_confg.h: FC changes reapplied to LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 531
diff changeset
948 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
949
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
950 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
951 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
952 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
953 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
954 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
955 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
956 #undef L1_AMR_NSYNC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
957 #define L1_AMR_NSYNC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
958 #define FF_L1_TCH_VOCODER_CONTROL 1
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
959 #define W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
960
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
961 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
962
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
963 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
964
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
965 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
966 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
967
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
968 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
969
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
970 #if (CODE_VERSION == NOT_SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
971 #if ((CHIPSET != 12) && (CHIPSET != 15))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
972 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
973 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
974 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
975 #else // CHIPSET 12
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
976 #define W_A_DSP_IDLE3 0 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
977 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
978 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
979 #endif // CHIPSET 12
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
980 #else // CODE_VERSION
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
981 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
982 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
983
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
984 #define W_A_DSP_PR20037 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
985
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
986 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
987 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
988 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
989 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
990 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
991 #if (ANALOG == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
992 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
993
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
994 #elif (ANALOG == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
995 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
996
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
997 #elif (ANALOG == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
998 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
999
531
de635895e0be gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 530
diff changeset
1000 #elif (ANALOG == 11) // TRITON
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1001 #define C_DSP_SW_WORK_AROUND 0x000E
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1002
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1003 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1004
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1005 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1006 /*-------------------------------*/
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1007 // Note:
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1008 // In case of melody E2, MP3, AAC or Dyn Dwnld ACTIVITY the DSP trace is automatically disabled
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1009 // because the melody instrument waves are overlayed with DSP trace buffer (supported since patch 7c20)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1010
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1011 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1012 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1013 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1014
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1015 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1016 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1017 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1018
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1019 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)// C_DEBUG_TRACE_TYPE 0x0012 changed from 0x0054 for DSP load reduce
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1020 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = KERNEL; Features = Timer, Burst, Buffer Header.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1021 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1022 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = KERNEL; Features = Timer, Burst, Buffer Header.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1023 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1024
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1025
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1026 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1027 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1028 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1029 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1030
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1031 // AMR trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1032 #define C_AMR_TRACE_ID 55
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1033
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1034
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1035 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1036 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1037
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1038 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1039 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1040
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1041 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1042 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1043 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1044 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1045 #endif // DSP
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1046
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1047 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1048 /* Default value */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1049 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1050 #ifndef W_A_DSP1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1051 #define W_A_DSP1 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1052 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1053
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1054 #ifndef DATA14_4
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1055 #define DATA14_4 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1056 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1057
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1058 #ifndef W_A_ITFORCE
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1059 #define W_A_ITFORCE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1060 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1061
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1062 #ifndef W_A_DSP_IDLE3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1063 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1064 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1065
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1066 #ifndef L1_NEW_AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1067 #define L1_NEW_AEC 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1068 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1069
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1070 #ifndef DSP_DEBUG_TRACE_ENABLE
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1071 #define DSP_DEBUG_TRACE_ENABLE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1072 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1073
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1074 #ifndef DEBUG_DEDIC_TCH_BLOCK_STAT
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1075 #define DEBUG_DEDIC_TCH_BLOCK_STAT 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1076 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1077
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1078 #ifndef D_ERROR_STATUS_TRACE_ENABLE
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1079 #define D_ERROR_STATUS_TRACE_ENABLE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1080 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1081
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1082 #ifndef L1_GTT
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1083 #define L1_GTT 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1084 #define TTY_SYNC_MCU 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1085 #define TTY_SYNC_MCU_2 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1086 #define L1_GTT_FIFO_TEST_ATOMIC 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1087 #define NEW_WKA_PATCH 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1088 #define OPTIMISED 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1089 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1090
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1091 #ifndef L1_AMR_NSYNC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1092 #define L1_AMR_NSYNC 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1093 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1094
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1095 #ifndef FF_L1_TCH_VOCODER_CONTROL
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1096 #define FF_L1_TCH_VOCODER_CONTROL 0
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1097 #define W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1098 #define W_A_DSP_PR20037 0
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1099 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1100
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1101
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1102 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1103 /* Download */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1104 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1105
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1106
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1107 /* Possible values for the download status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1108
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1109 #define LEAD_READY 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1110 #define BLOCK_READY 2
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1111 #define PROGRAM_DONE 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1112 #define PAGE_SELECTION 4
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1113
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1114
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1115 /************************************/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1116 /* Options of compilation... */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1117 /************************************/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1118
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1119 // Possible choice of hardware plateform.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1120 #define GEMINI 1 // GEMINI chip (rom dsp code)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1121 #define POLESTAR 2 // POLESTAR chip (no rom)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1122
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1123 // Possible choice for DSP software setup.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1124 #define NO_DWNLD 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1125 #define PATCH_DWNLD 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1126 #define DSP_DWNLD 2
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1127 #define PATCH_DSP_DWNLD 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1128
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1129 // MAC-S status reporting to Layer 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1130 #define MACS_STATUS 0 // MAC-S STATUS activated if set to 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1131
714
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1132 /*
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1133 * Possible choice for dll_dcch_downlink interface (with FN or without FN)
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1134 * 0=without, 1=with FN parameter
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1135 *
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1136 * FreeCalypso note: the Leonardo version had this setting set to 1, i.e.,
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1137 * 3 arguments to dll_dcch_downlink(). We don't have any source or even
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1138 * header files for the Leonardo version of DL, but disassembly shows
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1139 * that dll_dcch_downlink() does expect the FN parameter. The source for
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1140 * DL from LoCosto also has a SEND_FN_TO_L2_IN_DCCH configurable setting,
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1141 * and it is set to 1 in the dl.h local header. But here is the kicker:
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1142 * the LoCosto version of this l1_confg.h header has the setting set to 0!
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1143 *
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1144 * I couldn't believe my eyes, so I disassembled the binary objects present
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1145 * in the copy of the LoCosto source from scottn.us: yes, indeed that
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1146 * code version contains an outright bug in that L1 does not pass the
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1147 * 3rd argument (in ARM register r2), but DL expects it to be there.
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1148 * (Thus DL is getting whatever "garbage" happens to be in r2 as the FN
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1149 * parameter. I did not take the time to investigate what the downstream
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1150 * effects are.)
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1151 *
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1152 * For FreeCalypso I'm setting SEND_FN_TO_L2_IN_DCCH to 1, both here
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1153 * in L1 and in DL, where it was already set.
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1154 */
58bbee73c4b7 gsm-fw/L1/include/l1_confg.h: SEND_FN_TO_L2_IN_DCCH fix
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 561
diff changeset
1155 #define SEND_FN_TO_L2_IN_DCCH 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1156
549
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1157 /*
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1158 * FreeCalypso change: I'm disabling L1_CHECK_COMPATIBLE (a new "feature"
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1159 * added with LoCosto version of L1, not present in the Leonardo version)
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1160 * because l1_async.c fails to compile with it enabled. Examination of
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1161 * the code reveals that this "compatibility check" involves things
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1162 * which we won't be enabling any time soon, if ever.
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1163 */
b1e2dbb3c751 L1: l1_async.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 532
diff changeset
1164 #define L1_CHECK_COMPATIBLE 0 //Check L1A message compatiblity
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1165
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1166 //---------------------------------------------------------------------------------
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1167
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1168 #endif /* __L1_CONFG_H__ */