freecalypso-sw: gsm-fw/L1/tpudrv/tpudrv12.c annotate

annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 707:b111f8e4aef3

dl_em.c compiles

author	Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date	Fri, 03 Oct 2014 04:08:59 +0000
parents	d42078e35ac9
children	7f305eb3c530

rev	line source
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 * tpudrv12.c (TPU driver for RF type 12) is a required part of the L1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3 * code for TI GSM chipset solutions consisting of Calypso or other
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 * classic (non-LoCosto) DBB, one of the classic ABB chips such as Iota
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 * or Syren, and Rita RF transceiver; the number 12 refers to the latter.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 * We, the FreeCalypso team, have not been able to find an original
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 * source for this C module: the LoCosto source has tpudrv61.c instead,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9 * supporting LoCosto RF instead of Rita, whereas the TSM30 source
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10 * only supports non-TI RF transceivers. Our only available reference
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	11 * for what this tpudrv12.c module is supposed to contain is the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	12 * tpudrv12.obj COFF object from the Leonardo semi-src deliverable.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	13 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14 * The present reconstruction has been made by copying tpudrv61.c and
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	15 * tweaking it to match the disassembly of the reference binary object
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	16 * named above.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	17 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	18
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	19 #define TPUDRV12_C
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	20
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	21 #include "config.h"
584 d42078e35ac9 tpudrv12.c compiles! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 583 diff changeset	22 #include "sys_types.h"
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	23 #include "l1_confg.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	24
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	25 #include "l1_macro.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	26 #include "l1_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27 #include "l1_types.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28 #if TESTMODE
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29 #include "l1tm_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31 #if (AUDIO_TASK == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 #include "l1audio_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 #include "l1audio_cust.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34 #include "l1audio_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36 #if (L1_GTT == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 #include "l1gtt_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 #include "l1gtt_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 #if (L1_MP3 == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 #include "l1mp3_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 #if (L1_MIDI == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44 #include "l1midi_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	46
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 #if (L1_AAC == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	48 #include "l1aac_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 #include "l1_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 #include "l1_time.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	53 #include "l1_ctl.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	54 #include "tpudrv.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	55 #include "tpudrv12.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	56 #include "l1_rf12.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58 #include "../../bsp/mem.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	59 #include "../../bsp/armio.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	60 #include "../../bsp/clkm.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	61
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	62 // Global variables
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	63 extern T_L1_CONFIG l1_config;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	64 extern UWORD16 AGC_TABLE[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	65 extern UWORD16 *TP_Ptr;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	66 #if (L1_FF_MULTIBAND == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	67 extern const WORD8 rf_subband2band[RF_NB_SUBBANDS];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	68 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	69
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	70 static WORD8 rf_index; // index into rf_path[]
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	71 static UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	72 static UWORD8 rfband; /* ditto */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	73
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	74 // Internal function prototypes
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	75 void l1dmacro_rx_down (WORD32 t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	76
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	77 #if (L1_FF_MULTIBAND == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	78 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	79 WORD32 rf_init(WORD32 t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	80
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	81 // External function prototypes
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	82 UWORD8 Cust_is_band_high(UWORD16 radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	83 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	84
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	85
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	86 extern T_RF_BAND rf_band[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	87 extern T_RF rf;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	88
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	89 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	90 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	91 /* DEFINITION OF MACROS FOR CHIPS SERIAL PROGRAMMATION */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	92 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	93 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	94
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	95 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	96 /* Is arfcn in the DCS band (512-885) ? */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	97 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	98 #define IS_HIGH_BAND(arfcn) (((arfcn >= 512) && (arfcn <= 885)) ? 1 : 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	99
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	100 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	101 /* Send a value to Rita RF */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	102 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	103 #define TSP_TO_RF(rf_data)\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	104 {\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	105 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, ((rf_data) >> 8) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	106 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_2, (rf_data) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	107 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x4F); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	108 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	109 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	110
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	111 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	112 /* Send a TSP command to ABB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	113 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	114 #define TSP_TO_ABB(data)\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	115 {\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	116 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, (data) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x06); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	118 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	120
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	121 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122 /* Trace arfcn for conversion debug */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	123 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	124 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	125 // ----Debug information : record all arfcn programmed into synthesizer!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	126 #define MAX_ARFCN_TRACE 4096 // enough for 5 sessions of 124+374
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	127 SYS_UWORD16 arfcn_trace[MAX_ARFCN_TRACE];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	128 static UWORD32 arfcn_trace_index = 0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	129
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	130 void trace_arfcn(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	131 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	132 arfcn_trace[arfcn_trace_index++] = arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	133
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	134 // Wrap to beginning
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	135 if (arfcn_trace_index == MAX_ARFCN_TRACE)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	136 arfcn_trace_index = 0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	137 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	138 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	139
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	140
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	141 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	142 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	143 /* DEFINITION OF HARWARE DEPENDANT CONSTANTS */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	144 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	145 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	146
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	147 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	148 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	149 /* INTERNAL FUNCTIONS OF TPUDRV14.C */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	150 /* EFFECTIVE DOWNLOADING THROUGH TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	151 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	152 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	153 // rx & tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	154 typedef struct tx_rx_s
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	155 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	156 UWORD16 farfcn0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	157 WORD8 ou;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	158 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	159 T_TX_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	160
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	161 struct synth_s {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	162 // common
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	163 UWORD16 arfcn0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	164 UWORD16 limit;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	165 UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	166 T_TX_RX tx_rx[2];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	167 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	168
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	169 struct rf_path_s {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	170 UWORD8 rx_up;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	171 UWORD8 rx_down;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	172 UWORD8 tx_up;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	173 UWORD8 tx_down;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	174 struct synth_s *synth;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	175 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	176
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	177 const struct synth_s synth_900[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	178 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	179 { 0, 124, BAND_SELECT_GSM, {{ 890, 1}, { 935, 2}}},// gsm 0 - 124
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	180 {974, 1023, BAND_SELECT_GSM, {{ 880, 1}, { 925, 2}}},// egsm 975 - 1023
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	181 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	182
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	183 const struct synth_s synth_1800[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	184 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	185 {511, 885, BAND_SELECT_DCS, {{1710, 1}, {1805, 1}}}, // dcs 512 - 885
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	186 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	187
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	188 const struct synth_s synth_1900[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	189 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	190 {511, 810, BAND_SELECT_PCS, {{1850, 1}, {1930, 1}}}, // pcs 512 - 810;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	191 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	192
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	193 const struct synth_s synth_850[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	194 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	195 {127, 192, BAND_SELECT_850_LO, {{ 824, 2}, { 869, 2}}}, // gsm850 low
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	196 {127, 251, BAND_SELECT_850_HI, {{ 824, 1}, { 869, 2}}}, // gsm850 high
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	197 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	198
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	199 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	200 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	201 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	202 { RU_1900, RD_1900, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	203 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	204 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //GSM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	205 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	206
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	207 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	208 * Leonardo tpudrv12.obj contains a function named calc_a_b(); there is
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	209 * no such function in the LoCosto version, but there is a similar-looking
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	210 * calc_rf_freq() function instead. Let's try making our calc_a_b()
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	211 * from LoCosto's calc_rf_freq().
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	212 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	213
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	214 UWORD32 calc_a_b(UWORD16 arfcn, UWORD8 downlink)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	215 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	216 UWORD32 farfcn; /* in 200 kHz units */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	217 UWORD32 n; /* B * P + A */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	218 struct synth_s *s;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	219
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	220 s = rf_path[rf_index].synth;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	221 while(s->limit < arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	222 s++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	223
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	224 rf_chip_band = s->rf_chip_band;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	225
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	226 // Convert the ARFCN to the channel frequency (times 5 to avoid the decimal value)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	227 farfcn = 5*s->tx_rx[downlink].farfcn0 + (arfcn - s->arfcn0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	228 n = farfcn * s->tx_rx[downlink].ou;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	229
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	230 /* magic A & B encoding for Rita */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	231 return((n - 4096) << 3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	232 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	233
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	234 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	235 /* Convert_l1_radio_freq */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	236 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	237 /* conversion of l1 radio_freq to */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	238 /* real channel number */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	239 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	240 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	241 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	242 switch(l1_config.std.id)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	243 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	244 case GSM:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	245 case DCS1800:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	246 case PCS1900:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	247 case GSM850:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	248 return (radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	249 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	250
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	251 case DUAL:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	252 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	253 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	254 // GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	255 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	256 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	257 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	258 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	259 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	260 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	261
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	262 case DUALEXT:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	263 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	264 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	265 // E-GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	266 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	267 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	268 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	269 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	270 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	271 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	272 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	273 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	274 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	275 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	276 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	277 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	278 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	279 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	280 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	281 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	282 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	283 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	284
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	285 case GSM_E:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	286 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	287 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	288 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	289 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	290 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	291 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	292 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	293 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	294 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	295 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	296 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	297 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	298 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	299
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	300 case DUAL_US:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	301 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	302 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	303 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	304 return(radio_freq - l1_config.std.first_radio_freq + 128);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	305 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	306 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	307 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	308 // PCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	309 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	310 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	311 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	312 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	313
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	314 default: // should never occur.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	315 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	316 } // end of switch
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	317 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	318
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	319 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	320 /* rf_init */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	321 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	322 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	323 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	324 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	325 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	326 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	327 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	328 WORD32 rf_init(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	329 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	330 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	331 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x47);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	332 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	333 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	334 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	335 t += 8;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	336 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	337 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	338 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	339 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	340 TSP_TO_RF(0x0012);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	341 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	342 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	343 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	344 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	345 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	346 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	347 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	348 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	349 t += 117;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	350 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	351 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	352 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	353 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	354 TSP_TO_RF(0x02FE);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	355 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	356 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	357 TSP_TO_RF(0x401F);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	358 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	359 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	360 TSP_TO_RF(0x043D);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	361 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	362 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	363 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	364
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	365 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	366 /* rf_init_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	367 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	368 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	369 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	370 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	371 WORD32 rf_init_light(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	372 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	373 // initialization for change of multi-band configuration dependent on STD
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	374 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	375 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	376
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	377 UWORD8 arfcn_to_rf_index(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	378 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	379 UWORD8 index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	380 extern const T_STD_CONFIG std_config[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	381 index = std_config[l1_config.std.id].band[0];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	382
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	383 if ((std_config[l1_config.std.id].band[1] != BAND_NONE) && IS_HIGH_BAND(arfcn))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	384 index = std_config[l1_config.std.id].band[1];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	385
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	386 return (index - 1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	387 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	388
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	389 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	390 /* rf_program */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	391 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	392 /* Programs the RF synthesizer */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	393 /* called each frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	394 /* downloads NA counter value */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	395 /* t = start time in the current frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	396 /------------------------------------------/ //change 2 UWORD8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	397 UWORD32 rf_program(UWORD32 t, SYS_UWORD16 radio_freq, UWORD32 rx)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	398 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	399 UWORD32 rfdiv;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	400 SYS_UWORD16 arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	401
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	402 rfband = Cust_is_band_high(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	403
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	404 arfcn = Convert_l1_radio_freq(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	405 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	406 trace_arfcn(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	407 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	408 rf_index = arfcn_to_rf_index(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	409
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	410 rfdiv = calc_a_b(arfcn, rx);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	411
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	412 if (rx != 1) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	413 TSP_TO_RF(rfdiv \| REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	414 *TP_Ptr++ = TPU_FAT(0x1274);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	415 TSP_TO_RF(0x043A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	416 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	417 TSP_TO_RF(rfdiv \| REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	418 *TP_Ptr++ = TPU_FAT(0x12FD);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	419 TSP_TO_RF(0x023A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	420 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	421
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	422 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	423 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	424
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	425 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	426 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	427 /* EXTERNAL FUNCTIONS CALLED BY LAYER1 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	428 /* COMMON TO L1 and TOOLKIT */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	429 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	430 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	431
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	432 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	433 /* agc */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	434 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	435 /* Program a gain into IF amp */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	436 /* agc_value : gain in dB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	437 /* */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	438 /* additional parameter for LNA setting */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	439 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	440 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	441 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	442 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	443
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	444 void l1dmacro_agc(SYS_UWORD16 radio_freq, WORD8 gain, UWORD8 lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	445 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	446 int agc_table_index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	447 UWORD16 rf_data;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	448
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	449 agc_table_index = gain - 2;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	450 if (agc_table_index < 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	451 agc_table_index++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	452 agc_table_index >>= 1;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	453 if (gain >= 42)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	454 agc_table_index = 19;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	455 if (gain < 16)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	456 agc_table_index = 6;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	457 *TP_Ptr++ = TPU_FAT(0x1334);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	458 rf_data = REG_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	459 if (!lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	460 rf_data \|= RF_GAIN;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	461 rf_data \|= AGC_TABLE[agc_table_index] << 11;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	462 rf_data \|= RX_CAL_MODE;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	463 TSP_TO_RF(rf_data);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	464 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	465
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	466 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	467 /* l1dmacro_rx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	468 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	469 /* programs RF synth for recceive */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	470 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	471 void l1dmacro_rx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	472 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	473 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	474
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	475 // Important: always use rx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	476 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	477 t = l1_config.params.rx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	478 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	479
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	480 t = rf_program(t, radio_freq, 1); // direction is set to 1 for Rx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	481 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	482
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	483 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	484 /* l1dmacro_tx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	485 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	486 /* programs RF synth for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	487 /* programs OPLL for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	488 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	489 void l1dmacro_tx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	490 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	491 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	492
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	493 // Important: always use tx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	494 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	495 t = l1_config.params.tx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	496 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	497
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	498 t = rf_program(t, radio_freq, 0); // direction set to 0 for Tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	499 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	500
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	501 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	502 /* l1dmacro_rx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	503 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	504 /* Open window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	505 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	506 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	507 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	508 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	509 void l1dmacro_rx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	510 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	511 *TP_Ptr++ = TPU_FAT(0x1377);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	512 TSP_TO_RF(0x0A3A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	513 *TP_Ptr++ = TPU_FAT(0x137E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	514 TSP_TO_ABB(0x10);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	515 *TP_Ptr++ = TPU_FAT(0x1383);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	516 TSP_TO_ABB(0x18);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	517 *TP_Ptr++ = TPU_FAT(58);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	518 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_up \| 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	519 *TP_Ptr++ = TPU_FAT(62);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	520 TSP_TO_ABB(0x14);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	521 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	522
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	523 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	524 /* l1pdmacro_rx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	525 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	526 /* Close window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	527 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	528 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	529 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	530 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	531 void l1dmacro_rx_down (WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	532 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	533 *TP_Ptr++ = TPU_FAT(t - 37);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	534 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	535 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	536 *TP_Ptr++ = TPU_FAT(t - 4);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	537 TSP_TO_ABB(0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	538 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	539
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	540 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	541 /* l1dmacro_tx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	542 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	543 /* Open transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	544 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	545 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	546 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	547 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	548 void l1dmacro_tx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	549 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	550 if (l1_config.std.id == DCS1800 \|\|
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	551 rfband == MULTI_BAND2 &&
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	552 (l1_config.std.id == DUAL \|\| l1_config.std.id == DUALEXT)) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	553 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	554 TSP_TO_RF(0x0007);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	555 *TP_Ptr++ = TPU_FAT(0x1288);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	556 TSP_TO_RF(0xC00B);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	557 *TP_Ptr++ = TPU_FAT(0x1292);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	558 TSP_TO_RF(0x3077);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	559 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	560 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	561 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	562 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	563 *TP_Ptr++ = TPU_FAT(0x12C6);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	564 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	565 *TP_Ptr++ = TPU_FAT(0x12E3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	566 TSP_TO_RF(0x243A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	567 *TP_Ptr++ = TPU_FAT(0x1302);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	568 TSP_TO_ABB(0xC0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	569 *TP_Ptr++ = TPU_FAT(0x1352);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	570 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	571 *TP_Ptr++ = TPU_FAT(0x1384);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	572 TSP_TO_ABB(0xA0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	573 *TP_Ptr++ = TPU_FAT(16);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	574 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up \| 0x01);
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	575 *TP_Ptr++ = TPU_FAT(21);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	576 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x0F);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	577 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	578
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	579 /-------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	580 /* l1dmacro_tx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	581 /-------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	582 /* Close transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	583 /-------------------------------------------/
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	584 /* Rita version differs from LoCosto, */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	585 /* reconstructing from disassembly. */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	586 /-------------------------------------------/
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	587 void l1dmacro_tx_down (WORD32 t, BOOL tx_flag, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	588 {
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	589 if (adc_active == ACTIVE)
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	590 l1dmacro_adc_read_tx(t - 44);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	591 *TP_Ptr++ = TPU_FAT(t - 4);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	592 TSP_TO_ABB(0x80);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	593 *TP_Ptr++ = TPU_FAT(t + 22);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	594 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x00);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	595 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_down \| 0x01);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	596 *TP_Ptr++ = TPU_FAT(t + 25);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	597 TSP_TO_RF(0x003A);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	598 *TP_Ptr++ = TPU_FAT(t + 31);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	599 TSP_TO_ABB(0x00);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	600 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	601
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	602 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	603 * l1dmacro_rx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	604 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	605 * Receive Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	606 */
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	607 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq)
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	608 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	609 l1dmacro_rx_up();
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	610 l1dmacro_rx_down(STOP_RX_SNB);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	611 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	612
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	613 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	614 * l1dmacro_rx_sb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	615 * Receive Synchro burst
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	616 */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	617 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	618 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	619 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	620 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	621 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	622
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	623 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	624 * l1dmacro_rx_ms
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	625 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	626 * Receive Power Measurement window
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	627 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	628 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	629 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	630 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	631 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	632 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	633
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	634 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	635 * l1dmacro_rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	636 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	637 * Receive Frequency burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	638 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	639 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	640 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	641 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	642
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	643 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	644 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	645 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	646 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	647 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	648 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	649 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	650 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	651 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	652 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	653 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	654
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	655 l1dmacro_rx_down (STOP_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	656 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	657
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	658 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	659 * l1dmacro_rx_fb26
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	660 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	661 * Receive Frequency burst for TCH.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	662 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	663 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	664 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	665 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	666
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	667 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	668
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	669 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	670 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	671
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	672 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	673 * l1dmacro_tx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	674 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	675 * Transmit Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	676 */
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	677 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	678 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	679 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	680 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	681 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	682
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	683 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	684 * l1dmacro_tx_ra
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	685 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	686 * Transmit Random Access burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	687 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	688 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	689 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	690 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	691 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	692 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	693
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	694 #if TESTMODE
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	695 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	696 * l1dmacro_rx_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	697 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	698 * Receive continuously
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	699 */
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	700 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	701 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	702 l1dmacro_rx_up ();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	703 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	704
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	705 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	706 * l1dmacro_tx_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	707 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	708 * Transmit continuously
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	709 */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	710 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	711 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	712 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	713 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	714
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	715 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	716 * l1d_macro_stop_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	717 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	718 * Stop continuous Tx or Rx
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	719 */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	720 void l1dmacro_stop_cont (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	721 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	722 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	723 l1dmacro_rx_down(STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	724 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	725 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	726 }
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	727 #endif /* TESTMODE */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	728
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	729
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	730 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	731 /* l1dmacro_reset_hw */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	732 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	733 /* Reset and set OFFSET register */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	734 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	735
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	736 void l1dmacro_reset_hw(UWORD32 servingCellOffset)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	737 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	738 TPU_Reset(1); // reset TPU only, no TSP reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	739 TPU_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	740 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	741
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	742 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	743 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x17);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	744
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	745 *TP_Ptr++ = TPU_OFFSET(servingCellOffset);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	746 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	747
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	748 // l1dmacro_RF_sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	749 // Program RF for BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	750
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	751
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	752 /* Rita version differs from LoCosto, reconstructing from disassembly */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	753 void l1dmacro_RF_sleep (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	754 {
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	755 TSP_TO_RF(0x0002);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	756 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	757 *TP_Ptr++ = TPU_WAIT(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	758 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	759 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	760 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	761 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	762 *TP_Ptr++ = TPU_WAIT(100);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	763 /* code from tpudrv61.c follows, same for Rita and LoCosto */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	764 *TP_Ptr++ = TPU_SLEEP;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	765 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	766 TP_Enable(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	767 /*
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	768 * The following call does not appear in tpudrv12.obj, and
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	769 * there is no TPU_wait_idle() function in Leonardo tpudrv.obj
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	770 * either. But this wait operation makes sense to me, so
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	771 * I'm keeping it as-is from the LoCosto version for now.
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	772 * -- Space Falcon
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	773 */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	774 TPU_wait_idle();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	775 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	776
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	777 // l1dmacro_RF_wakeup
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	778 //* wakeup RF from BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	779
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	780 /* Rita version differs from LoCosto, reconstructing from disassembly */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	781 void l1dmacro_RF_wakeup (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	782 {
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	783 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	784 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	785 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	786 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	787 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	788 *TP_Ptr++ = TPU_WAIT(100);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	789 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	790 *TP_Ptr++ = TPU_WAIT(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	791 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	792 *TP_Ptr++ = TPU_WAIT(8);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	793 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	794 *TP_Ptr++ = TPU_WAIT(5);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	795 TSP_TO_RF(0x0012);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	796 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	797 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	798 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	799 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	800 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	801 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	802 TSP_TO_RF(0x003A);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	803 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	804 TSP_TO_RF(0xC003);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	805 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	806 TSP_TO_RF(0x02FE);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	807 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	808 TSP_TO_RF(0x401F);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	809 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	810 TSP_TO_RF(0x043D);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	811 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	812 *TP_Ptr++ = TPU_WAIT(117);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	813 /* code from tpudrv61.c follows, same for Rita and LoCosto */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	814 *TP_Ptr++ = TPU_SLEEP;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	815 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	816 TP_Enable(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	817 /* same issue as in the previous function */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	818 TPU_wait_idle();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	819 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	820
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	821
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	822 // l1dmacro_init_hw
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	823 // Reset VEGA, then remove reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	824 // Init RF/IF synthesizers
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	825
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	826 void l1dmacro_init_hw(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	827 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	828 WORD32 t = 100; // start time for actions
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	829
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	830 TP_Reset(1); // reset TPU and TSP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	831
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	832 // GSM 1.5 : TPU clock enable is in TPU
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	833 //---------------------------------------
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	834 TPU_ClkEnable(1); // TPU CLOCK ON
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	835
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	836 TP_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	837
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	838
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	839 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	840
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	841 // Set FEM to inactive state before turning ON the RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	842 // At this point the RF regulators are still OFF. Thus the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	843 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
583 ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	844 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	845
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	846 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	847 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	848
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	849 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	850 *TP_Ptr++ = TPU_SYNC(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	851
583 ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	852 /* from disassembly, differs from LoCosto version */
ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	853 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x20);
ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	854 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	855 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET3, 0x00);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	856
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	857 t = 1000; // arbitrary start time
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	858
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	859 t = rf_init(t); // Initialize RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	860
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	861 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	862
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	863 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	864 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	865
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	866 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	867 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	868
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	869 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	870 /* l1dmacro_init_hw_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	871 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	872 /* Reset VEGA, then remove reset */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	873 /* Init RF/IF synthesizers */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	874 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	875 void l1dmacro_init_hw_light(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	876 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	877 UWORD32 t = 100; // start time for actions //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	878 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	879 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	880 t = 1000; // arbitrary start time //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	881
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	882 t = rf_init_light(t); // Initialize RF Board //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	883
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	884 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	885 l1dmacro_idle(); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	886
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	887 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	888 }

FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 707:b111f8e4aef3