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annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 582:81753f5e902e

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tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Fri, 15 Aug 2014 19:25:58 +0000
parents bbb1e73782e6
children ff1065828669
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
579
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1 /*
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2 * tpudrv12.c (TPU driver for RF type 12) is a required part of the L1
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3 * code for TI GSM chipset solutions consisting of Calypso or other
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4 * classic (non-LoCosto) DBB, one of the classic ABB chips such as Iota
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5 * or Syren, and Rita RF transceiver; the number 12 refers to the latter.
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6 *
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7 * We, the FreeCalypso team, have not been able to find an original
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8 * source for this C module: the LoCosto source has tpudrv61.c instead,
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9 * supporting LoCosto RF instead of Rita, whereas the TSM30 source
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10 * only supports non-TI RF transceivers. Our only available reference
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11 * for what this tpudrv12.c module is supposed to contain is the
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12 * tpudrv12.obj COFF object from the Leonardo semi-src deliverable.
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13 *
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14 * The present reconstruction has been made by copying tpudrv61.c and
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15 * tweaking it to match the disassembly of the reference binary object
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16 * named above.
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17 */
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18
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19 #define TPUDRV12_C
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20
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21 #include "config.h"
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22 #include "l1_confg.h"
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23
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24 #include "l1_macro.h"
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25 #include "l1_const.h"
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26 #include "l1_types.h"
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27 #if TESTMODE
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28 #include "l1tm_defty.h"
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29 #endif
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30 #if (AUDIO_TASK == 1)
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31 #include "l1audio_const.h"
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32 #include "l1audio_cust.h"
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33 #include "l1audio_defty.h"
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34 #endif
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35 #if (L1_GTT == 1)
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36 #include "l1gtt_const.h"
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37 #include "l1gtt_defty.h"
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38 #endif
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39 #if (L1_MP3 == 1)
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40 #include "l1mp3_defty.h"
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41 #endif
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42 #if (L1_MIDI == 1)
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43 #include "l1midi_defty.h"
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44 #endif
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45
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46 #if (L1_AAC == 1)
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47 #include "l1aac_defty.h"
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48 #endif
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49
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50 #include "l1_defty.h"
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51 #include "l1_time.h"
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52 #include "l1_ctl.h"
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53 #include "tpudrv.h"
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54 #include "tpudrv12.h"
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55 #include "l1_rf12.h"
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56
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57 #include "sys_types.h"
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58
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59 #include "../../bsp/mem.h"
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60 #include "../../bsp/armio.h"
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61 #include "../../bsp/clkm.h"
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62
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63 // Global variables
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64 extern T_L1_CONFIG l1_config;
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65 extern UWORD16 AGC_TABLE[];
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66 extern UWORD16 *TP_Ptr;
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67 #if (L1_FF_MULTIBAND == 1)
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68 extern const WORD8 rf_subband2band[RF_NB_SUBBANDS];
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69 #endif
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70
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71 static WORD8 rf_index; // index into rf_path[]
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72 static UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
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73 static UWORD8 rfband; /* ditto */
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74
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75 // Internal function prototypes
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76 void l1dmacro_rx_down (WORD32 t);
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77
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78 #if (L1_FF_MULTIBAND == 0)
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79 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq);
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80 WORD32 rf_init(WORD32 t);
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81
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82 // External function prototypes
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83 UWORD8 Cust_is_band_high(UWORD16 radio_freq);
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84 #endif
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85
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86
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87 extern T_RF_BAND rf_band[];
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88 extern T_RF rf;
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89
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90 /**************************************************************************/
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91 /**************************************************************************/
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92 /* DEFINITION OF MACROS FOR CHIPS SERIAL PROGRAMMATION */
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93 /**************************************************************************/
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94 /**************************************************************************/
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95
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96 /*------------------------------------------*/
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97 /* Is arfcn in the DCS band (512-885) ? */
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98 /*------------------------------------------*/
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99 #define IS_HIGH_BAND(arfcn) (((arfcn >= 512) && (arfcn <= 885)) ? 1 : 0)
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100
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101 /*------------------------------------------*/
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102 /* Send a value to Rita RF */
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103 /*------------------------------------------*/
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104 #define TSP_TO_RF(rf_data)\
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105 {\
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106 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, ((rf_data) >> 8) & 0xFF); \
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107 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_2, (rf_data) & 0xFF); \
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108 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x4F); \
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109 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \
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110 }
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111
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112 /*------------------------------------------*/
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113 /* Send a TSP command to ABB */
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114 /*------------------------------------------*/
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115 #define TSP_TO_ABB(data)\
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116 {\
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117 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, (data) & 0xFF); \
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118 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x06); \
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119 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \
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120 }
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121
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122 /*------------------------------------------*/
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123 /* Trace arfcn for conversion debug */
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124 /*------------------------------------------*/
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125 #ifdef ARFCN_DEBUG
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126 // ----Debug information : record all arfcn programmed into synthesizer!
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127 #define MAX_ARFCN_TRACE 4096 // enough for 5 sessions of 124+374
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128 SYS_UWORD16 arfcn_trace[MAX_ARFCN_TRACE];
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129 static UWORD32 arfcn_trace_index = 0;
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130
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131 void trace_arfcn(SYS_UWORD16 arfcn)
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132 {
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133 arfcn_trace[arfcn_trace_index++] = arfcn;
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134
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135 // Wrap to beginning
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136 if (arfcn_trace_index == MAX_ARFCN_TRACE)
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137 arfcn_trace_index = 0;
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138 }
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139 #endif
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140
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141
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142 /**************************************************************************/
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143 /**************************************************************************/
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144 /* DEFINITION OF HARWARE DEPENDANT CONSTANTS */
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145 /**************************************************************************/
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146 /**************************************************************************/
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147
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148 /**************************************************************************/
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149 /**************************************************************************/
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150 /* INTERNAL FUNCTIONS OF TPUDRV14.C */
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151 /* EFFECTIVE DOWNLOADING THROUGH TSP */
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152 /**************************************************************************/
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153 /**************************************************************************/
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154 // rx & tx
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155 typedef struct tx_rx_s
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156 {
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157 UWORD16 farfcn0;
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158 WORD8 ou;
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159 }
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160 T_TX_RX;
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161
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162 struct synth_s {
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163 // common
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164 UWORD16 arfcn0;
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165 UWORD16 limit;
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166 UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
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167 T_TX_RX tx_rx[2];
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168 };
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169
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170 struct rf_path_s {
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171 UWORD8 rx_up;
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172 UWORD8 rx_down;
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173 UWORD8 tx_up;
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174 UWORD8 tx_down;
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175 struct synth_s *synth;
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176 };
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177
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178 const struct synth_s synth_900[] =
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179 {
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180 { 0, 124, BAND_SELECT_GSM, {{ 890, 1}, { 935, 2}}},// gsm 0 - 124
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181 {974, 1023, BAND_SELECT_GSM, {{ 880, 1}, { 925, 2}}},// egsm 975 - 1023
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182 };
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183
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184 const struct synth_s synth_1800[] =
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185 {
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186 {511, 885, BAND_SELECT_DCS, {{1710, 1}, {1805, 1}}}, // dcs 512 - 885
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187 };
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188
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189 const struct synth_s synth_1900[] =
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190 {
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191 {511, 810, BAND_SELECT_PCS, {{1850, 1}, {1930, 1}}}, // pcs 512 - 810;
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192 };
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193
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diff changeset
194 const struct synth_s synth_850[] =
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195 {
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196 {127, 192, BAND_SELECT_850_LO, {{ 824, 2}, { 869, 2}}}, // gsm850 low
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197 {127, 251, BAND_SELECT_850_HI, {{ 824, 1}, { 869, 2}}}, // gsm850 high
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198 };
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199
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200 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
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201 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
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diff changeset
202 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
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diff changeset
203 { RU_1900, RD_1900, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
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204 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
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205 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //GSM
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diff changeset
206 };
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207
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diff changeset
208 /*
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209 * Leonardo tpudrv12.obj contains a function named calc_a_b(); there is
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210 * no such function in the LoCosto version, but there is a similar-looking
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211 * calc_rf_freq() function instead. Let's try making our calc_a_b()
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212 * from LoCosto's calc_rf_freq().
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diff changeset
213 */
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214
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215 UWORD32 calc_a_b(UWORD16 arfcn, UWORD8 downlink)
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diff changeset
216 {
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217 UWORD32 farfcn; /* in 200 kHz units */
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diff changeset
218 UWORD32 n; /* B * P + A */
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diff changeset
219 struct synth_s *s;
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diff changeset
220
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221 s = rf_path[rf_index].synth;
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diff changeset
222 while(s->limit < arfcn)
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diff changeset
223 s++;
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diff changeset
224
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diff changeset
225 rf_chip_band = s->rf_chip_band;
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diff changeset
226
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diff changeset
227 // Convert the ARFCN to the channel frequency (times 5 to avoid the decimal value)
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parents:
diff changeset
228 farfcn = 5*s->tx_rx[downlink].farfcn0 + (arfcn - s->arfcn0);
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diff changeset
229 n = farfcn * s->tx_rx[downlink].ou;
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diff changeset
230
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diff changeset
231 /* magic A & B encoding for Rita */
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parents:
diff changeset
232 return((n - 4096) << 3);
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diff changeset
233 }
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234
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diff changeset
235 /*------------------------------------------*/
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diff changeset
236 /* Convert_l1_radio_freq */
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diff changeset
237 /*------------------------------------------*/
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diff changeset
238 /* conversion of l1 radio_freq to */
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diff changeset
239 /* real channel number */
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diff changeset
240 /*------------------------------------------*/
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diff changeset
241 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq)
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diff changeset
242 {
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diff changeset
243 switch(l1_config.std.id)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245 case GSM:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 case DCS1800:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 case PCS1900:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 case GSM850:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249 return (radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 case DUAL:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 // GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263 case DUALEXT:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266 // E-GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
274 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
276 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
277 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
278 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 case GSM_E:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
295 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
296 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
300
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
301 case DUAL_US:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
302 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
303 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
304 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
305 return(radio_freq - l1_config.std.first_radio_freq + 128);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
306 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
307 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309 // PCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 default: // should never occur.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
316 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
317 } // end of switch
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
318 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
319
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
320 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
321 /* rf_init */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
322 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
323 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
324 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
327 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
328 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329 WORD32 rf_init(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
331 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
332 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x47);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
334 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 t += 8;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
341 TSP_TO_RF(0x0012);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
343 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
344 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
345 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
346 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
347 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
348 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
349 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
350 t += 117;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
351 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
352 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
353 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
354 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
355 TSP_TO_RF(0x02FE);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358 TSP_TO_RF(0x401F);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
359 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361 TSP_TO_RF(0x043D);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
363 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
367 /* rf_init_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 WORD32 rf_init_light(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374 // initialization for change of multi-band configuration dependent on STD
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
378 UWORD8 arfcn_to_rf_index(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 UWORD8 index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381 extern const T_STD_CONFIG std_config[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
382 index = std_config[l1_config.std.id].band[0];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384 if ((std_config[l1_config.std.id].band[1] != BAND_NONE) && IS_HIGH_BAND(arfcn))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
385 index = std_config[l1_config.std.id].band[1];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
386
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
387 return (index - 1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
389
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391 /* rf_program */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393 /* Programs the RF synthesizer */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 /* called each frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 /* downloads NA counter value */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396 /* t = start time in the current frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
397 /*------------------------------------------*/ //change 2 UWORD8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 UWORD32 rf_program(UWORD32 t, SYS_UWORD16 radio_freq, UWORD32 rx)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400 UWORD32 rfdiv;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 SYS_UWORD16 arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403 rfband = Cust_is_band_high(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 arfcn = Convert_l1_radio_freq(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
407 trace_arfcn(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409 rf_index = arfcn_to_rf_index(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 rfdiv = calc_a_b(arfcn, rx);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 if (rx != 1) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414 TSP_TO_RF(rfdiv | REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415 *TP_Ptr++ = TPU_FAT(0x1274);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 TSP_TO_RF(0x043A | rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 TSP_TO_RF(rfdiv | REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419 *TP_Ptr++ = TPU_FAT(0x12FD);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420 TSP_TO_RF(0x023A | rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 /* EXTERNAL FUNCTIONS CALLED BY LAYER1 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429 /* COMMON TO L1 and TOOLKIT */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 /* agc */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436 /* Program a gain into IF amp */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437 /* agc_value : gain in dB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438 /* */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 /* additional parameter for LNA setting */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445 void l1dmacro_agc(SYS_UWORD16 radio_freq, WORD8 gain, UWORD8 lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 int agc_table_index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448 UWORD16 rf_data;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450 agc_table_index = gain - 2;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451 if (agc_table_index < 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452 agc_table_index++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 agc_table_index >>= 1;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 if (gain >= 42)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 agc_table_index = 19;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456 if (gain < 16)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 agc_table_index = 6;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458 *TP_Ptr++ = TPU_FAT(0x1334);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 rf_data = REG_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 if (!lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461 rf_data |= RF_GAIN;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462 rf_data |= AGC_TABLE[agc_table_index] << 11;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463 rf_data |= RX_CAL_MODE;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464 TSP_TO_RF(rf_data);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
467 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468 /* l1dmacro_rx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470 /* programs RF synth for recceive */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472 void l1dmacro_rx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476 // Important: always use rx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
478 t = l1_config.params.rx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
479 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481 t = rf_program(t, radio_freq, 1); // direction is set to 1 for Rx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
485 /* l1dmacro_tx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
486 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
487 /* programs RF synth for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
488 /* programs OPLL for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
489 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
490 void l1dmacro_tx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
491 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
492 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
493
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
494 // Important: always use tx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
495 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
496 t = l1_config.params.tx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
497 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
498
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499 t = rf_program(t, radio_freq, 0); // direction set to 0 for Tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 /* l1dmacro_rx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 /* Open window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510 void l1dmacro_rx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
511 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512 *TP_Ptr++ = TPU_FAT(0x1377);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513 TSP_TO_RF(0x0A3A | rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 *TP_Ptr++ = TPU_FAT(0x137E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 TSP_TO_ABB(0x10);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516 *TP_Ptr++ = TPU_FAT(0x1383);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
517 TSP_TO_ABB(0x18);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 *TP_Ptr++ = TPU_FAT(58);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_up | 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 *TP_Ptr++ = TPU_FAT(62);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
521 TSP_TO_ABB(0x14);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
523
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525 /* l1pdmacro_rx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527 /* Close window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532 void l1dmacro_rx_down (WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 *TP_Ptr++ = TPU_FAT(t - 37);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537 *TP_Ptr++ = TPU_FAT(t - 4);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538 TSP_TO_ABB(0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542 /* l1dmacro_tx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544 /* Open transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549 void l1dmacro_tx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551 if (l1_config.std.id == DCS1800 ||
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552 rfband == MULTI_BAND2 &&
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 (l1_config.std.id == DUAL || l1_config.std.id == DUALEXT)) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 TSP_TO_RF(0x0007);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556 *TP_Ptr++ = TPU_FAT(0x1288);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557 TSP_TO_RF(0xC00B);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558 *TP_Ptr++ = TPU_FAT(0x1292);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
559 TSP_TO_RF(0x3077);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
563 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 *TP_Ptr++ = TPU_FAT(0x12C6);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566 *TP_Ptr++ = TPU_FAT(0x12E3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567 TSP_TO_RF(0x243A | rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568 *TP_Ptr++ = TPU_FAT(0x1302);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 TSP_TO_ABB(0xC0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570 *TP_Ptr++ = TPU_FAT(0x1352);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
572 *TP_Ptr++ = TPU_FAT(0x1384);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
573 TSP_TO_ABB(0xA0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 *TP_Ptr++ = TPU_FAT(16);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up | 0x01);
580
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
576 *TP_Ptr++ = TPU_FAT(21);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
577 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x0F);
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
580 /*-------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
581 /* l1dmacro_tx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
582 /*-------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
583 /* Close transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
584 /*-------------------------------------------*/
580
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
585 /* Rita version differs from LoCosto, */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
586 /* reconstructing from disassembly. */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
587 /*-------------------------------------------*/
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
588 void l1dmacro_tx_down (WORD32 t, BOOL tx_flag, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
589 {
580
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
590 if (adc_active == ACTIVE)
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
591 l1dmacro_adc_read_tx(t - 44);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
592 *TP_Ptr++ = TPU_FAT(t - 4);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
593 TSP_TO_ABB(0x80);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
594 *TP_Ptr++ = TPU_FAT(t + 22);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
595 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x00);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
596 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_down | 0x01);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
597 *TP_Ptr++ = TPU_FAT(t + 25);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
598 TSP_TO_RF(0x003A);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
599 *TP_Ptr++ = TPU_FAT(t + 31);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 579
diff changeset
600 TSP_TO_ABB(0x00);
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
601 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
602
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
603 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
604 * l1dmacro_rx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
605 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
606 * Receive Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
607 */
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
608 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq)
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
609 {
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
610 l1dmacro_rx_up();
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
611 l1dmacro_rx_down(STOP_RX_SNB);
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
612 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
613
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
614 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
615 * l1dmacro_rx_sb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
616 * Receive Synchro burst
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
617 */
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
618 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
619 {
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
620 l1dmacro_rx_up();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
621 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
622 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
623
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
624 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
625 * l1dmacro_rx_ms
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
626 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
627 * Receive Power Measurement window
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
628 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
629 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
630 {
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
631 l1dmacro_rx_up();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
632 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
633 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
634
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
635 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
636 * l1dmacro_rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
637 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
638 * Receive Frequency burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
639 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
640 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
641 {
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
642 l1dmacro_rx_up();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
643
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
644 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
645 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
646 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
647 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
648 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
649 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
650 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
651 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
652 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
653 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
654 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
655
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
656 l1dmacro_rx_down (STOP_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
657 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
658
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
659 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
660 * l1dmacro_rx_fb26
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
661 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
662 * Receive Frequency burst for TCH.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
663 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
664 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
665 {
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
666 l1dmacro_rx_up();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
667
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
668 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
669
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
670 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
671 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
672
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
673 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
674 * l1dmacro_tx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
675 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
676 * Transmit Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
677 */
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
678 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
679 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
680 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
681 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
682 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
683
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
684 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
685 * l1dmacro_tx_ra
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
686 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
687 * Transmit Random Access burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
688 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
689 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
690 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
691 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
692 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
693 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
694
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
695 #if TESTMODE
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
696 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
697 * l1dmacro_rx_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
698 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
699 * Receive continuously
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
700 */
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
701 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
702 {
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
703 l1dmacro_rx_up ();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
704 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
705
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
706 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
707 * l1dmacro_tx_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
708 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
709 * Transmit continuously
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
710 */
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
711 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
712 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
713 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
714 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
715
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
716 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
717 * l1d_macro_stop_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
718 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
719 * Stop continuous Tx or Rx
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
720 */
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
721 void l1dmacro_stop_cont (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
722 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
723 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
724 l1dmacro_rx_down(STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
725 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
726 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
727 }
581
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 580
diff changeset
728 #endif /* TESTMODE */
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
729
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
730
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
731 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
732 /* l1dmacro_reset_hw */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
733 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
734 /* Reset and set OFFSET register */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
735 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
736
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
737 void l1dmacro_reset_hw(UWORD32 servingCellOffset)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
738 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
739 TPU_Reset(1); // reset TPU only, no TSP reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
740 TPU_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
741 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
742
582
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
743 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
744 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x17);
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
745
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
746 *TP_Ptr++ = TPU_OFFSET(servingCellOffset);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
747 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
748
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
749 // l1dmacro_RF_sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
750 // Program RF for BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
751
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
752
582
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
753 /* Rita version differs from LoCosto, reconstructing from disassembly */
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
754 void l1dmacro_RF_sleep (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
755 {
582
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
756 TSP_TO_RF(0x0002);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
757 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
758 *TP_Ptr++ = TPU_WAIT(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
759 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
760 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
761 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
762 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
763 *TP_Ptr++ = TPU_WAIT(100);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
764 /* code from tpudrv61.c follows, same for Rita and LoCosto */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
765 *TP_Ptr++ = TPU_SLEEP;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
766 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
767 TP_Enable(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
768 /*
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
769 * The following call does not appear in tpudrv12.obj, and
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
770 * there is no TPU_wait_idle() function in Leonardo tpudrv.obj
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
771 * either. But this wait operation makes sense to me, so
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
772 * I'm keeping it as-is from the LoCosto version for now.
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
773 * -- Space Falcon
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
774 */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
775 TPU_wait_idle();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
776 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
777
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
778 // l1dmacro_RF_wakeup
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
779 //* wakeup RF from BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
780
582
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
781 /* Rita version differs from LoCosto, reconstructing from disassembly */
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
782 void l1dmacro_RF_wakeup (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
783 {
582
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
784 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
785 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
786 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
787 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
788 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
789 *TP_Ptr++ = TPU_WAIT(100);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
790 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
791 *TP_Ptr++ = TPU_WAIT(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
792 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
793 *TP_Ptr++ = TPU_WAIT(8);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
794 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
795 *TP_Ptr++ = TPU_WAIT(5);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
796 TSP_TO_RF(0x0012);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
797 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
798 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
799 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
800 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
801 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
802 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
803 TSP_TO_RF(0x003A);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
804 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
805 TSP_TO_RF(0xC003);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
806 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
807 TSP_TO_RF(0x02FE);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
808 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
809 TSP_TO_RF(0x401F);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
810 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
811 TSP_TO_RF(0x043D);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
812 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
813 *TP_Ptr++ = TPU_WAIT(117);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
814 /* code from tpudrv61.c follows, same for Rita and LoCosto */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
815 *TP_Ptr++ = TPU_SLEEP;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
816 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
817 TP_Enable(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
818 /* same issue as in the previous function */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 581
diff changeset
819 TPU_wait_idle();
579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
820 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
821
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
822
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
823 // l1dmacro_init_hw
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
824 // Reset VEGA, then remove reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
825 // Init RF/IF synthesizers
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
826
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
827 void l1dmacro_init_hw(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
828 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
829 WORD32 t = 100; // start time for actions
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
830
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
831 TP_Reset(1); // reset TPU and TSP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
832
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
833 // GSM 1.5 : TPU clock enable is in TPU
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
834 //---------------------------------------
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
835 TPU_ClkEnable(1); // TPU CLOCK ON
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
836
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
837 TP_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
838
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
839
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
840 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
841
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
842 // Set FEM to inactive state before turning ON the RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
843 // At this point the RF regulators are still OFF. Thus the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
844 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
845
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
846
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
847 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
848 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
849
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
850 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
851 *TP_Ptr++ = TPU_SYNC(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
852
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
853 //Check Initialisation or Reset for TPU2OCP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
854
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
855
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
856 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
857
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
858 t = 1000; // arbitrary start time
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
859
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
860 t = rf_init(t); // Initialize RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
861
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
862 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
863
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
864 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
865 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
866
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
867 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
868 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
869
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
870 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
871 /* l1dmacro_init_hw_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
872 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
873 /* Reset VEGA, then remove reset */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
874 /* Init RF/IF synthesizers */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
875 /*------------------------------------------*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
876 void l1dmacro_init_hw_light(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
877 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
878 UWORD32 t = 100; // start time for actions //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
879 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
880 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
881 t = 1000; // arbitrary start time //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
882
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
883 t = rf_init_light(t); // Initialize RF Board //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
884
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
885 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
886 l1dmacro_idle(); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
887
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
888 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
889 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
890
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
891 //BHO added
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
892 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
893 * l1dmacro_rx_fbsb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
894 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
895 * Receive Frequency burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
896 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
897
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
898 #if ((REL99 == 1) && (FF_BHO == 1))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
899 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
900 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
901 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
902 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
903 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
904 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
905 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
906 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
907 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
908 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
909 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
910 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
911 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
912 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
913 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
914 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
915
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
916
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
917 // same as rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
918 *TP_Ptr++ = TPU_AT(0); // 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
919 *TP_Ptr++ = TPU_AT(0); // 2
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
920 *TP_Ptr++ = TPU_AT(0); // 3
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
921 *TP_Ptr++ = TPU_AT(0); // 4
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
922 *TP_Ptr++ = TPU_AT(0); // 5
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
923 *TP_Ptr++ = TPU_AT(0); // 6
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
924 *TP_Ptr++ = TPU_AT(0); // 7
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
925 *TP_Ptr++ = TPU_AT(0); // 8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
926 *TP_Ptr++ = TPU_AT(0); // 9
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
927 *TP_Ptr++ = TPU_AT(0); // 10
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
928 *TP_Ptr++ = TPU_AT(0); // 11
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
929
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
930 // one more for SB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
931 *TP_Ptr++ = TPU_AT(0); // 12
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
932
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
933 l1dmacro_rx_down (STOP_RX_FBSB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
934 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
935 #endif/*(L1_RF_KBD_FIX == 1)*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
936
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
937 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
938 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
939 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
940 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
941 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
942 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
943 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
944 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
945 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
946 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
947 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
948 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
949
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
950 // same as rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
951 *TP_Ptr++ = TPU_AT(0); // 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
952 *TP_Ptr++ = TPU_AT(0); // 2
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
953 *TP_Ptr++ = TPU_AT(0); // 3
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
954 *TP_Ptr++ = TPU_AT(0); // 4
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
955 *TP_Ptr++ = TPU_AT(0); // 5
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
956 *TP_Ptr++ = TPU_AT(0); // 6
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
957 *TP_Ptr++ = TPU_AT(0); // 7
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
958 *TP_Ptr++ = TPU_AT(0); // 8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
959 *TP_Ptr++ = TPU_AT(0); // 9
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
960 *TP_Ptr++ = TPU_AT(0); // 10
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
961 *TP_Ptr++ = TPU_AT(0); // 11
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
962
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
963 // one more for SB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
964 *TP_Ptr++ = TPU_AT(0); // 12
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
965
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
966 l1dmacro_rx_down (STOP_RX_FBSB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
967 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
968 #endif/*(L1_RF_KBD_FIX == 0)*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
969 #endif // #if ((REL99 == 1) && (FF_BHO == 1))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
970
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
971 ////BHO