FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/L1/tpudrv/tpudrv12.c @ 582:81753f5e902e
tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 15 Aug 2014 19:25:58 +0000 |
parents | bbb1e73782e6 |
children | ff1065828669 |
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581:bbb1e73782e6 | 582:81753f5e902e |
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738 { | 738 { |
739 TPU_Reset(1); // reset TPU only, no TSP reset | 739 TPU_Reset(1); // reset TPU only, no TSP reset |
740 TPU_Reset(0); | 740 TPU_Reset(0); |
741 TP_Ptr = (UWORD16 *) TPU_RAM; | 741 TP_Ptr = (UWORD16 *) TPU_RAM; |
742 | 742 |
743 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP); | 743 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01); |
744 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, TXM_SLEEP); | 744 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x17); |
745 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_IDLE),((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF))); | |
746 | 745 |
747 *TP_Ptr++ = TPU_OFFSET(servingCellOffset); | 746 *TP_Ptr++ = TPU_OFFSET(servingCellOffset); |
748 | |
749 } | 747 } |
750 | 748 |
751 // l1dmacro_RF_sleep | 749 // l1dmacro_RF_sleep |
752 // Program RF for BIG or DEEP sleep | 750 // Program RF for BIG or DEEP sleep |
753 | 751 |
754 | 752 |
753 /* Rita version differs from LoCosto, reconstructing from disassembly */ | |
755 void l1dmacro_RF_sleep (void) | 754 void l1dmacro_RF_sleep (void) |
756 { | 755 { |
757 // sending REG_OFF script | 756 TSP_TO_RF(0x0002); |
758 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_OFF), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF))); | 757 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01); |
759 | 758 *TP_Ptr++ = TPU_WAIT(1); |
760 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP); //Shutdown FEM | 759 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21); |
761 | 760 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02); |
762 *TP_Ptr++ = TPU_SLEEP; | 761 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41); |
763 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; | 762 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); |
764 TP_Enable(1); | 763 *TP_Ptr++ = TPU_WAIT(100); |
765 TPU_wait_idle(); | 764 /* code from tpudrv61.c follows, same for Rita and LoCosto */ |
766 | 765 *TP_Ptr++ = TPU_SLEEP; |
767 } | 766 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; |
768 | 767 TP_Enable(1); |
768 /* | |
769 * The following call does not appear in tpudrv12.obj, and | |
770 * there is no TPU_wait_idle() function in Leonardo tpudrv.obj | |
771 * either. But this wait operation makes sense to me, so | |
772 * I'm keeping it as-is from the LoCosto version for now. | |
773 * -- Space Falcon | |
774 */ | |
775 TPU_wait_idle(); | |
776 } | |
769 | 777 |
770 // l1dmacro_RF_wakeup | 778 // l1dmacro_RF_wakeup |
771 //* wakeup RF from BIG or DEEP sleep | 779 //* wakeup RF from BIG or DEEP sleep |
772 | 780 |
781 /* Rita version differs from LoCosto, reconstructing from disassembly */ | |
773 void l1dmacro_RF_wakeup (void) | 782 void l1dmacro_RF_wakeup (void) |
774 { | 783 { |
775 // sending REG_ON script | 784 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; |
776 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_ON), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF))); | 785 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01); |
777 | 786 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06); |
778 *TP_Ptr++ = TPU_SLEEP; | 787 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41); |
779 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; | 788 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); |
780 TP_Enable(1); | 789 *TP_Ptr++ = TPU_WAIT(100); |
781 TPU_wait_idle(); | 790 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01); |
782 | 791 *TP_Ptr++ = TPU_WAIT(1); |
783 | 792 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down); |
793 *TP_Ptr++ = TPU_WAIT(8); | |
794 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01); | |
795 *TP_Ptr++ = TPU_WAIT(5); | |
796 TSP_TO_RF(0x0012); | |
797 *TP_Ptr++ = TPU_FAT(0); | |
798 *TP_Ptr++ = TPU_FAT(0); | |
799 *TP_Ptr++ = TPU_FAT(0); | |
800 *TP_Ptr++ = TPU_FAT(0); | |
801 *TP_Ptr++ = TPU_FAT(0); | |
802 *TP_Ptr++ = TPU_FAT(0); | |
803 TSP_TO_RF(0x003A); | |
804 *TP_Ptr++ = TPU_WAIT(7); | |
805 TSP_TO_RF(0xC003); | |
806 *TP_Ptr++ = TPU_WAIT(7); | |
807 TSP_TO_RF(0x02FE); | |
808 *TP_Ptr++ = TPU_WAIT(7); | |
809 TSP_TO_RF(0x401F); | |
810 *TP_Ptr++ = TPU_WAIT(7); | |
811 TSP_TO_RF(0x043D); | |
812 *TP_Ptr++ = TPU_WAIT(7); | |
813 *TP_Ptr++ = TPU_WAIT(117); | |
814 /* code from tpudrv61.c follows, same for Rita and LoCosto */ | |
815 *TP_Ptr++ = TPU_SLEEP; | |
816 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; | |
817 TP_Enable(1); | |
818 /* same issue as in the previous function */ | |
819 TPU_wait_idle(); | |
784 } | 820 } |
785 | 821 |
786 | 822 |
787 // l1dmacro_init_hw | 823 // l1dmacro_init_hw |
788 // Reset VEGA, then remove reset | 824 // Reset VEGA, then remove reset |